JPS5425677A - Manufacture for semiconductor integrated circuit - Google Patents

Manufacture for semiconductor integrated circuit

Info

Publication number
JPS5425677A
JPS5425677A JP9126177A JP9126177A JPS5425677A JP S5425677 A JPS5425677 A JP S5425677A JP 9126177 A JP9126177 A JP 9126177A JP 9126177 A JP9126177 A JP 9126177A JP S5425677 A JPS5425677 A JP S5425677A
Authority
JP
Japan
Prior art keywords
manufacture
integrated circuit
semiconductor integrated
polycrystal
mosfet
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9126177A
Other languages
Japanese (ja)
Inventor
Mitsutaka Morimoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP9126177A priority Critical patent/JPS5425677A/en
Publication of JPS5425677A publication Critical patent/JPS5425677A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232Field-effect technology
    • H01L21/8234MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8236Combination of enhancement and depletion transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE:To establish MOSFET having threshold voltages two or more types, by performing channel doping simultaneously on the part being the channel of depletion type FET and being the source or drain region directly in contact with the polycrystal Si later, with ion injection.
JP9126177A 1977-07-28 1977-07-28 Manufacture for semiconductor integrated circuit Pending JPS5425677A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9126177A JPS5425677A (en) 1977-07-28 1977-07-28 Manufacture for semiconductor integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9126177A JPS5425677A (en) 1977-07-28 1977-07-28 Manufacture for semiconductor integrated circuit

Publications (1)

Publication Number Publication Date
JPS5425677A true JPS5425677A (en) 1979-02-26

Family

ID=14021466

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9126177A Pending JPS5425677A (en) 1977-07-28 1977-07-28 Manufacture for semiconductor integrated circuit

Country Status (1)

Country Link
JP (1) JPS5425677A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61114556A (en) * 1984-11-09 1986-06-02 Fujitsu Ltd Manufacture of semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61114556A (en) * 1984-11-09 1986-06-02 Fujitsu Ltd Manufacture of semiconductor device
JPH0586856B2 (en) * 1984-11-09 1993-12-14 Fujitsu Ltd

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