JPS54161855A - Input/output control system - Google Patents

Input/output control system

Info

Publication number
JPS54161855A
JPS54161855A JP7067078A JP7067078A JPS54161855A JP S54161855 A JPS54161855 A JP S54161855A JP 7067078 A JP7067078 A JP 7067078A JP 7067078 A JP7067078 A JP 7067078A JP S54161855 A JPS54161855 A JP S54161855A
Authority
JP
Japan
Prior art keywords
command
input
channel
control unit
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7067078A
Other languages
Japanese (ja)
Inventor
Hiroshi Yamaguchi
Ikuro Koyanazu
Akihisa Makita
Mitsuhiro Yamaga
Yuichi Narita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Hitachi Ltd
NEC Corp
Nippon Telegraph and Telephone Corp
Original Assignee
Fujitsu Ltd
Hitachi Ltd
NEC Corp
Nippon Telegraph and Telephone Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd, Hitachi Ltd, NEC Corp, Nippon Telegraph and Telephone Corp, Nippon Electric Co Ltd filed Critical Fujitsu Ltd
Priority to JP7067078A priority Critical patent/JPS54161855A/en
Publication of JPS54161855A publication Critical patent/JPS54161855A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To realize the pre-fetch of the command to the control unit and thus to realize a high-speed command chaining process by providing the means to memorize the flag and the command of several channel command words plus the function to decide the command chain to the input/output control unit.
CONSTITUTION: The input/output control system contains input/output channel 2 which controls the data transfer between main memory 1 and the input/output device based on the channel command word stored in memory 1 and input/output control unit 3 which controls the input-output device. Chanel 2 reads out the several chained channel commands stored in memory 1 and send it to command word pre- fetch control part 4. Then the commands chained by the channel command are memorized in registers 5W7 by the request given from I/0 control part 8 of unit 3, thus realizing the pre-fetch of the command to control unit 3.
COPYRIGHT: (C)1979,JPO&Japio
JP7067078A 1978-06-12 1978-06-12 Input/output control system Pending JPS54161855A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7067078A JPS54161855A (en) 1978-06-12 1978-06-12 Input/output control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7067078A JPS54161855A (en) 1978-06-12 1978-06-12 Input/output control system

Publications (1)

Publication Number Publication Date
JPS54161855A true JPS54161855A (en) 1979-12-21

Family

ID=13438322

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7067078A Pending JPS54161855A (en) 1978-06-12 1978-06-12 Input/output control system

Country Status (1)

Country Link
JP (1) JPS54161855A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63208147A (en) * 1987-02-25 1988-08-29 Hitachi Ltd Command starting system
JPH02100163A (en) * 1988-10-07 1990-04-12 Fujitsu Ltd Command chain control system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63208147A (en) * 1987-02-25 1988-08-29 Hitachi Ltd Command starting system
JPH02100163A (en) * 1988-10-07 1990-04-12 Fujitsu Ltd Command chain control system

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