JPS54153673A - Peak value detector - Google Patents

Peak value detector

Info

Publication number
JPS54153673A
JPS54153673A JP6098878A JP6098878A JPS54153673A JP S54153673 A JPS54153673 A JP S54153673A JP 6098878 A JP6098878 A JP 6098878A JP 6098878 A JP6098878 A JP 6098878A JP S54153673 A JPS54153673 A JP S54153673A
Authority
JP
Japan
Prior art keywords
video signal
amplifier
scanning
peak values
detecting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6098878A
Other languages
Japanese (ja)
Inventor
Kenji Nakamura
Shinji Matsuoka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP6098878A priority Critical patent/JPS54153673A/en
Publication of JPS54153673A publication Critical patent/JPS54153673A/en
Pending legal-status Critical Current

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  • Measurement Of Current Or Voltage (AREA)

Abstract

PURPOSE: To detect accurate peak values and obtain binary coded signals even when voltage fluctuations occur owing to temperature drift in a TV camera by obtaining a mean value from the peak values of the video signal and comparing the same with the video signal of one scanning after.
CONSTITUTION: Video signal Vi is applied to analog switches AS 6, 8 via amplifiers L, M, N, P. The AS 6 goes ON while a detecting circuit including an amplifier Q is detecting maximum value and the AS 8 goes ON while the detecting circuit including an amplifier R is detecting minimum value. The ASs 7, 9 go ON at the start of scanning. This yields the maximum value output VQ and minimum value output VR and addition S of both outputs yields a mean value voltage VS, which is then supplied to an amplifier T as a capacitor C7 is charged by As 10. The mean value voltage VT obtained from the peak values of the video signal is compared U with the video signal VL of one scanning after, whereby a binary coded output VO is obtained.
COPYRIGHT: (C)1979,JPO&Japio
JP6098878A 1978-05-24 1978-05-24 Peak value detector Pending JPS54153673A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6098878A JPS54153673A (en) 1978-05-24 1978-05-24 Peak value detector

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6098878A JPS54153673A (en) 1978-05-24 1978-05-24 Peak value detector

Publications (1)

Publication Number Publication Date
JPS54153673A true JPS54153673A (en) 1979-12-04

Family

ID=13158315

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6098878A Pending JPS54153673A (en) 1978-05-24 1978-05-24 Peak value detector

Country Status (1)

Country Link
JP (1) JPS54153673A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57207867A (en) * 1981-06-17 1982-12-20 Hitachi Ltd High resolution peak value measuring circuit by expansion of differential voltage

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57207867A (en) * 1981-06-17 1982-12-20 Hitachi Ltd High resolution peak value measuring circuit by expansion of differential voltage

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