JPS57154978A - Dc reproducing and synchronous separating circuit - Google Patents

Dc reproducing and synchronous separating circuit

Info

Publication number
JPS57154978A
JPS57154978A JP56041091A JP4109181A JPS57154978A JP S57154978 A JPS57154978 A JP S57154978A JP 56041091 A JP56041091 A JP 56041091A JP 4109181 A JP4109181 A JP 4109181A JP S57154978 A JPS57154978 A JP S57154978A
Authority
JP
Japan
Prior art keywords
synchronizing signal
transistor
turned
synchronous
differential amplifier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56041091A
Other languages
Japanese (ja)
Inventor
Nobumasa Abe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Sanyo Electric Co Ltd
Sanyo Electric Co Ltd
Sanyo Denki Co Ltd
Original Assignee
Tokyo Sanyo Electric Co Ltd
Sanyo Electric Co Ltd
Sanyo Denki Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Sanyo Electric Co Ltd, Sanyo Electric Co Ltd, Sanyo Denki Co Ltd filed Critical Tokyo Sanyo Electric Co Ltd
Priority to JP56041091A priority Critical patent/JPS57154978A/en
Publication of JPS57154978A publication Critical patent/JPS57154978A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/44—Receiver circuitry for the reception of television signals according to analogue transmission standards
    • H04N5/455—Demodulation-circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Picture Signal Circuits (AREA)
  • Television Signal Processing For Recording (AREA)
  • Synchronizing For Television (AREA)

Abstract

PURPOSE:To realize both the DC reproduction and the synchronous separation of the luminance signal, by using a differential amplifier consisting of a transistor which is connected to an input terminal via a capacitor and a transistor which is connected to the reference bias. CONSTITUTION:The video signal supplied through an input terminal 1 is connected to a transistor TR8 of one side that forms a differential amplifier by an impedance converting TR and through a charging/discharging capacitor 3. The reference bias Vr, i.e., the prescribed voltage is applied to a TR9 of the other side of the differential amplifier via a bias TR13. The TR9 is turned on during the period of the synchronizing signal, and accordingly a TR4 is turned on. Thus the capacitor 3 is charged by an amount equivalent to a degree discharged in the period excepting the synchronous signal. As a result, the DC reproduction output with the synchronizing signal tip level kept constant emerges at the point B. On the other hand, the TR9 is turned on during the period of the synchronizing signal. Thus the synchronizing signal emerges at the point D. In such way, a DC reproducing and synchronous separating circuit that is suited to the IC conversion can be obtained.
JP56041091A 1981-03-19 1981-03-19 Dc reproducing and synchronous separating circuit Pending JPS57154978A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56041091A JPS57154978A (en) 1981-03-19 1981-03-19 Dc reproducing and synchronous separating circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56041091A JPS57154978A (en) 1981-03-19 1981-03-19 Dc reproducing and synchronous separating circuit

Publications (1)

Publication Number Publication Date
JPS57154978A true JPS57154978A (en) 1982-09-24

Family

ID=12598799

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56041091A Pending JPS57154978A (en) 1981-03-19 1981-03-19 Dc reproducing and synchronous separating circuit

Country Status (1)

Country Link
JP (1) JPS57154978A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60130269A (en) * 1983-12-16 1985-07-11 Matsushita Electric Ind Co Ltd Synchronizing separator circuit
JPS61143374U (en) * 1985-02-25 1986-09-04
JPS62133869A (en) * 1985-12-06 1987-06-17 Toshiba Corp Clamping circuit
JPH01302968A (en) * 1988-05-31 1989-12-06 Fuji Photo Film Co Ltd Synchronizing separator circuit

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4862328A (en) * 1971-10-05 1973-08-31
JPS4864827A (en) * 1971-12-08 1973-09-07
JPS50137616A (en) * 1974-04-19 1975-10-31
JPS5423315A (en) * 1977-07-22 1979-02-21 Sharp Corp Synchronizing-separator circuit
JPS5435617U (en) * 1977-08-13 1979-03-08

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4862328A (en) * 1971-10-05 1973-08-31
JPS4864827A (en) * 1971-12-08 1973-09-07
JPS50137616A (en) * 1974-04-19 1975-10-31
JPS5423315A (en) * 1977-07-22 1979-02-21 Sharp Corp Synchronizing-separator circuit
JPS5435617U (en) * 1977-08-13 1979-03-08

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60130269A (en) * 1983-12-16 1985-07-11 Matsushita Electric Ind Co Ltd Synchronizing separator circuit
JPH0417588B2 (en) * 1983-12-16 1992-03-26 Matsushita Electric Ind Co Ltd
JPS61143374U (en) * 1985-02-25 1986-09-04
JPS62133869A (en) * 1985-12-06 1987-06-17 Toshiba Corp Clamping circuit
JPH01302968A (en) * 1988-05-31 1989-12-06 Fuji Photo Film Co Ltd Synchronizing separator circuit

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