JPS51115775A - Semiconductor apparatus - Google Patents

Semiconductor apparatus

Info

Publication number
JPS51115775A
JPS51115775A JP4023675A JP4023675A JPS51115775A JP S51115775 A JPS51115775 A JP S51115775A JP 4023675 A JP4023675 A JP 4023675A JP 4023675 A JP4023675 A JP 4023675A JP S51115775 A JPS51115775 A JP S51115775A
Authority
JP
Japan
Prior art keywords
semiconductor apparatus
stability
low cost
lead frame
high reliability
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4023675A
Other languages
Japanese (ja)
Other versions
JPS5816339B2 (en
Inventor
Manabu Bonshihara
Tsuneo Shishido
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP4023675A priority Critical patent/JPS5816339B2/en
Publication of JPS51115775A publication Critical patent/JPS51115775A/en
Publication of JPS5816339B2 publication Critical patent/JPS5816339B2/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Abstract

PURPOSE: A semiconductor apparatus , which used a lead frame, which can be made with a low cost, also with high reliability and stability.
COPYRIGHT: (C)1976,JPO&Japio
JP4023675A 1975-04-04 1975-04-04 Hand tie souchi Expired JPS5816339B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4023675A JPS5816339B2 (en) 1975-04-04 1975-04-04 Hand tie souchi

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4023675A JPS5816339B2 (en) 1975-04-04 1975-04-04 Hand tie souchi

Publications (2)

Publication Number Publication Date
JPS51115775A true JPS51115775A (en) 1976-10-12
JPS5816339B2 JPS5816339B2 (en) 1983-03-30

Family

ID=12575076

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4023675A Expired JPS5816339B2 (en) 1975-04-04 1975-04-04 Hand tie souchi

Country Status (1)

Country Link
JP (1) JPS5816339B2 (en)

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS522171A (en) * 1975-06-24 1977-01-08 Hitachi Ltd Electronic parts
JPS57129229U (en) * 1981-02-06 1982-08-12
JPS5817649A (en) * 1981-07-24 1983-02-01 Fujitsu Ltd Package for electronic part
JPS58111958U (en) * 1982-01-21 1983-07-30 シャープ株式会社 Lead frame for semiconductor devices
JPS61258461A (en) * 1986-05-23 1986-11-15 Hitachi Ltd Electronic part
JPS63296346A (en) * 1987-05-28 1988-12-02 Hitachi Cable Ltd Film carrier for semiconductor device
JPH041504B2 (en) * 1986-05-23 1992-01-13 Hitachi Ltd
JPH10163519A (en) * 1996-10-01 1998-06-19 Toshiba Corp Semiconductor device and manufacture thereof
US6087712A (en) * 1997-12-26 2000-07-11 Samsung Aerospace Industries, Ltd. Lead frame containing leads plated with tin alloy for increased wettability and method for plating the leads
JP2018113351A (en) * 2017-01-12 2018-07-19 大口マテリアル株式会社 Lead frame and manufacturing method thereof

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS522171A (en) * 1975-06-24 1977-01-08 Hitachi Ltd Electronic parts
JPS5510140B2 (en) * 1975-06-24 1980-03-14
JPS57129229U (en) * 1981-02-06 1982-08-12
JPS6259892B2 (en) * 1981-07-24 1987-12-14 Fujitsu Ltd
JPS5817649A (en) * 1981-07-24 1983-02-01 Fujitsu Ltd Package for electronic part
JPS58111958U (en) * 1982-01-21 1983-07-30 シャープ株式会社 Lead frame for semiconductor devices
JPH0410699Y2 (en) * 1982-01-21 1992-03-17
JPS61258461A (en) * 1986-05-23 1986-11-15 Hitachi Ltd Electronic part
JPH041504B2 (en) * 1986-05-23 1992-01-13 Hitachi Ltd
JPS63296346A (en) * 1987-05-28 1988-12-02 Hitachi Cable Ltd Film carrier for semiconductor device
JPH10163519A (en) * 1996-10-01 1998-06-19 Toshiba Corp Semiconductor device and manufacture thereof
US6087712A (en) * 1997-12-26 2000-07-11 Samsung Aerospace Industries, Ltd. Lead frame containing leads plated with tin alloy for increased wettability and method for plating the leads
JP2018113351A (en) * 2017-01-12 2018-07-19 大口マテリアル株式会社 Lead frame and manufacturing method thereof

Also Published As

Publication number Publication date
JPS5816339B2 (en) 1983-03-30

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