JPH1154939A - Wiring board - Google Patents

Wiring board

Info

Publication number
JPH1154939A
JPH1154939A JP9206035A JP20603597A JPH1154939A JP H1154939 A JPH1154939 A JP H1154939A JP 9206035 A JP9206035 A JP 9206035A JP 20603597 A JP20603597 A JP 20603597A JP H1154939 A JPH1154939 A JP H1154939A
Authority
JP
Japan
Prior art keywords
heat
wiring board
heat transfer
insulating layer
transfer member
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9206035A
Other languages
Japanese (ja)
Other versions
JP3588230B2 (en
Inventor
Katsura Hayashi
桂 林
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP20603597A priority Critical patent/JP3588230B2/en
Publication of JPH1154939A publication Critical patent/JPH1154939A/en
Application granted granted Critical
Publication of JP3588230B2 publication Critical patent/JP3588230B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/49105—Connecting at different heights
    • H01L2224/49109—Connecting at different heights outside the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01019—Potassium [K]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1515—Shape
    • H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1517—Multilayer substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1532—Connection portion the connection portion being formed on the die mounting surface of the substrate

Abstract

PROBLEM TO BE SOLVED: To cool a heat generating electric element and, at the same time, to efficiently radiate the heat generated from the element, by burying a heat transferring layer composed of metal foil in an insulating substrate in the vicinity of the electric element. SOLUTION: A heat transferring member 9 made of a material having high thermal conductivity is buried in the bottom of a cavity 7 housing a heat generating element 6. The member 9 is buried in an insulating layer 2b formed as the bottom of the cavity 7, in an area where neither via-hole conductor 5 nor wiring circuit layer 4 are buried including such a place that the member 9 comes into contact with or faced to the element 6. When a wiring board is constituted in such a structure, the heat generated from the element 6 is diffused and made even throughout the wiring board and, at the same time, the stagnation of the heat in the element 6 can be prevented and the element 6 can be cooled.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【０００１】[0001]

【発明の属する技術分野】本発明は、例えば、ＭＰＵ等
の高消費電力のＬＳＩや、パワーＩＣ素子等を搭載した
半導体素子収納用パッケージや、抵抗素子などの発熱素
子を搭載したプリント配線基板の改良に関するものであ
る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high-power-consumption LSI such as an MPU, a package for storing a semiconductor element on which a power IC element and the like are mounted, and a printed circuit board on which a heating element such as a resistance element is mounted. It is about improvement.

【０００２】[0002]

【従来技術】従来より、電子機器は小型化が進んでいる
が、近年携帯情報端末の発達や、コンピューターを持ち
運んで操作する、いわゆるモバイルコンピューティング
の普及によってさらに小型、薄型且つ高精細の多層配線
基板が求められる傾向にある。2. Description of the Related Art Conventionally, electronic devices have been miniaturized. However, in recent years, with the development of portable information terminals and the spread of so-called mobile computing in which computers are carried and operated, so-called multi-layer wirings of smaller, thinner and higher definition have been developed. Substrates tend to be required.

【０００３】従来のプリント配線基板では、プリプレグ
と呼ばれる有機樹脂を含む平板の表面に銅箔を接着した
後、これをエッチングして微細な回路を形成し、これを
積層した後、所望位置にマイクロドリルでスルーホール
の穴明けを行い、そのホール内壁にメッキ法により金属
を付着させてスルーホール導体を形成して各層間の電気
的な接続を行っている。In a conventional printed wiring board, a copper foil is adhered to the surface of a flat plate containing an organic resin called a prepreg, and then etched to form a fine circuit. Through holes are drilled with a drill, metal is adhered to the inner walls of the holes by plating to form through-hole conductors, and electrical connection between the layers is performed.

【０００４】ところが、この方法では、スルーホール導
体は配線基板全体にわたり貫通したものであるために、
積層数が増加するに伴い、スルーホール数が増加する
と、配線に必要なスペースが確保できなくなるという問
題が生じ、電子機器の軽量、小型化に伴うプリント基板
の薄層化、小型化、軽量化に対しては、対応できないの
が現状である。However, in this method, since the through-hole conductor penetrates the entire wiring board,
As the number of stacked layers increases, the number of through-holes increases, making it impossible to secure the space required for wiring, and the thinning, miniaturization, and weight reduction of printed circuit boards accompanying the lightness and miniaturization of electronic devices. Can not respond to the current situation.

【０００５】そこで、最近では、絶縁層に対して形成し
たビアホール内に金属粉末を充填してビアホール導体を
形成した後、他の絶縁層を積層して多層化した配線基板
が提案されている。Therefore, recently, a wiring board has been proposed in which a via hole formed in an insulating layer is filled with metal powder to form a via-hole conductor, and then another insulating layer is laminated to form a multilayer.

【０００６】また、従来のプリント配線基板に対して、
半導体素子やコンデンサ素子、抵抗素子などを実装する
場合には、配線基板の表面に形成された配線回路層に対
してこれらの電気素子を半田等により実装し、実装した
素子を樹脂によってモールドする方法、絶縁基板の表面
に凹部を形成して、その凹部内に素子を収納して樹脂モ
ールドしたり、蓋体によって凹部を気密に封止する方法
がある。[0006] Further, with respect to a conventional printed wiring board,
When mounting semiconductor elements, capacitor elements, resistance elements, etc., these electric elements are mounted on the wiring circuit layer formed on the surface of the wiring board by soldering, etc., and the mounted elements are molded with resin. There is a method of forming a concave portion on the surface of an insulating substrate, housing the element in the concave portion and performing resin molding, or sealing the concave portion hermetically with a lid.

【０００７】また、これらの電気素子の中には、パワー
ＩＣ素子や抵抗素子など、作動時に発熱する素子も多
く、ＩＣ素子などにおいては、発生した熱によりＩＣ素
子が誤動作するなどの問題が生じるために、これら素子
自体の熱をいかに放散させて素子自体の温度を低下させ
るかが大きな課題となっている。Further, among these electric elements, there are many elements that generate heat during operation, such as power IC elements and resistance elements, and in the case of IC elements, there is a problem that the generated heat causes the IC elements to malfunction. Therefore, how to dissipate the heat of these elements themselves to lower the temperature of the elements themselves has become a major issue.

【０００８】このような素子から発生した熱を放散する
ための構造としては、例えば、半導体素子収納用パッケ
ージにおいては、図６に示すように、絶縁基板５１の表
面にＩＣ素子５２が実装され、このＩＣ素子５２と絶縁
基板５１内に形成された配線回路層５３とスルーホール
導体５４を介して絶縁基板５１の底面に形成された接続
端子５５と電気的に接続されている。そして、ＩＣ素子
５２には直に金属からなる放熱体５６が取付られてい
る。また、図７は、絶縁基板５７の表面に形成された配
線回路層５８とＴＡＢ接続されたＩＣ素子５９が絶縁基
板５７内に収納され、配線回路層５８に対して、接続端
子６０が取付られている。そして、絶縁基板５７の一方
の表面には放熱体６１が取り付けられている。As a structure for dissipating heat generated from such an element, for example, in a package for housing a semiconductor element, an IC element 52 is mounted on a surface of an insulating substrate 51 as shown in FIG. The IC element 52, a wiring circuit layer 53 formed in the insulating substrate 51, and a connection terminal 55 formed on the bottom surface of the insulating substrate 51 are electrically connected through a through-hole conductor 54. A heat radiator 56 made of metal is directly attached to the IC element 52. FIG. 7 shows that the IC element 59 TAB-connected to the wiring circuit layer 58 formed on the surface of the insulating substrate 57 is housed in the insulating substrate 57, and the connection terminal 60 is attached to the wiring circuit layer 58. ing. A heat radiator 61 is attached to one surface of the insulating substrate 57.

【０００９】[0009]

【発明が解決しようとする課題】しかしながら、従来の
図６や図７に示したような放熱構造においては、素子を
搭載する配線基板自体が放熱体を配線基板の少なくとも
一方の表面に接合するために必然的に嵩高くなり、小型
の電子機器に搭載するのが困難である。しかも、パッケ
ージの一方の面に放熱体が取り付けられるために、電気
素子などの高密度実装化、多素子化が難しく、素子の多
ピン化にも対応できないという問題があった。However, in the conventional heat dissipation structure as shown in FIGS. 6 and 7, the wiring board itself on which the elements are mounted joins the heat sink to at least one surface of the wiring board. Inevitably, it becomes bulky, and it is difficult to mount it on a small electronic device. In addition, since the heat radiator is attached to one surface of the package, it is difficult to increase the density of the electrical elements and the like and increase the number of elements, and there is a problem that the number of pins of the elements cannot be increased.

【００１０】また、ビアホール導体を金属粉末の充填に
よって形成する方法は、ビアホール導体の小径化が可能
であるとともに、任意の位置に配設できる点で配線基板
の小型化に対しては有効であるが、配線基板をより多層
化したとしても、その配線基板に搭載する素子は、配線
基板の表面にしか実装することができないために、配線
基板の小型化には自ずと限界があった。The method of forming the via-hole conductor by filling the metal powder is effective in reducing the size of the wiring board in that the diameter of the via-hole conductor can be reduced and the via-hole conductor can be arranged at an arbitrary position. However, even if the wiring board is further multi-layered, the elements mounted on the wiring board can be mounted only on the surface of the wiring board, and therefore there is a natural limitation in reducing the size of the wiring board.

【００１１】従って、本発明は、半導体素子や抵抗素子
などの発熱素子を搭載する多層配線基板において、発熱
素子を冷却するとともに、発生した熱を効率的に放散す
ることのできる配線基板を提供することを目的とするも
のである。さらに、本発明は、配線基板に対して多くの
素子を搭載することができるとともに、それらの素子か
らの発生する熱を素子の実装密度を下げることなく、放
散させることのできる配線基板を提供することを目的と
するものである。Accordingly, the present invention provides a multilayer wiring board on which a heating element such as a semiconductor element or a resistance element is mounted, which can cool the heating element and efficiently dissipate generated heat. The purpose is to do so. Further, the present invention provides a wiring board capable of mounting many elements on the wiring board and dissipating heat generated from those elements without lowering the mounting density of the elements. The purpose is to do so.

【００１２】[0012]

【課題を解決するための手段】本発明者らは、熱硬化性
樹脂を含有する絶縁基板の表面および／または内部に配
線回路層を被着形成し、絶縁基板の表面および／または
内部に電気素子を搭載した配線基板に対して、電気素子
の実装密度を下げることなく、発熱性電気素子の温度を
低減できる構造について検討を重ねた結果、発熱性電気
素子近傍の絶縁基板内部に金属箔からなる伝熱層を埋設
することにより、電気素子から発生した熱を伝熱層によ
り配線基板全体に拡散させて均熱化させることができ、
これにより素子の温度を低下させることができることを
見いだし、本発明に至った。Means for Solving the Problems The present inventors apply a wiring circuit layer on the surface and / or inside of an insulating substrate containing a thermosetting resin, and form an electric circuit on the surface and / or inside of the insulating substrate. After examining a structure that can reduce the temperature of the heat-generating electric element on the wiring board on which the element is mounted without lowering the mounting density of the electric element, the metal foil was placed inside the insulating substrate near the heat-generating electric element. By burying the heat transfer layer, the heat generated from the electric element can be diffused by the heat transfer layer over the entire wiring substrate and uniformized,
As a result, the inventors have found that the temperature of the element can be reduced, and have reached the present invention.

【００１３】即ち、本発明の配線基板は、少なくとも熱
硬化性樹脂を含む複数の絶縁層を積層してなる絶縁基板
と、該絶縁基板の表面および／または内部に形成された
配線回路層とを具備するとともに、前記絶縁基板の表面
および／または内部に発熱性電気素子を搭載してなる多
層配線基板において、前記発熱性電気素子近傍の前記絶
縁基板内部に伝熱部材を埋設したことを特徴とするもの
である。特に、前記伝熱層を、前記配線基板のほぼ全面
に形成したこと、前記伝熱層の端部を、前記絶縁基板の
側面から露出または突出させて放熱性を高めること、前
記電気素子が、前記絶縁基板内に設けられた空隙部にて
実装収納されてなること、さらには、前記発熱性電気素
子が、ＩＣ素子、抵抗素子、コンデンサ、発振子、フィ
ルターの群から選ばれる１種であることを特徴とするの
である。That is, the wiring board of the present invention comprises an insulating substrate formed by laminating a plurality of insulating layers containing at least a thermosetting resin, and a wiring circuit layer formed on the surface and / or inside the insulating substrate. A multi-layer wiring board having a heat-generating electric element mounted on the surface and / or inside of the insulating substrate, wherein a heat transfer member is buried inside the insulating substrate near the heat-generating electric element. Is what you do. In particular, the heat transfer layer is formed over substantially the entire surface of the wiring board, and an end of the heat transfer layer is exposed or protruded from a side surface of the insulating substrate to increase heat dissipation. The heat-generating electric element is one kind selected from the group consisting of an IC element, a resistance element, a capacitor, an oscillator, and a filter, wherein the heat-generating electric element is mounted and accommodated in a gap provided in the insulating substrate. It is characterized by the following.

【００１４】本発明の配線基板によれば、伝熱部材を、
発熱性の電気素子（以下、発熱素子という。）が搭載さ
れた近傍の絶縁基板内に埋設したことにより、発熱素子
から発生した熱を均熱層を介して、配線基板全体に均熱
化させることができる結果、電気素子の発生熱により熱
の淀みを解消し、発熱素子の温度を低下させることがで
きる。また、この均熱層の端部を配線基板の側面から露
出させることにより、発熱素子から発生した熱を均熱層
を介して、基板外に放熱することができる。According to the wiring board of the present invention, the heat transfer member is
By burying in the insulating substrate near the mounting of the heat-generating electric element (hereinafter referred to as the heat-generating element), the heat generated from the heat-generating element is equalized over the entire wiring board through the heat equalizing layer. As a result, heat stagnation due to the heat generated by the electric element can be eliminated, and the temperature of the heating element can be reduced. Further, by exposing the end portion of the heat equalizing layer from the side surface of the wiring board, heat generated from the heating element can be radiated to the outside of the substrate via the heat equalizing layer.

【００１５】本発明によれば、電気素子を絶縁基板内部
に設けた空隙内にて実装させることにより、配線基板の
表面のみならず、基板内部に電気素子を搭載することが
できる結果、配線基板の多素子実装化、高密度実装化が
可能となるとともに、それらの電気素子に対して、個々
に均熱層を形成することにより、発生した熱の均熱化と
放熱性を高めることができる。According to the present invention, by mounting the electric element in the space provided inside the insulating substrate, the electric element can be mounted not only on the surface of the wiring board but also inside the substrate. In addition to being able to mount multiple elements and high density mounting, it is possible to improve the uniformity of the generated heat and the heat dissipation by forming a uniform soaking layer for each of these electric elements. .

【００１６】[0016]

【発明の実施の形態】以下、本発明を図面をもとに説明
する。図１は、本発明の配線基板のうち、電気素子を配
線基板の表面に実装したタイプの配線基板に適用した場
合の基本的な構造を説明するための要部切り欠き斜視図
である。図１によれば、配線基板１は、少なくとも熱硬
化性樹脂を含む複数の絶縁層２ａ，２ｂ、２ｃおよび２
ｄを積層してなる絶縁基板３の表面および内部に配線回
路層４が形成され、さらに、絶縁基板３内には異なる層
間の配線回路層を接続するためのビアホール導体５を具
備する。そして、図１の配線基板によれば、絶縁基板３
の表面には、発熱素子６を収納するためのキャビティ７
が設けられ、絶縁基板３の表面に形成された配線回路層
４とワイヤーボンディング８等により電気的に接続され
ている。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to the drawings. FIG. 1 is a cutaway perspective view of a main part for explaining a basic structure when applied to a wiring board of a type in which an electric element is mounted on a surface of the wiring board, among wiring boards of the present invention. According to FIG. 1, the wiring board 1 includes a plurality of insulating layers 2a, 2b, 2c and 2 including at least a thermosetting resin.
The wiring circuit layer 4 is formed on the surface and inside of the insulating substrate 3 formed by laminating d, and the insulating substrate 3 further includes a via-hole conductor 5 for connecting the wiring circuit layers between different layers. According to the wiring board of FIG.
A cavity 7 for accommodating the heating element 6 is provided on the surface of the
Are provided, and are electrically connected to the wiring circuit layer 4 formed on the surface of the insulating substrate 3 by wire bonding 8 or the like.

【００１７】また、発熱素子６が収納されたキャビティ
７の底面には、高熱伝導性材料からなる伝熱部材９が埋
設されている。この伝熱部材９は、図１に示すように、
キャビティ７の底面を形成する絶縁層２ｂの表面の発熱
素子６の近傍、即ち、発熱素子６と接触するか、または
発熱素子６と対面する場所を含め、ビアホール導体５や
配線回路層４が設けられていない領域に伝熱部材９が埋
設されている。A heat transfer member 9 made of a highly heat-conductive material is embedded in the bottom of the cavity 7 in which the heating element 6 is housed. This heat transfer member 9 is, as shown in FIG.
The via-hole conductor 5 and the wiring circuit layer 4 are provided in the vicinity of the heating element 6 on the surface of the insulating layer 2 b forming the bottom surface of the cavity 7, that is, at the place where the heating element 6 is in contact with or faces the heating element 6. The heat transfer member 9 is buried in an area that is not provided.

【００１８】このような構造において、発熱素子６から
発生した熱は、伝熱部材９によって、配線基板全体に拡
散され、均熱化されると同時に、発熱素子６での熱の淀
みを防止し、発熱素子６を冷却することができる。な
お、この伝熱部材９は、配線基板の表面で埋設すると、
配線基板の表面での回路設計が大きく制約されるため
に、絶縁基板の内部に埋設されることが必要である。In such a structure, the heat generated from the heat generating element 6 is diffused by the heat transfer member 9 to the entire wiring board, so that the heat is uniformed, and at the same time, stagnation of the heat in the heat generating element 6 is prevented. Thus, the heating element 6 can be cooled. When the heat transfer member 9 is embedded on the surface of the wiring board,
Since the circuit design on the surface of the wiring board is greatly restricted, it is necessary to bury the wiring board inside the insulating substrate.

【００１９】また、伝熱部材９の端部は、配線基板１の
側面に露出しているか、あるいは図１の端部１０のよう
に、配線基板１の側面から突出させることが望ましい。
このように、伝熱部材９の端部を配線基板１の側面から
露出または突出させることにより、伝熱部材９の伝達さ
れた熱が、伝熱部材９の露出面、または端部１０の突出
部１２から熱を放散することができる。なお、この場
合、伝熱部材９の突出部１１は、放熱フィンなどの他の
放熱部材（図示せず）と熱的に接続して、さらに放熱性
を高めることもできる。It is desirable that the end of the heat transfer member 9 is exposed on the side surface of the wiring board 1 or protrudes from the side surface of the wiring board 1 like the end 10 in FIG.
By exposing or projecting the end of the heat transfer member 9 from the side surface of the wiring board 1 as described above, the heat transmitted from the heat transfer member 9 is transferred to the exposed surface of the heat transfer member 9 or the protrusion of the end 10. Heat can be dissipated from the part 12. In this case, the projecting portion 11 of the heat transfer member 9 can be thermally connected to another heat radiating member (not shown) such as a heat radiating fin to further enhance heat radiation.

【００２０】図１に示した配線基板は、例えば、以下の
方法によって作製される。まず、図２（ａ）に示すよう
に、熱硬化性樹脂を含有する非硬化または半硬化の軟質
状態の絶縁層２ａにビアホールを形成して、その内部に
金属粉末を含有する導体ペーストを充填してビアホール
導体５ａを形成する。それと同時に、半導体素子６を収
納するためのキャビティ７をパンチング等により形成す
る。また、絶縁層２ａの所定箇所に配線回路層４ａを被
着形成する。配線回路層４ａは、１）絶縁層の表面に金
属箔を貼り付けた後、エッチング処理して回路パターン
を形成する方法、２）絶縁層表面にレジストを形成し
て、メッキにより形成する方法、３）転写フィルム表面
に金属箔を貼り付け、金属箔をエッチング処理して配線
回路層を形成した後、この金属箔からなる配線回路層を
絶縁層表面に転写させる方法等により形成することがで
きる。The wiring board shown in FIG. 1 is manufactured, for example, by the following method. First, as shown in FIG. 2A, via holes are formed in an uncured or semi-cured soft insulating layer 2a containing a thermosetting resin, and the inside thereof is filled with a conductive paste containing a metal powder. As a result, a via-hole conductor 5a is formed. At the same time, a cavity 7 for accommodating the semiconductor element 6 is formed by punching or the like. Further, the wiring circuit layer 4a is formed on a predetermined portion of the insulating layer 2a. The wiring circuit layer 4a includes: 1) a method of forming a circuit pattern by attaching a metal foil to the surface of the insulating layer and then performing an etching process; 2) a method of forming a resist on the surface of the insulating layer and plating. 3) After attaching a metal foil to the surface of the transfer film and etching the metal foil to form a wiring circuit layer, the wiring circuit layer made of the metal foil can be transferred to the surface of the insulating layer. .

【００２１】また、同様に図２（ｂ）に軟質状態の絶縁
層２ｂに対して、絶縁層２ａと同様に、所定箇所にビア
ホール導体を５ｂおよび配線回路層４ｂを形成する。そ
して、絶縁層２ｂのキャビティ７の底面を形成する箇所
に伝熱部材９を埋設する。伝熱部材９の埋設は、軟質状
態の絶縁層２ｂに対して、伝熱部材９を圧着して強制的
に埋め込むか、または伝熱部材９の厚みが厚い場合に
は、絶縁層２ｂの所定箇所に凹部を形成して、その凹部
内に、伝熱部材９を嵌め込む。凹部の形成は、軟質の絶
縁層２ａ’の表面を加工するか、または型材にスラリー
を流して形成すればよい。また、絶縁層２ｂ’には、絶
縁層２ａと同様に、所定箇所にビアホール導体５および
配線回路層４を形成する。Similarly, for the insulating layer 2b in the soft state shown in FIG. 2B, a via hole conductor 5b and a wiring circuit layer 4b are formed at predetermined locations in the same manner as the insulating layer 2a. Then, the heat transfer member 9 is buried in a portion of the insulating layer 2b where the bottom surface of the cavity 7 is formed. The heat transfer member 9 may be buried by pressing the heat transfer member 9 into the soft insulating layer 2b by force, or when the heat transfer member 9 is thick, the insulating layer 2b may be buried. A concave portion is formed at a location, and the heat transfer member 9 is fitted into the concave portion. The concave portion may be formed by processing the surface of the soft insulating layer 2a 'or by flowing a slurry through a mold. Further, the via-hole conductor 5 and the wiring circuit layer 4 are formed at predetermined locations on the insulating layer 2b ', similarly to the insulating layer 2a.

【００２２】さらに、上記の絶縁層２ａ、２ｂと同様
に、図２（ｃ）（ｄ）に示すように、軟質状態の絶縁層
２ｃおよび絶縁層２ｄに対しても、ビアホール導体５
ｃ，５ｄと配線回路層４ｃ、５ｃを形成する。Further, as shown in FIGS. 2 (c) and 2 (d), the via-hole conductor 5 is applied to the insulating layers 2c and 2d in the soft state, similarly to the insulating layers 2a and 2b.
c, 5d and the wiring circuit layers 4c, 5c are formed.

【００２３】そして、これら絶縁層２ａ、２ｂ、２ｃお
よび２ｄを位置合わせして積層圧着した後、熱硬化性樹
脂が完全硬化するに十分な温度で加熱して多層配線基板
を作製する。そして、その基板のキャビティ７内の伝熱
部材９の表面に半導体素子６を接着して、絶縁基板３表
面の配線回路層４とワイヤボンディング等により接続す
ることにより、半導体素子６を表面に搭載した図１の配
線基板を作製することができる。なお、キャビティ７内
の発熱素子６は、所望によりエポキシ樹脂等の封止樹脂
で封止してもよい。After the insulating layers 2a, 2b, 2c, and 2d are aligned and laminated and pressed, the multilayer wiring board is manufactured by heating at a temperature sufficient to completely cure the thermosetting resin. Then, the semiconductor element 6 is adhered to the surface of the heat transfer member 9 in the cavity 7 of the substrate, and connected to the wiring circuit layer 4 on the surface of the insulating substrate 3 by wire bonding or the like, thereby mounting the semiconductor element 6 on the surface. 1 can be manufactured. Note that the heating element 6 in the cavity 7 may be sealed with a sealing resin such as an epoxy resin if desired.

【００２４】次に、図３は、本発明の配線基板のうち、
電気素子を配線基板の内部に実装したタイプの配線基板
に適用した場合の基本的な構造を説明するための要部切
り欠き斜視図である。図３によれば、配線基板２１は、
少なくとも熱硬化性樹脂を含む複数の絶縁層２２ａ，２
２ｂ、２２ｃ、２２ｄ、２２ｅを積層してなる絶縁基板
２３の表面および内部に配線回路層２４が形成され、さ
らに、絶縁基板２３内には異なる層間の配線回路層を接
続するためのビアホール導体２５を具備する。FIG. 3 shows a wiring board according to the present invention.
FIG. 9 is a perspective view, partially cut away, for explaining a basic structure when an electric element is applied to a wiring board of a type in which the electric element is mounted inside the wiring board. According to FIG. 3, the wiring board 21 is
Plural insulating layers 22a, 2 containing at least thermosetting resin
A wiring circuit layer 24 is formed on the surface and inside of an insulating substrate 23 formed by laminating 2b, 22c, 22d and 22e, and a via hole conductor 25 for connecting wiring circuit layers between different layers is formed in the insulating substrate 23. Is provided.

【００２５】そして、絶縁基板２３の内部には、発熱素
子２６を収納するための空隙部２７が設けられ、空隙部
２７内の絶縁層２２ａの表面に形成された配線回路層２
４ａと電気的に接続されている。A gap 27 for accommodating the heating element 26 is provided inside the insulating substrate 23, and the wiring circuit layer 2 formed on the surface of the insulating layer 22 a in the gap 27 is provided.
4a.

【００２６】図３の配線基板２１によれば、発熱素子２
６が収納された空隙部２７に面した絶縁層２２ｃの表面
には、金属からなる伝熱部材２９が埋設されている。こ
の伝熱部材２９は、絶縁層２２ｃのビアホール導体２５
や配線回路層２４が設けられていない領域に埋設されて
いる。According to the wiring board 21 shown in FIG.
A heat transfer member 29 made of metal is buried in the surface of the insulating layer 22c facing the gap portion 27 in which 6 is accommodated. The heat transfer member 29 is formed by the via-hole conductor 25 of the insulating layer 22c.
Buried in a region where the wiring circuit layer 24 is not provided.

【００２７】このような構造において、発熱素子２６か
ら発生した熱は、伝熱部材２９によって、配線基板全体
に拡散され、均熱化されると同時に、発熱素子２６での
熱の淀みを防止し、発熱素子２６を冷却することができ
る。In such a structure, the heat generated from the heating element 26 is diffused and uniformized by the heat transfer member 29 over the entire wiring board, and at the same time, the stagnation of the heat in the heating element 26 is prevented. , The heating element 26 can be cooled.

【００２８】また、伝熱部材２９の端部３０は、配線基
板２１の側面に露出しているか、あるいは図３の端部３
０のように、配線基板２１の側面から突出させることが
望ましい。このように、伝熱部材２９の端部を配線基板
２１の側面から露出または突出させることにより、伝熱
部材２９の伝達された熱が、伝熱部材２９の端部の露出
面、または端部３０の突出部３２から熱を放散すること
ができる。なお、この場合、伝熱部材２９の突出部３２
は、放熱フィンなどの他の放熱部材（図示せず）と熱的
に接続して、さらに放熱性を高めることもできる。The end 30 of the heat transfer member 29 is exposed on the side surface of the wiring board 21 or the end 30 of FIG.
It is desirable to protrude from the side surface of the wiring board 21 like 0. By exposing or projecting the end of the heat transfer member 29 from the side surface of the wiring board 21 in this manner, the heat transmitted from the heat transfer member 29 is transferred to the exposed surface of the end of the heat transfer member 29 or the end of the heat transfer member 29. The heat can be dissipated from the protrusions 32 of the 30. In this case, the protrusion 32 of the heat transfer member 29
Can be thermally connected to another heat dissipating member (not shown) such as a heat dissipating fin to further enhance heat dissipation.

【００２９】図３の配線基板２１は、例えば、図４に示
されるような工程によって作製される。まず、図４
（ａ）に示すように、熱硬化性樹脂を含む非硬化または
半硬化した軟質状態の絶縁層２２ａに、所望により厚み
方向に貫通するビアホールを形成し、そのビアホール内
に金属粉末を含む導体ペーストをスクリーン印刷や吸引
処理しながら充填して、ビアホール導体２５ａを形成す
る。また、この絶縁層３３の所定箇所に空隙部３５を形
成する。The wiring board 21 shown in FIG. 3 is manufactured, for example, by the steps shown in FIG. First, FIG.
As shown in (a), via holes are formed in the non-cured or semi-cured soft insulating layer 22a containing a thermosetting resin, if necessary, in the thickness direction, and a conductive paste containing metal powder in the via holes is provided. Is filled while performing screen printing or suction processing to form a via-hole conductor 25a. In addition, a void 35 is formed at a predetermined position of the insulating layer 33.

【００３０】配線回路層２４ａは、１）絶縁層の表面に
金属箔を貼り付けた後、エッチング処理して回路パター
ンを形成する方法、２）絶縁層表面にレジストを形成し
て、メッキにより形成する方法、３）転写フィルム表面
に金属箔を貼り付け、金属箔をエッチング処理して回路
パターンを形成した後、この金属箔からなる回路パター
ンを絶縁層表面に転写させる方法等が挙げられる。The wiring circuit layer 24a is formed by: 1) a method of forming a circuit pattern by attaching a metal foil to the surface of the insulating layer and then performing an etching process; and 2) forming a resist on the surface of the insulating layer and forming it by plating. 3) a method of attaching a metal foil to the surface of the transfer film, etching the metal foil to form a circuit pattern, and then transferring the circuit pattern made of the metal foil to the surface of the insulating layer.

【００３１】また、図４（ｂ）に示すように、絶縁層２
２ａと同様にして、軟質状態の絶縁層２２ａに対してビ
アホール導体２５ｂを形成するとともに、所定箇所に空
隙部２７を形成する。そして、絶縁層２２ｂの表面に配
線回路層２４ｂを形成するとともに、絶縁層２２ｂの空
隙部２７にて発熱素子２６を実装収納する。Further, as shown in FIG.
Similarly to 2a, a via hole conductor 25b is formed in the soft insulating layer 22a, and a void 27 is formed in a predetermined location. Then, the wiring circuit layer 24b is formed on the surface of the insulating layer 22b, and the heating element 26 is mounted and accommodated in the gap 27 of the insulating layer 22b.

【００３２】発熱素子２６の配線回路層２４ｂへの実装
方法としては、図４（ｂ１）に示すように、転写フィル
ム３３の表面に予め配線回路層２４Ａを形成した-5、そ
の配線回路層２４ｂに対して発熱素子２６を半田、ＴＡ
Ｂ，ワイヤ−ボンディング等により実装する。その後、
配線回路層２４ｂと発熱素子２６が実装された転写フィ
ルム３３を絶縁層２２ｂに積層して転写フィルム３３の
みを剥がすことにより配線回路層２４ｂと発熱素子２６
を絶縁層２２ｂに転写させることができる。[0032] Mounting of the wiring circuit layer 24b of the heating element 26, as shown in FIG. 4 (b1), -5 forming a pre-wiring circuit layer 24A to the surface of the transfer film 33, the wiring circuit layer 24b To the heating element 26, TA
B, mounting by wire bonding or the like. afterwards,
The transfer film 33 on which the wiring circuit layer 24b and the heating element 26 are mounted is laminated on the insulating layer 22b, and only the transfer film 33 is peeled off.
Can be transferred to the insulating layer 22b.

【００３３】また、上記の例では、基本的には、発熱素
子２６を実装する配線回路層２４ｂは発熱素子２６とと
もに、同時に転写させるものであるが、発熱素子２６の
実装に関与しない配線回路層（図示せず）は、発熱素子
２６と配線回路層２４ｂとともに同時するか、または個
別に前述した１）〜３）のいずれの方法で形成してもよ
い。また、空隙部２７内に収納された発熱素子２６は、
配線回路層２４ｂに実装された状態でエポキシ樹脂等に
より封止してもよい。In the above example, basically, the wiring circuit layer 24b on which the heating element 26 is mounted is simultaneously transferred with the heating element 26, but the wiring circuit layer 24b which is not involved in the mounting of the heating element 26 is provided. (Not shown) may be formed simultaneously with the heating element 26 and the wiring circuit layer 24b, or individually by any of the above-described methods 1) to 3). In addition, the heating element 26 housed in the cavity 27 is
It may be sealed with an epoxy resin or the like while being mounted on the wiring circuit layer 24b.

【００３４】また、軟質状態の絶縁層２２ｃに前記と同
様にしてビアホール導体２５ｃを形成すると同時に、絶
縁層２２ｃの空隙部２７に対面する箇所に伝熱部材２９
を埋設する。伝熱部材２９の埋設は、前記図２（ｂ）で
説明したのと同様な方法により行われる。Further, the via-hole conductor 25c is formed on the soft insulating layer 22c in the same manner as described above, and at the same time, the heat transfer member 29 is formed on the insulating layer 22c at a position facing the void 27.
Buried. The embedding of the heat transfer member 29 is performed by a method similar to that described with reference to FIG.

【００３５】さらに、軟質状態の絶縁層２２ｄおよび絶
縁層２２ｅに対して、上記と同様な方法で配線回路層２
４ｄ，２４ｅやビアホール導体２５ｄ、２５ｅを形成す
る。Further, the insulating layer 22d and the insulating layer 22e in the soft state are applied to the wiring circuit layer 2 in the same manner as described above.
4d and 24e and via-hole conductors 25d and 25e are formed.

【００３６】そして、上記のようにして作製した各軟質
状態の絶縁層２２ａ、２２ｂ、２２ｃ、２２ｄ，２２ｅ
を位置合わせして積層圧着した後に、絶縁層２２ａ〜２
２ｅ中の熱硬化性樹脂が硬化するに十分な温度に加熱し
て一括して完全硬化させることにより、図３に示したよ
うな発熱素子２６を内蔵するとともに、その発熱素子３
２６の近傍の絶縁基板２２内に伝熱部材２９を埋設した
配線基板を作製することができる。また、この配線基板
の表面には、他の電子部品を搭載することができる。Then, the insulating layers 22a, 22b, 22c, 22d, and 22e in the respective soft states produced as described above.
Are aligned and laminated and pressure-bonded, the insulating layers 22a to 22a-2
By heating to a temperature sufficient to cure the thermosetting resin in 2e and performing complete curing at once, the heating element 26 as shown in FIG.
A wiring board in which the heat transfer member 29 is embedded in the insulating substrate 22 in the vicinity of 26 can be manufactured. Further, other electronic components can be mounted on the surface of the wiring board.

【００３７】また、本発明によれば、上記の発熱素子の
絶縁基板内に形成した空隙部内への実装収納構造と伝熱
部材の埋設方法を基礎として、あらゆる形態の多層配線
基板を作製することができ、図３、図４で説明した空隙
部を有する絶縁層と、伝熱部材を埋設した絶縁層との積
層技術によって、例えば、図５に示すように、多層配線
基板の絶縁基板３４内において、ＩＣ素子３５や抵抗素
子３６等のなどの発熱素子を収納する空隙部３７，３８
を同一面内、または異なる層内に形成して、これら複数
の発熱素子を実装収納させることができる。そして、各
発熱素子３５、３６に対して伝熱部材３９、４０、４１
を埋設することにより、個々の発熱素子に対して、発生
した熱を基板全体に均熱化することができ、伝熱部材３
９、４０、４１を基板側面から突出させることによりさ
らに熱の放散性を高めることができる。その結果、配線
基板における素子の高密度実装化と、小型化を実現しつ
つ、発熱素子の冷却を行うことのできる多層配線基板を
得ることができる。なお、図５の実施例によれば、基板
の表面にも電子部品を搭載することができる。Further, according to the present invention, it is possible to manufacture a multilayer wiring board of any form based on the above-described mounting structure of the heating element in the void formed in the insulating substrate and the method of embedding the heat transfer member. According to the lamination technique of the insulating layer having the voids described in FIGS. 3 and 4 and the insulating layer in which the heat transfer member is embedded, for example, as shown in FIG. In the above, the gaps 37 and 38 for accommodating the heating elements such as the IC element 35 and the resistance element 36 are provided.
Are formed in the same plane or in different layers, and the plurality of heating elements can be mounted and housed. Then, the heat transfer members 39, 40, 41 are provided for the respective heating elements 35, 36.
, The generated heat can be uniformed over the entire substrate with respect to the individual heating elements, and the heat transfer member 3
By projecting 9, 40, and 41 from the side of the substrate, the heat dissipation can be further enhanced. As a result, it is possible to obtain a multilayer wiring board capable of cooling the heating elements while realizing high-density mounting and miniaturization of elements on the wiring board. According to the embodiment of FIG. 5, electronic components can be mounted on the surface of the substrate.

【００３８】本発明において、基板内に埋設される伝熱
部材は、熱伝導性に優れた金属やセラミックスが良好に
使用できる。金属としては銅、アルミニウムまたはその
合金が適している。セラミックでは窒化アルミニウム、
炭化珪素が良好に用いられるが、加工性の点からは銅や
アルミニウムが最適である。この伝熱部材の厚さは５０
μｍ以上、望ましくは１００μｍ以上がよい。伝熱部材
の厚みが５０μｍ未満でも均熱性および放熱性は改善で
きるが、伝熱部材としての取り扱いが難しくなり、製造
上の困難が伴う。厚さの上限は特に限定されないが、小
型軽量の機器に使用するためには１ｍｍ以下、望ましく
は０．５ｍｍ以下が良い。最適には厚さ０．１〜０．３
ｍｍである。パワーアンプ用としてはさらに厚いものが
好適であり、０．５〜５ｍｍ程度のものが使用でき，最
適には０．５〜２ｍｍが良い。In the present invention, as the heat transfer member embedded in the substrate, a metal or ceramic having excellent heat conductivity can be used favorably. As the metal, copper, aluminum or an alloy thereof is suitable. Aluminum nitride for ceramics,
Silicon carbide is preferably used, but copper and aluminum are most suitable from the viewpoint of workability. The thickness of this heat transfer member is 50
μm or more, preferably 100 μm or more. Even if the thickness of the heat transfer member is less than 50 μm, the heat uniformity and heat dissipation can be improved, but handling as the heat transfer member becomes difficult, and there is a difficulty in manufacturing. The upper limit of the thickness is not particularly limited, but is preferably 1 mm or less, and more preferably 0.5 mm or less for use in small and lightweight equipment. Optimally thickness 0.1-0.3
mm. A thicker one is suitable for a power amplifier, and one having a thickness of about 0.5 to 5 mm can be used, and most preferably 0.5 to 2 mm.

【００３９】また、この伝熱部材は必要によりグランド
（接地）等の配線層を兼ねることができる。この場合、
伝熱部材に直結する形でビアホール導体を形成すればよ
い。The heat transfer member can also serve as a wiring layer such as a ground (ground) if necessary. in this case,
The via-hole conductor may be formed so as to be directly connected to the heat transfer member.

【００４０】その場合、伝熱部材表面の酸化膜や油脂等
の汚れをあらかじめエッチング等により除去しておくこ
とにより、ビアホール導体との接触抵抗が増大し、接続
部から発熱するのを防止することができる。In this case, by removing contamination such as an oxide film and oils and fats on the surface of the heat transfer member in advance by etching or the like, the contact resistance with the via-hole conductor is increased, thereby preventing heat generation from the connection portion. Can be.

【００４１】なお、図２および図４で説明した製造方法
において、用いられる熱硬化性樹脂を含有する絶縁層
は、熱硬化性有機樹脂、または熱硬化性有機樹脂とフィ
ラーなどの組成物を混練機や３本ロールなどの手段によ
って十分に混合し、これを圧延法、押し出し法、射出
法、ドクターブレード法などによってシート状に成形す
る。そして、所望により熱処理して熱硬化性樹脂を半硬
化させる。半硬化には、樹脂が完全硬化するに十分な温
度よりもやや低い温度に加熱する。In the manufacturing method described with reference to FIGS. 2 and 4, the insulating layer containing the thermosetting resin used is formed by kneading a thermosetting organic resin or a composition such as a thermosetting organic resin and a filler. The mixture is sufficiently mixed by means such as a mill or a three-roll mill and formed into a sheet by a rolling method, an extrusion method, an injection method, a doctor blade method, or the like. Then, the thermosetting resin is semi-cured by heat treatment if desired. For semi-curing, the resin is heated to a temperature slightly lower than a temperature sufficient to completely cure the resin.

【００４２】そして、この絶縁層に対してビアホール、
空隙部の形成は、ドリル、パンチング、サンドブラス
ト、あるいは炭酸ガスレーザ、ＹＡＧレーザ、及びエキ
シマレーザ等の照射による加工など公知の方法が採用さ
れる。Then, via holes are formed in the insulating layer.
A well-known method such as drilling, punching, sandblasting, or processing by irradiation with a carbon dioxide gas laser, a YAG laser, an excimer laser, or the like is used to form the gap.

【００４３】なお、絶縁層を形成する熱硬化性樹脂とし
ては、絶縁材料としての電気的特性、耐熱性、および機
械的強度を有する熱硬化性樹脂であれば特に限定される
ものでなく、例えば、アラミド樹脂、フェノール樹脂、
エポキシ樹脂、イミド樹脂、フッ素樹脂、フェニレンエ
ーテル樹脂、ビスマイレイドトリアジン樹脂、ユリア樹
脂、メラミン樹脂、シリコーン樹脂、ウレタン樹脂、不
飽和ポリエステル樹脂、アリル樹脂等が、単独または組
み合わせて使用できる。The thermosetting resin forming the insulating layer is not particularly limited as long as it is a thermosetting resin having electrical properties, heat resistance and mechanical strength as an insulating material. , Aramid resin, phenolic resin,
Epoxy resins, imide resins, fluororesins, phenylene ether resins, bismaleide triazine resins, urea resins, melamine resins, silicone resins, urethane resins, unsaturated polyester resins, allyl resins and the like can be used alone or in combination.

【００４４】また、上記の絶縁層には、絶縁基板あるい
は配線基板全体の強度を高めるために、有機樹脂に対し
てフィラーを複合化させることもできる。有機樹脂と複
合化されるフィラーとしては、ＳｉＯ2 、Ａｌ2 Ｏ3 、
ＺｒＯ2 、ＴｉＯ2 、ＡｌＮ、ＳｉＣ、ＢａＴｉＯ3 、
ＳｒＴｉＯ3 、ゼオライト、ＣａＴｉＯ3 、ほう酸アル
ミニウム等の無機質フィラーが好適に用いられる。ま
た、ガラスやアラミド樹脂からなる不織布、織布などに
上記樹脂を含浸させて用いてもよい。なお、有機樹脂と
フィラーとは、体積比率で１５：８５〜５０：５０の比
率で複合化されるのが適当である。In addition, a filler can be compounded with an organic resin in the insulating layer in order to increase the strength of the entire insulating substrate or wiring substrate. As the filler to be combined with the organic resin, SiO 2 , Al 2 O 3 ,
ZrO 2 , TiO 2 , AlN, SiC, BaTiO 3 ,
Inorganic fillers such as SrTiO 3 , zeolite, CaTiO 3 and aluminum borate are preferably used. Further, a nonwoven fabric or a woven fabric made of glass or aramid resin may be used by impregnating the above resin. The organic resin and the filler are preferably compounded in a volume ratio of 15:85 to 50:50.

【００４５】これらの発熱素子を収納するための空隙部
を形成する絶縁層は、上記の種々の材質の中でも空隙部
をパンチング又はレーザーで容易に加工できる点から、
エポキシ樹脂、イミド樹脂、フェニレンエーテル樹脂
と、シリカまたはアラミド不織布との混合物であること
が最も望ましい。The insulating layer forming the gap for accommodating these heating elements is formed of the above-described various materials because the gap can be easily processed by punching or laser.
Most preferably, it is a mixture of an epoxy resin, an imide resin, a phenylene ether resin and a silica or aramid nonwoven fabric.

【００４６】一方、ビアホール導体に充填される金属ペ
ーストは、銅粉末、銀粉末、銀被覆銅粉末、銅銀合金な
どの、平均粒径が０．５〜５０μｍの金属粉末を含む。
金属粉末の平均粒径が０．５μｍよりも小さいと、金属
粉末同士の接触抵抗が増加してスルーホール導体の抵抗
が高くなる傾向にあり、５０μｍを越えるとスルーホー
ル導体の低抵抗化が難しくなる傾向にある。On the other hand, the metal paste filled in the via-hole conductor includes metal powder having an average particle size of 0.5 to 50 μm, such as copper powder, silver powder, silver-coated copper powder, and copper-silver alloy.
If the average particle size of the metal powder is smaller than 0.5 μm, the contact resistance between the metal powders increases and the resistance of the through-hole conductor tends to increase. If the average particle size exceeds 50 μm, it is difficult to reduce the resistance of the through-hole conductor. Tend to be.

【００４７】また、導体ペーストは、前述したような金
属粉末に対して、前述したような結合用有機樹脂や溶剤
を添加混合して調製される。ペースト中に添加される溶
剤としては、用いる結合用有機樹脂が溶解可能な溶剤で
あればよく、例えば、イソプロピルアルコール、テルピ
ネオール、２−オクタノール、ブチルカルビトールアセ
テート等が用いられる。The conductive paste is prepared by adding and mixing the above-mentioned organic resin for binding and the solvent to the above-mentioned metal powder. The solvent to be added to the paste may be any solvent that can dissolve the binding organic resin to be used. For example, isopropyl alcohol, terpineol, 2-octanol, butyl carbitol acetate and the like are used.

【００４８】上記の導体ペースト中の結合用有機樹脂と
しては、前述した種々の絶縁シートを構成する有機樹脂
の他、セルロースなども使用される。この有機樹脂は、
前記金属粉末同士を互いに接触させた状態で結合すると
ともに、金属粉末を絶縁シートに接着させる作用をなし
ている。この有機樹脂は、金属ペースト中において、
０．１乃至４０体積％、特に０．３乃至３０体積％の割
合で含有されることが望ましい。これは、樹脂量が０．
１体積％よりも少ないと、金属粉末同士を強固に結合す
ることが難しく、低抵抗金属を絶縁層に強固に接着させ
ることが困難となり、逆に４０体積％を越えると、金属
粉末間に樹脂が介在することになり粉末同士を十分に接
触させることが難しくなり、スルーホール導体の抵抗が
大きくなるためである。As the organic resin for binding in the above-mentioned conductor paste, cellulose and the like are used in addition to the above-mentioned organic resins constituting the various insulating sheets. This organic resin is
The metal powders are bonded in a state where they are in contact with each other, and the metal powders are bonded to the insulating sheet. This organic resin, in the metal paste,
It is desirable that the content is 0.1 to 40% by volume, particularly 0.3 to 30% by volume. This means that the amount of resin is 0.1.
If the amount is less than 1% by volume, it is difficult to firmly bond the metal powders to each other, and it is difficult to firmly bond the low-resistance metal to the insulating layer. This makes it difficult to bring the powders into sufficient contact with each other and increases the resistance of the through-hole conductor.

【００４９】配線回路層としては、銅、アルミニウム、
金、銀の群から選ばれる少なくとも１種、または２種以
上の合金からなることが望ましく、特に、銅、または銅
を含む合金が最も望ましい。また、場合によっては、導
体組成物として回路の抵抗調整のためにＮｉ−Ｃｒ合金
などの高抵抗の金属を混合、または合金化してもよい。
さらには、配線層の低抵抗化のために、前記低抵抗金属
よりも低融点の金属、例えば、半田、錫などの低融点金
属を導体組成物中の金属成分中にて２〜２０重量％の割
合で含んでもよい。As the wiring circuit layer, copper, aluminum,
It is desirable to be made of at least one kind or two or more kinds of alloys selected from the group of gold and silver, and particularly, copper or an alloy containing copper is most desirable. In some cases, a high-resistance metal such as a Ni—Cr alloy may be mixed or alloyed as the conductor composition for adjusting the resistance of the circuit.
Further, in order to reduce the resistance of the wiring layer, a metal having a lower melting point than the low-resistance metal, for example, a low-melting metal such as solder or tin is used in an amount of 2 to 20% by weight in the metal component in the conductor composition. May be included.

【００５０】また、配線回路層と絶縁層、または伝熱部
材と絶縁層との密着強度を高める上では、絶縁層の表面
または、配線回路層または伝熱部材の表面を０．１μｍ
以上、特に０．３μｍ〜３μｍ、最適には０．３〜１．
５μｍに粗面加工することが望ましい。また、ビアホー
ル導体の両端を金属箔からなる配線回路層によって封止
する上では、配線回路層の厚みは、５〜４０μｍが適当
である。In order to increase the adhesion strength between the wiring circuit layer and the insulating layer or between the heat transfer member and the insulating layer, the surface of the insulating layer or the surface of the wiring circuit layer or the heat transfer member must be 0.1 μm thick.
As described above, in particular, 0.3 μm to 3 μm, most preferably 0.3 μm to 1 μm.
It is desirable to roughen the surface to 5 μm. In order to seal both ends of the via-hole conductor with a wiring circuit layer made of metal foil, the thickness of the wiring circuit layer is appropriately 5 to 40 μm.

【００５１】このようにして、本発明によれば、配線基
板の表面への種々の素子の実装性を低下させることな
く、表面または絶縁基板内部の空隙部に実装された発熱
素子による熱の淀みを解消して発生した熱を基板全体に
均熱化するとともに、伝熱部材を介して熱を放散させる
ことができる結果、発熱素子を冷却して、素子の誤動作
などの障害が発生するのを防止することができる。As described above, according to the present invention, the stagnation of heat by the heating element mounted on the surface or in the gap inside the insulating substrate can be achieved without deteriorating the mountability of various elements on the surface of the wiring board. As a result, it is possible to dissipate the heat through the heat transfer member, thereby cooling the heat-generating element and preventing malfunction such as element malfunction. Can be prevented.

【００５２】[0052]

【実施例】【Example】

実施例１ イミド樹脂５０体積％を、アラミド樹脂の不織布に含浸
したプリプレグに炭酸ガスレーザーで直径０．１ｍｍの
ビアホールを形成し、そのホール内に銀をメッキした銅
粉末を含む銅ペーストを充填してビアホール導体を形成
した。さらにレーザーで発熱素子として、パワーＩＣ素
子を設置するためのキャビティを形成して絶縁層ｂを作
製した。Example 1 A via hole having a diameter of 0.1 mm was formed with a carbon dioxide laser on a prepreg impregnated with 50% by volume of an imide resin in a nonwoven fabric of an aramid resin, and the hole was filled with a copper paste containing copper powder plated with silver. To form a via-hole conductor. Further, a cavity for installing a power IC element as a heating element by a laser was formed to form an insulating layer b.

【００５３】次に、イミド樹脂５０体積％、シリカ粉末
５０体積％の割合となるよう、ワニス状態の樹脂と粉末
を混合しドクターブレード法で作製した絶縁層にパンチ
ングで直径０．１ｍｍのビアホールを形成し、そのホー
ル内に銀をメッキした銅粉末を含む銅ペーストを充填し
てビアホール導体を形成して、絶縁層ａおよび絶縁層ｃ
を作製した。Next, a varnish-state resin and powder were mixed so as to have a ratio of 50% by volume of imide resin and 50% by volume of silica powder, and a via hole having a diameter of 0.1 mm was punched into an insulating layer formed by a doctor blade method. The holes are filled with a copper paste containing copper powder plated with silver to form via-hole conductors, and an insulating layer a and an insulating layer c are formed.
Was prepared.

【００５４】一方、ポリエチレンテレフタレート（ＰＥ
Ｔ）樹脂からなる転写シートの表面に接着剤を塗布して
粘着性をもたせＴＡＢ接続のために一部を切除した。そ
の後、厚さ１２μｍ、表面粗さ０．８μｍの銅箔を一面
に接着した。その後、フォトレジスト（ドライフィル
ム）を塗布し露光現像を行った後、これを塩化第二鉄溶
液中に浸漬して非パターン部をエッチング除去して配線
回路層を形成した。なお、作製した配線回路層は、線幅
が２０μｍ、配線と配線との間隔が２０μｍの微細なパ
ターンである。そして、この配線回路層を絶縁層ｂの表
面に転写させた。On the other hand, polyethylene terephthalate (PE)
T) An adhesive was applied to the surface of a transfer sheet made of a resin to make it sticky, and a portion was cut off for TAB connection. Thereafter, a copper foil having a thickness of 12 μm and a surface roughness of 0.8 μm was bonded to one surface. Thereafter, a photoresist (dry film) was applied and exposed and developed, and then immersed in a ferric chloride solution to remove non-pattern portions by etching to form a wiring circuit layer. Note that the manufactured wiring circuit layer is a fine pattern having a line width of 20 μm and an interval between wirings of 20 μm. Then, this wiring circuit layer was transferred to the surface of the insulating layer b.

【００５５】また、絶縁層ａおよび絶縁層ｃに対しても
同様に転写によって配線回路層を形成した。Further, a wiring circuit layer was similarly formed on the insulating layers a and c by transfer.

【００５６】そして、絶縁層ｂのビアホール導体および
配線回路層を形成してない部分の表面に、凹部を形成し
て、その凹部内に厚さ０．１ｍｍの炭化ケイ素（熱伝導
率２００Ｗ／ｍ・Ｋ）からなる伝熱部材を嵌め込んだ。Then, a concave portion is formed on the surface of the insulating layer b where the via hole conductor and the wiring circuit layer are not formed, and silicon carbide having a thickness of 0.1 mm (thermal conductivity of 200 W / m 2) is formed in the concave portion. -A heat transfer member made of K) was fitted.

【００５７】その後、絶縁層ａ，絶縁層ｂおよび絶縁層
ｃの順で積層圧着した後、５０ｋｇ／ｃｍ2 の圧力で圧
着し、２００℃で１時間加熱して完全硬化させて多層配
線基板を作製した。そして、キャビティ内に露出してい
る伝熱部材表面にパワ−ＩＣ素子を熱伝導性接着剤によ
り接着して、パワーＩＣ素子と絶縁層Ａ表面の配線回路
層とワイヤボンディングにより接続して、パワ−ＩＣ素
子を搭載した配線基板を作製した。また、比較のため
に、伝熱部材を埋設しない以外は、全く同様にして、パ
ワ−ＩＣ素子を搭載した配線基板を作製した。After that, the insulating layer a, the insulating layer b, and the insulating layer c are laminated and pressure-bonded in this order, and then pressure-bonded with a pressure of 50 kg / cm 2 , and heated at 200 ° C. for 1 hour to be completely cured to obtain a multilayer wiring board. Produced. Then, the power IC element is adhered to the surface of the heat transfer member exposed in the cavity with a heat conductive adhesive, and the power IC element is connected to the wiring circuit layer on the surface of the insulating layer A by wire bonding. -A wiring board on which an IC element was mounted was manufactured. For comparison, a wiring board on which a power IC element was mounted was manufactured in exactly the same manner except that the heat transfer member was not embedded.

【００５８】得られた各配線基板において、パワ−ＩＣ
素子を１０時間作動後のＩＣ素子自体の温度を測定した
結果、本発明に基づく伝熱部材を埋設することにより作
動時のＩＣ素子の温度を１２℃低下させることができ
た。In each of the obtained wiring boards, a power IC
As a result of measuring the temperature of the IC element itself after operating the element for 10 hours, the temperature of the IC element during operation could be lowered by 12 ° C. by embedding the heat transfer member according to the present invention.

【００５９】しかも、伝熱部材を形成した箇所を観察し
た結果、なんら問題はなかった。配線回路層とビアホー
ル導体とは良好な接続状態であり、各配線間の導通テス
トを行った結果、配線の断線も認められなかった。特別
な冷却ファンを用いなくても、各種素子及び電子部品は
所定の動作が確認された。Further, as a result of observing the place where the heat transfer member was formed, no problem was found. The wiring circuit layer and the via-hole conductor were in a good connection state. As a result of conducting a continuity test between the wirings, no disconnection of the wiring was observed. Even if a special cooling fan was not used, various elements and electronic components were confirmed to perform predetermined operations.

【００６０】実施例２イミド樹脂５０体積％を、アラミ
ド樹脂の不織布に含浸したプリプレグに炭酸ガスレーザ
ーで直径０．１ｍｍのビアホールを形成し、そのホール
内に銀をメッキした銅粉末を含む銅ペーストを充填して
ビアホール導体を形成した。さらにレーザーで発熱素子
としてパワーＩＣ素子を設置するための空隙部を形成し
て絶縁層Ａを作製した。Example 2 A copper paste containing copper powder in which a via hole having a diameter of 0.1 mm was formed in a prepreg impregnated with 50% by volume of an imide resin in a nonwoven fabric of an aramid resin with a carbon dioxide gas laser and silver was plated in the hole. Was filled to form a via-hole conductor. Further, a gap for installing a power IC element as a heating element was formed by a laser to form an insulating layer A.

【００６１】一方、ポリエチレンテレフタレート（ＰＥ
Ｔ）樹脂からなる転写シートの表面に接着剤を塗布して
粘着性をもたせＴＡＢ接続のために一部を切除した。そ
の後、厚さ１２μｍ、表面粗さ０．８μｍの銅箔を一面
に接着した。その後、フォトレジスト（ドライフィル
ム）を塗布し露光現像を行った後、これを塩化第二鉄溶
液中に浸漬して非パターン部をエッチング除去して配線
回路層を形成した。なお、作製した配線回路層は、線幅
が２０μｍ、配線と配線との間隔が２０μｍの微細なパ
ターンである。その後、この配線回路層にパワーＩＣ素
子をＴＡＢ接続し、エポキシ樹脂で封止した。On the other hand, polyethylene terephthalate (PE)
T) An adhesive was applied to the surface of a transfer sheet made of a resin to make it sticky, and a portion was cut off for TAB connection. Thereafter, a copper foil having a thickness of 12 μm and a surface roughness of 0.8 μm was bonded to one surface. Thereafter, a photoresist (dry film) was applied and exposed and developed, and then immersed in a ferric chloride solution to remove non-pattern portions by etching to form a wiring circuit layer. Note that the manufactured wiring circuit layer is a fine pattern having a line width of 20 μm and an interval between wirings of 20 μm. Thereafter, a power IC element was TAB-connected to this wiring circuit layer and sealed with epoxy resin.

【００６２】そして、前記絶縁層Ａの表面にパワ−ＩＣ
素子が実装された転写シートを位置決めして積層圧着し
て、転写シートのみを剥離して絶縁層Ａに配線回路層と
ともにパワーＩＣ素子を転写させた。A power IC is provided on the surface of the insulating layer A.
The transfer sheet on which the elements were mounted was positioned and pressure-bonded by lamination. Only the transfer sheet was peeled off, and the power IC element was transferred to the insulating layer A together with the wiring circuit layer.

【００６３】次に、イミド樹脂５０体積％、シリカ粉末
５０体積％の割合となるよう、ワニス状態の樹脂と粉末
を混合しドクターブレード法で作製した絶縁層にパンチ
ングで直径０．１ｍｍのビアホールを形成し、そのホー
ル内に銀をメッキした銅粉末を含む銅ペーストを充填し
てビアホール導体を形成して、絶縁層Ｂ、絶縁層Ｃを作
製した。そして、前記絶縁層Ｂの絶縁層Ａの空隙部に対
面する箇所に、厚さ０．１ｍｍの銅からなる伝熱部材を
圧着して埋め込んだ。さらに、絶縁層Ｂおよび絶縁層Ｃ
の必要な部分に配線回路層を転写した。Next, a varnish-state resin and powder were mixed so as to have a ratio of 50% by volume of imide resin and 50% by volume of silica powder, and a via hole having a diameter of 0.1 mm was punched into an insulating layer formed by a doctor blade method. Then, the holes were filled with a copper paste containing copper powder plated with silver to form via-hole conductors, whereby insulating layers B and C were formed. Then, a heat transfer member made of copper having a thickness of 0.1 mm was buried in the portion of the insulating layer B facing the void portion of the insulating layer A by pressing. Further, an insulating layer B and an insulating layer C
The wiring circuit layer was transcribed to the necessary part.

【００６４】その後、空隙部にパワ−ＩＣ素子が収納さ
れた絶縁層Ａを中心に、その上に絶縁層Ｃ、その下側に
絶縁層Ｂの伝熱部材が空隙部に対向するようにして積層
し、これを５０ｋｇ／ｃｍ2 の圧力で圧着し、２００℃
で１時間加熱して完全硬化させて、パワーＩＣ素子を内
蔵した多層配線基板を作製した。また、比較のために、
伝熱部材を埋設しない以外は、全く同様にしてパワーＩ
Ｃ素子を内蔵した多層配線基板を作製した。また、放熱
性の評価のために、絶縁層にＩＣ素子と接触するように
熱電対を埋め込んだ。Thereafter, the heat transfer member of the insulating layer A having the power IC element housed in the gap, the insulating layer C thereon, and the insulating layer B therebelow is arranged so as to face the gap. The layers were laminated and pressed at a pressure of 50 kg / cm 2 at 200 ° C.
For 1 hour to complete the curing, thereby producing a multilayer wiring board incorporating a power IC element. Also, for comparison,
Except that the heat transfer member is not embedded, the power I
A multilayer wiring board incorporating a C element was manufactured. In addition, a thermocouple was embedded in the insulating layer so as to be in contact with the IC element for evaluation of heat dissipation.

【００６５】そして、この基板に対してパワ−ＩＣ素子
を１０時間作動後のＩＣ素子自体の温度を測定した結
果、本発明に基づく伝熱部材を埋設することにより、埋
設しない場合に比較して作動時のＩＣ素子の温度を１５
℃低下させることができた。As a result of measuring the temperature of the IC element itself after operating the power IC element for 10 hours with respect to this substrate, the heat transfer member according to the present invention was embedded, as compared with the case where it was not embedded. The temperature of the IC element during operation is 15
° C could be lowered.

【００６６】[0066]

【発明の効果】以上詳述したとおり、本発明によれば、
発熱素子を搭載した配線基板において、伝熱部材を絶縁
基板内に埋設させることにより、基板の表面への素子の
実装性を阻害することなく、発熱素子から発生する熱の
淀みなく、基板全体に均熱化、さらには放熱することが
でき、それにより発熱素子の異常加熱による誤動作を防
止することができる。また、発熱素子を複数個内蔵した
配線基板においても、内蔵された個々の発熱素子の近傍
の絶縁基板内に伝熱部材を埋設することにより、基板の
多素子化、高密度実装化に対して対応できる放熱構造を
提供できる。As described in detail above, according to the present invention,
By embedding the heat transfer member in the insulating substrate of the wiring board on which the heating element is mounted, the heat generated from the heating element does not stagnate without impairing the mountability of the element on the surface of the board. It is possible to equalize the heat and further radiate the heat, thereby preventing malfunction due to abnormal heating of the heating element. In addition, even in a wiring board having a plurality of built-in heating elements, by burying a heat transfer member in an insulating substrate near each of the built-in heating elements, it is possible to increase the number of elements of the board and increase the mounting density. A heat dissipation structure that can be provided can be provided.

【図面の簡単な説明】[Brief description of the drawings]

【図１】本発明の多層配線基板の一実施例を説明するた
めの要部切り欠き斜視図である。FIG. 1 is a cutaway perspective view of an essential part for explaining an embodiment of a multilayer wiring board of the present invention.

【図２】図１の多層配線基板を作製するための工程図で
ある。FIG. 2 is a process chart for manufacturing the multilayer wiring board of FIG. 1;

【図３】本発明の多層配線基板の他の実施例を説明する
ための要部切り欠き断面図である。FIG. 3 is a cutaway cross-sectional view of an essential part for explaining another embodiment of the multilayer wiring board of the present invention.

【図４】図３の多層配線基板を作製するための工程図で
ある。FIG. 4 is a process chart for manufacturing the multilayer wiring board of FIG. 3;

【図５】本発明の多層配線基板のさらに他の実施例を説
明するための概略断面図である。FIG. 5 is a schematic sectional view for explaining still another embodiment of the multilayer wiring board of the present invention.

【図６】従来の配線基板を説明するための概略断面図で
ある。FIG. 6 is a schematic cross-sectional view for explaining a conventional wiring board.

【図７】他の従来の配線基板を説明するための概略断面
図である。FIG. 7 is a schematic cross-sectional view for explaining another conventional wiring board.

【符号の説明】[Explanation of symbols]

１ 配線基板 ２ａ〜２ｄ 配線層 ３ 絶縁基板 ４ 配線回路層 ５ ビアホール導体 ６ 発熱素子 ７ キャビティ ８ ワイア−ボンディング ９ 伝熱部材 １０ 端部 DESCRIPTION OF SYMBOLS 1 Wiring board 2a-2d Wiring layer 3 Insulating board 4 Wiring circuit layer 5 Via hole conductor 6 Heating element 7 Cavity 8 Wire-bonding 9 Heat transfer member 10 End part

Claims (4)

【特許請求の範囲】[Claims] 【請求項１】少なくとも熱硬化性樹脂を含む複数の絶縁
層を積層してなる絶縁基板と、該絶縁基板の表面および
／または内部に形成された配線回路層とを具備するとと
もに、前記絶縁基板の表面および／または内部に発熱性
電気素子を搭載してなる多層配線基板において、前記発
熱性電気素子近傍の前記絶縁基板内部に高熱伝導性を有
する伝熱部材を埋設したことを特徴とする配線基板。1. An insulating substrate comprising: an insulating substrate formed by laminating a plurality of insulating layers containing at least a thermosetting resin; and a wiring circuit layer formed on a surface and / or inside the insulating substrate. A multi-layer wiring board having a heat-generating electric element mounted on the surface and / or inside thereof, wherein a heat transfer member having high thermal conductivity is embedded in the insulating substrate near the heat-generating electric element. substrate. 【請求項２】前記伝熱部材の端部を、前記絶縁基板の側
面から露出あるいは突出させたことを特徴とする請求項
１記載の配線基板。2. The wiring board according to claim 1, wherein an end of said heat transfer member is exposed or protrudes from a side surface of said insulating substrate. 【請求項３】前記電気素子が、前記絶縁基板内部に設け
られた空隙部に実装収納されてなることを特徴とする請
求項１記載の配線基板。3. The wiring board according to claim 1, wherein the electric element is mounted and housed in a gap provided inside the insulating substrate. 【請求項４】前記発熱性電気素子が、ＩＣ素子、抵抗素
子、コンデンサ、発振子、フィルターの群から選ばれる
１種であることを特徴とする請求項１記載の配線基板。4. The wiring board according to claim 1, wherein the heat-generating electric element is one selected from the group consisting of an IC element, a resistance element, a capacitor, an oscillator, and a filter.
JP20603597A 1997-07-31 1997-07-31 Manufacturing method of wiring board Expired - Lifetime JP3588230B2 (en)

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Application Number Priority Date Filing Date Title
JP20603597A JP3588230B2 (en) 1997-07-31 1997-07-31 Manufacturing method of wiring board

Publications (2)

Publication Number Publication Date
JPH1154939A true JPH1154939A (en) 1999-02-26
JP3588230B2 JP3588230B2 (en) 2004-11-10

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