JPH11163492A - Aluminum nitride based wiring substrate and manufacturing method therefor - Google Patents

Aluminum nitride based wiring substrate and manufacturing method therefor

Info

Publication number
JPH11163492A
JPH11163492A JP9328450A JP32845097A JPH11163492A JP H11163492 A JPH11163492 A JP H11163492A JP 9328450 A JP9328450 A JP 9328450A JP 32845097 A JP32845097 A JP 32845097A JP H11163492 A JPH11163492 A JP H11163492A
Authority
JP
Japan
Prior art keywords
aluminum nitride
resistor
weight
layer
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9328450A
Other languages
Japanese (ja)
Other versions
JP3709062B2 (en
Inventor
Shigeki Yamada
成樹 山田
Tomohide Hasegawa
智英 長谷川
Tomohiro Iwaida
智広 岩井田
Hiroshi Okayama
浩 岡山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP32845097A priority Critical patent/JP3709062B2/en
Publication of JPH11163492A publication Critical patent/JPH11163492A/en
Application granted granted Critical
Publication of JP3709062B2 publication Critical patent/JP3709062B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Parts Printed On Printed Circuit Boards (AREA)
  • Non-Adjustable Resistors (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide an insulating substrate made of aluminum nitride based ceramics, and a wiring substrate with a resistor formed in a concurrent burning step. SOLUTION: A metallized wiring-layer paste made of W or Mo is printed in a given position on a green sheet with aluminum nitride as the main component. At the same time, a W or Mo-based resistor-layer pate is print coated, and the W or Mo-based resistor-layer paste contains Fe and Si of 0.1 to 2 wt.% in total and at least one of NbN, Al2 O3 in a radio of 0.5 to 20 wt.%. Then, the substrate is burned concurrently in non-oxidizing atmosphere to form an aluminum nitride based wiring substrate with a metallized wiring layer and a resistor layer.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、抵抗体層および配
線層を具備し、窒化アルミニウム質セラミックスからな
る絶縁基板と同時焼成によって作製される抵抗体を具備
する窒化アルミニウム質配線基板と、その製造方法に関
する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an aluminum nitride wiring board having a resistor layer and a wiring layer, and an insulating substrate made of aluminum nitride ceramics and a resistor formed by co-firing, and a method of manufacturing the same. About the method.

【0002】[0002]

【従来技術】一般に、セラミック配線基板において、そ
の回路設計上、抵抗体素子を設ける場合、基板表面に抵
抗体チップなどの部品を、半田などにより配線基板の表
面に形成された配線層に実装することが行われている。
最近に至っては、抵抗体部品に代えて、基板表面に酸化
レニウムなどの抵抗体ペーストを印刷塗布して基板に焼
き付けることにより抵抗体を形成することも行われてい
る。
2. Description of the Related Art Generally, when a resistor element is provided on a ceramic wiring board due to its circuit design, components such as a resistor chip are mounted on the wiring board formed on the surface of the wiring board by soldering or the like. That is being done.
Recently, instead of the resistor parts, a resistor is formed by printing and applying a resistor paste such as rhenium oxide on the surface of the substrate and baking the paste on the substrate.

【0003】一方、セラミック配線基板としては、従来
よりアルミナセラミックスを絶縁基板とし、その表面に
WやMoなどの高融点金属からなるメタライズ配線層を
被着形成したものが普及しているが、配線基板表面に半
導体素子を搭載する場合、半導体素子の作動に伴う発生
する熱を放熱させるために、絶縁基板に対して高熱伝導
性が要求され、その要求に対して、窒化アルミニウム質
セラミックスが注目されている。
On the other hand, as a ceramic wiring substrate, a substrate in which alumina ceramics is used as an insulating substrate and a metallized wiring layer made of a high melting point metal such as W or Mo is formed on the surface thereof has been widely used. When a semiconductor element is mounted on the surface of a substrate, high thermal conductivity is required for the insulating substrate in order to dissipate the heat generated due to the operation of the semiconductor element. ing.

【0004】このような窒化アルミニウム質セラミック
スを絶縁基板とした配線基板に対して、抵抗体を形成す
る場合においても、同様に抵抗体素子を表面実装する
か、あるいは抵抗体ペーストを印刷塗布して焼き付ける
ことが一般に行われてる。
When a resistor is formed on a wiring board using such an aluminum nitride ceramics as an insulating substrate, a resistor element is similarly surface-mounted, or a resistor paste is applied by printing. Baking is generally done.

【0005】[0005]

【発明が解決しようとする課題】しかしながら、近年、
一般民生電子部品等の高密度実装化、薄型化、小型化に
伴い、基板表面の実装面積が小さくなり、抵抗体素子を
表面に実装することが困難となりつつあり、また、抵抗
体ペーストを焼き付ける場合においても、その抵抗体を
形成する箇所は、基板表面に限定されるために、高密度
配線化を阻害する大きな要因となっていた。
However, in recent years,
With the high-density mounting, thinning, and miniaturization of general consumer electronic components and the like, the mounting area on the substrate surface has become smaller, and it has become difficult to mount the resistor elements on the surface. Even in such a case, since the portion where the resistor is formed is limited to the substrate surface, it has been a major factor that hinders high-density wiring.

【0006】このような高密度配線化に対しては、セラ
ミック配線基板を多層配線化するとともに、セラミック
絶縁基板とメタライズ配線層とともに、同時焼成するこ
とが可能であり、抵抗体を多層配線基板の表面または内
部のいずれでもに形成できることが望まれる。この同時
焼成技術において、焼成温度が絶縁基板の緻密化温度と
一致することのみならず、熱膨張特性なども絶縁基板と
一致することが必要であるが、これまで、このような特
性を有する窒化アルミニウム質セラミックスと同時焼成
可能であり、さらに密着性に優れた抵抗体については何
ら検討されていないのが現状であった。
In order to achieve such high-density wiring, it is possible to form a multilayer wiring of the ceramic wiring substrate and simultaneously fire the ceramic insulating substrate and the metallized wiring layer together. It is desirable to be able to form either on the surface or inside. In this co-firing technique, it is necessary not only that the firing temperature match the densification temperature of the insulating substrate, but also that the thermal expansion characteristics and the like match the insulating substrate. At present, a resistor that can be co-fired with an aluminum ceramic and has excellent adhesion has not been studied at all.

【0007】従って、本発明は、窒化アルミニウム質セ
ラミックスからなる絶縁基板と、同時焼成によって形成
することが可能であり、且つ高い密着性を有する抵抗体
を具備した配線基板を提供することを目的とするもので
ある。
SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide an insulating substrate made of aluminum nitride ceramics and a wiring substrate which can be formed by simultaneous firing and which has a resistor having high adhesion. Is what you do.

【0008】[0008]

【課題を解決するための手段】本発明者らは、上記の課
題に対し検討を重ねた結果、抵抗体組成物として、Wあ
るいはMoを主成分とし、添加物としてFeおよびS
i、さらには、NbN及び/またはアルミナを加えるこ
とにより抵抗値を任意の値に調整が可能であり、かかる
抵抗体組成物が窒化アルミニウ質セラミックスと同時に
焼成できるとともに、絶縁基板に対して高い密着性をも
って形成できることを見いだし、本発明に至った。
Means for Solving the Problems The inventors of the present invention have repeatedly studied the above-mentioned problems, and as a result, as a resistor composition, W or Mo is used as a main component, and Fe and S are used as additives.
i, furthermore, the resistance value can be adjusted to an arbitrary value by adding NbN and / or alumina, and such a resistor composition can be fired simultaneously with the aluminum nitride ceramics and has high adhesion to the insulating substrate. The present inventors have found that they can be formed with properties and have led to the present invention.

【0009】即ち、本発明の窒化アルミニウム質配線基
板は、窒化アルミニウムを主体とするセラミック絶縁基
板と、該基板の表面および/または内部に、Wあるいは
Moを主体とするメタライズ配線層と、WあるいはMo
を主成分とし、FeおよびSiを合計で0.1〜2重量
%、NbN、Al2 3 の少なくとも1種を0.5〜2
0重量%の割合で含有する抵抗体層を具備することを特
徴とする。
That is, the aluminum nitride wiring board of the present invention comprises a ceramic insulating substrate mainly composed of aluminum nitride, a metallized wiring layer mainly composed of W or Mo on the surface and / or inside of the substrate, Mo
Was the main component, 0.1 to 2 wt% of Fe and Si in total, NbN, at least one of Al 2 O 3 0.5 to 2
A resistor layer containing 0% by weight is provided.

【0010】また、本発明の窒化アルミニウム質配線基
板の製造方法は、窒化アルミニウムを主体とするグリー
ンシートに、WあるいはMoを主体とするメタライズ配
線層用ペーストを所定箇所に印刷塗布すると同時に、W
あるいはMoを主成分とし、FeおよびSiを合計で
0.1〜2重量%、NbN、Al2 3 の少なくとも1
種を0.5〜20重量%の割合で含有する抵抗体層用ペ
ーストを印刷塗布した後、非酸化性雰囲気中で同時焼成
することを特徴とするものである。
In the method for manufacturing an aluminum nitride wiring board according to the present invention, a metallized wiring layer paste mainly composed of W or Mo is printed and applied to a predetermined portion on a green sheet mainly composed of aluminum nitride.
Alternatively, Mo is a main component, and Fe and Si are 0.1 to 2 % by weight in total, and at least one of NbN and Al 2 O 3 is used.
After printing and applying a resistor layer paste containing seeds at a ratio of 0.5 to 20% by weight, co-firing is performed in a non-oxidizing atmosphere.

【0011】[0011]

【発明の実施の形態】本発明の窒化アルミニウム質配線
基板は、窒化アルミニウム質セラミックスを絶縁基板と
するものであり、その表面および/または内部にWある
いはMoを主成分とするメタライズ配線層を具備するも
のである。
BEST MODE FOR CARRYING OUT THE INVENTION The aluminum nitride wiring board of the present invention uses an aluminum nitride ceramics as an insulating substrate and has a metallized wiring layer containing W or Mo as a main component on the surface and / or inside thereof. Is what you do.

【0012】絶縁基板を形成する窒化アルミニウム質絶
縁基板は、窒化アルミニウムを主成分として、焼結助剤
成分を0.1〜20重量%の割合で含有する。焼結助剤
成分としては、Y、Er、Yb、Lu、Laなどの周期
律表第3a族元素化合物および/またはCa、Ba、S
r、Mgなどの周期律表第2a族元素化合物、あるいは
Li、Naなどの周期律表第1a族元素化合物、Si化
合物などを含有する。
The aluminum nitride insulating substrate forming the insulating substrate contains aluminum nitride as a main component and a sintering aid component in a ratio of 0.1 to 20% by weight. Examples of the sintering aid component include compounds of Group 3a elements of the periodic table such as Y, Er, Yb, Lu, and La and / or Ca, Ba, S
It contains a Group 2a element compound of the periodic table such as r and Mg, a Group 1a element compound of the periodic table such as Li and Na, and a Si compound.

【0013】特に、周期律表第3a族元素を酸化物換算
で0.1〜15重量%の割合で含有することが望まし
く、他の焼結助剤は、周期律表第3a族元素化合物とと
もに、低温での焼結性をさらに促進するものであり、
0.1〜10重量%の割合で含有される。
In particular, it is desirable to contain the Group 3a element of the periodic table in an amount of 0.1 to 15% by weight in terms of oxide, and the other sintering aids are added together with the compound of the Group 3a element of the periodic table. , Which further promotes sinterability at low temperatures,
It is contained at a ratio of 0.1 to 10% by weight.

【0014】また、絶縁基板中には、基板を黒色化する
ために、Ti、Zr、V、Nb、Ta、W、Mo、M
n、Fe、Co、Niなどの周期律表第4a,5a、6
a、7a、8族化合物を酸化物換算で0.1〜10重量
%の割合で含有させることも可能である。
In order to blacken the substrate, Ti, Zr, V, Nb, Ta, W, Mo, M
Periodic Tables 4a, 5a, 6 of n, Fe, Co, Ni, etc.
It is also possible to contain a, 7a, or VIII compound in a ratio of 0.1 to 10% by weight in terms of oxide.

【0015】一方、メタライズ配線層は、WあるいはM
oを主体とするものであり、その他の成分としては、絶
縁基板との同時焼結性を高める上で、絶縁基板と同様な
窒化アルミニウム、あるいは窒化アルミニウムと焼結助
剤成分等を10重量%以下の割合で含有する。
On the other hand, the metallized wiring layer is made of W or M
The main component is o, and as other components, aluminum nitride similar to the insulating substrate, or aluminum nitride and a sintering aid component, etc., in an amount of 10% by weight for enhancing the simultaneous sinterability with the insulating substrate. It is contained at the following ratio.

【0016】さらに、本発明の配線基板において、上記
のメタライズ配線層は、主として信号の伝達を担うもの
でありその電気抵抗が15mΩ/□以下であることが必
要であるが、本発明の配線基板によれば、メタライズ配
線層以外に、抵抗体層を具備するものである。
Further, in the wiring board of the present invention, the above-mentioned metallized wiring layer is mainly responsible for signal transmission and its electrical resistance needs to be 15 mΩ / □ or less. According to this, a resistor layer is provided in addition to the metallized wiring layer.

【0017】この抵抗体層は、WあるいはMoを主成分
とし、FeおよびSiを合計で0.1〜2重量%、Nb
N、Al2 3 の少なくとも1種を0.5〜20重量%
の割合で含有するものである。特に、FeおよびSiは
それぞれ単独で含有されていてもよいが、Fe+Siの
含有量を0.1重量%以上とすることにより、Wあるい
はMoを主成分とする組成物の抵抗を20〜200mΩ
/□の範囲で制御することができる。但し、Fe+Si
量の上限を2重量%に定めたのは、これ以上含有させて
も実質抵抗変化がないためである。
This resistor layer contains W or Mo as a main component, and a total of 0.1 to 2% by weight of Fe and Si, Nb
0.5 to 20% by weight of at least one of N and Al 2 O 3
In a proportion of In particular, each of Fe and Si may be contained alone, but by setting the content of Fe + Si to 0.1% by weight or more, the resistance of the composition containing W or Mo as a main component is 20 to 200 mΩ.
/ □ can be controlled. However, Fe + Si
The upper limit of the amount is set to 2% by weight because there is no substantial change in resistance even if it is contained more.

【0018】また、かかる抵抗体層には、上記のFe+
Siに加え、NbNあるいはAl23 を合計で0.5
〜20重量%の割合で含有させる。このNbNやAl2
3は、Fe+Siとの併用によって、抵抗体の抵抗値
制御と同時に絶縁基板への密着性を高めることができ
る。よって、上記NbNとAl2 3 の合計量が0.5
重量%あるいは20重量%より多いと、密着性が低下し
実用に適さなくなる。好適には、1〜10重量%が適当
である。
The above-mentioned Fe +
NbN or Al 2 O 3 in addition to Si
-20% by weight. This NbN or Al 2
O 3 can be used in combination with Fe + Si to control the resistance value of the resistor and at the same time increase the adhesion to the insulating substrate. Therefore, the total amount of NbN and Al 2 O 3 is 0.5
If the content is more than 20% by weight or less than 20% by weight, the adhesiveness will be reduced and it will not be suitable for practical use. Suitably, 1 to 10% by weight is suitable.

【0019】さらに、この抵抗体層中には、上記の抵抗
制御剤や密着性向上剤に加え、前記メタライズ配線層と
同様に、絶縁基板と同様なAlN、あるいはAlNとそ
の焼結助剤成分を10重量%以下の抵抗体層としての性
能を及ぼさない範囲で含有していてもよい。
Further, in the resistor layer, in addition to the resistance control agent and the adhesion improver described above, similarly to the metallized wiring layer, AlN similar to the insulating substrate, or AlN and a sintering aid component thereof. Of 10% by weight or less in a range that does not exert the performance as a resistor layer.

【0020】なお、上記のメタライズ配線層および抵抗
体層は、配線基板の表面に形成される他、多層配線化さ
れた配線基板においては、その絶縁基板内部に配設する
ことも当然可能である。その場合には、適宜、メタライ
ズ配線層と同様な組成物からなるスルーホール導体を形
成して異なる層間の電気的な接続を行えばよい。
The above-mentioned metallized wiring layer and resistor layer are formed on the surface of the wiring board. In a wiring board having a multi-layer wiring structure, it is of course possible to arrange them inside the insulating substrate. . In such a case, a through-hole conductor made of the same composition as that of the metallized wiring layer may be appropriately formed to make electrical connection between different layers.

【0021】次に、上記の窒化アルミニウム質配線基板
の製造方法について説明する。まず、絶縁基板を形成す
るために、原料として、平均粒径が0.8〜2.5μ
m、BET比表面積が2〜5m2 /g、不純物酸素量が
0.5〜3.0重量%の窒化アルミニウム粉末に対し
て、前述したような各種焼結助剤あるいは黒色化材を所
定量添加混合し、該混合粉末に有機バインダーと溶媒を
添加して調製した成形用原料を用いてドクターブレード
法などによりグリーンシートを作製する。
Next, a method for manufacturing the above-mentioned aluminum nitride wiring board will be described. First, in order to form an insulating substrate, as a raw material, the average particle size is 0.8 to 2.5 μm.
m, aluminum oxide powder having a BET specific surface area of 2 to 5 m 2 / g and an impurity oxygen amount of 0.5 to 3.0% by weight, and a predetermined amount of the above-mentioned various sintering aids or blackening materials with respect to aluminum nitride powder. A green sheet is prepared by a doctor blade method or the like using a raw material for molding prepared by adding and mixing and adding an organic binder and a solvent to the mixed powder.

【0022】一方、メタライズ配線層用ペーストとし
て、平均粒径が1〜5μmのWあるいはMo粉末に対し
て、適宜、窒化アルミニウム、前記焼結助剤成分などを
所定量添加混合し、さらに、有機バインダー、可塑剤と
ともに溶媒中にて混合してメタライズペーストを調製す
る。
On the other hand, as a metallized wiring layer paste, a predetermined amount of aluminum nitride, the above-mentioned sintering aid component, etc. is appropriately added to W or Mo powder having an average particle size of 1 to 5 μm and mixed. It is mixed with a binder and a plasticizer in a solvent to prepare a metallized paste.

【0023】また、抵抗体層用ペーストとして、平均粒
径が1〜5μmのWあるいはMo粉末に対して、Feお
よびSiを合計で0.1〜2重量%、NbN、Al2
3 の少なくとも1種を0.5〜20重量%の割合で添加
混合し、これに有機バインダー、可塑剤とともに溶媒中
にて混合して抵抗体層用メタライズペーストを調製す
る。
Further, as a resistor layer paste, a total of 0.1 to 2 % by weight of Fe and Si is added to W or Mo powder having an average particle size of 1 to 5 μm, NbN, Al 2 O.
At least one of 3 is added and mixed in a ratio of 0.5 to 20% by weight, and mixed with an organic binder and a plasticizer in a solvent to prepare a metallized paste for a resistor layer.

【0024】そして、上記のようにして調製したメタラ
イズ配線層用ペーストおよび抵抗体用ペーストをグリー
ンシートの表面の所定箇所にスクリーン印刷法などによ
り印刷塗布する。なお、配線基板を多層配線化する場合
には、複数のグリーンシートに対して、適宜スルーホー
ルを形成してそのホール内にメタライズ配線層用ペース
トを充填した後、さらに所定のグリーンシートに回路設
計により、メタライズ配線層用ペーストおよび/または
抵抗体用ペーストを印刷塗布した後、積層圧着する。
Then, the paste for the metallized wiring layer and the paste for the resistor prepared as described above are printed and applied to predetermined portions of the surface of the green sheet by a screen printing method or the like. When the wiring substrate is formed into a multilayer wiring, a through hole is appropriately formed in a plurality of green sheets, a metallized wiring layer paste is filled in the holes, and a circuit design is further performed on a predetermined green sheet. Then, after the metallized wiring layer paste and / or the resistor paste are printed and applied, the layers are pressure-bonded.

【0025】その後、それを窒素中、あるいは水素+窒
素混合雰囲気中で1550〜1900℃の温度で焼成す
ることによりメタライズ配線層および抵抗体層を表面あ
るいは内部に形成した配線基板を作製することができ
る。
Thereafter, it is fired in nitrogen or a mixed atmosphere of hydrogen and nitrogen at a temperature of 1550 to 1900 ° C. to produce a wiring board having a metallized wiring layer and a resistor layer formed on the surface or inside. it can.

【0026】[0026]

【実施例】平均粒径が1.5μm、BET比表面積が
2.5m2 /g、不純物酸素量が1.0重量%、陽イオ
ン不純物0.03重量%以下の窒化アルミニウム粉末に
対して、Er2 3 を8重量%、SrCO3 をSrO換
算で2.5重量%、黒色化材としてMoO3 を1重量%
添加混合した混合粉末を作製し、成形用バインダーとし
てアクリル系バインダーと有機溶媒と混練した後、ドク
ターブレード法により厚さ500μmのグリーンシート
を作製した。
EXAMPLE An aluminum nitride powder having an average particle size of 1.5 μm, a BET specific surface area of 2.5 m 2 / g, an impurity oxygen content of 1.0% by weight and a cation impurity of 0.03% by weight or less was used. 8% by weight of Er 2 O 3 , 2.5% by weight of SrCO 3 in terms of SrO, 1% by weight of MoO 3 as a blackening material
A mixed powder was prepared by adding and mixing, and after kneading an acrylic binder and an organic solvent as a molding binder, a green sheet having a thickness of 500 μm was prepared by a doctor blade method.

【0027】次に、抵抗体ペーストとして、平均粒径が
2μmのWあるいはMo粉末、平均粒径が3μmのNb
N粉末、平均粒径が3μmのAl2 3 粉末、Fe源と
してFe2 3 およびSi源としてSiO2 を用いて、
最終組成が表1となるように秤量混合し、その混合物
に、セルロール系バインダーを添加混合して、抵抗体層
用ペーストを調製した。なお、試料No.29、30につ
いては原料のAlN粉末を添加した。
Next, W or Mo powder having an average particle size of 2 μm and Nb having an average particle size of 3 μm were used as a resistor paste.
Using N powder, Al 2 O 3 powder having an average particle diameter of 3 μm, Fe 2 O 3 as an Fe source and SiO 2 as a Si source,
The final composition was weighed and mixed so as to be as shown in Table 1, and a cellulosic binder was added and mixed with the mixture to prepare a resistor layer paste. For samples Nos. 29 and 30, the raw material AlN powder was added.

【0028】また、配線層用ペーストとして、平均粒径
が2μmのW粉末に対して、AlNを5重量%、Er2
3 を0.5重量%添加混合して、その混合物に、セル
ロース系バインダーを添加混合して、配線層用ペースト
を調製した。
Further, as a wiring layer paste, 5 wt% of AlN and Er 2 were added to W powder having an average particle size of 2 μm.
O 3 was added and mixed at 0.5% by weight, and the mixture was mixed with a cellulose-based binder to prepare a wiring layer paste.

【0029】そして、前記グリーンシート上に調製した
抵抗体層用ペーストおよび配線層用ペーストをスクリー
ン印刷により印刷塗布した。なお、抵抗体ペーストは、
抵抗測定用として幅0.2mm×長さ35mm×厚さ2
0μm、密着強度測定用として幅2mm×長さ20mm
×厚さ20μmに2種を塗布した。また、グリーンシー
トの一部にはスルーホールを形成して前記配線層用ペー
ストを充填した。
Then, the paste for the resistor layer and the paste for the wiring layer prepared on the green sheet were printed and applied by screen printing. The resistor paste is
0.2mm width x 35mm length x 2 thickness for resistance measurement
0 μm, width 2 mm x length 20 mm for measuring adhesion strength
× Two types were applied to a thickness of 20 μm. Further, a through hole was formed in a part of the green sheet and the paste for the wiring layer was filled.

【0030】そして、ペーストが印刷された複数のグリ
ーンシートを積層した後、窒素+水素混合雰囲気中で1
650℃の温度で3時間焼成して抵抗体内蔵窒化アルミ
ニウム質配線基板を作製した。絶縁基板の熱伝導率は7
5W/m・Kであった。得られた各種配線基板に対し
て、抵抗体層の単位面積当たりの抵抗を4端子法により
測定し、その結果を表1に示した。
After laminating a plurality of green sheets on which the paste is printed, the green sheets are mixed in a nitrogen + hydrogen mixed atmosphere.
By firing at 650 ° C. for 3 hours, an aluminum nitride wiring board with a built-in resistor was manufactured. The thermal conductivity of the insulating substrate is 7
It was 5 W / m · K. With respect to the obtained various wiring boards, the resistance per unit area of the resistor layer was measured by a four-terminal method, and the results are shown in Table 1.

【0031】また、基板表面に形成された抵抗体層に対
して、Niメッキを施し、BAg−8ろうにてFe−N
i−Co合金製のT字型金具をろう付けして、その金具
を1mm/minの引張速度で垂直方向に引張り、抵抗
体層が剥がれた時の荷重(ピール強度)を測定し表1に
示した。
The resistor layer formed on the surface of the substrate is plated with Ni, and Fe-N
A T-shaped bracket made of an i-Co alloy was brazed, and the bracket was pulled vertically at a pulling speed of 1 mm / min, and the load (peel strength) when the resistor layer was peeled was measured. Indicated.

【0032】[0032]

【表1】 [Table 1]

【0033】表1の結果から明らかなように、Fe+S
i合計量を0.1〜2重量%の範囲に制御することによ
り抵抗を20〜200mΩ/□の範囲で制御できること
がわかる。また、NbN、Al2 3 を添加することに
より、ピール強度2kgf以上が達成された。
As is clear from the results in Table 1, Fe + S
It is understood that the resistance can be controlled in the range of 20 to 200 mΩ / □ by controlling the total amount of i in the range of 0.1 to 2% by weight. Further, by adding NbN and Al 2 O 3 , a peel strength of 2 kgf or more was achieved.

【0034】但し、Fe+Si量が0.1重量%未満の
試料No.1では、抵抗が20mΩ/□より低く、2重量
%を越える試料No.8では、2重量%添加試料との抵抗
の変化はなかった。さらにNbNおよびAl2 3 合計
量が0.5重量%よりも少ない試料No.9、18、ある
いは20重量%を越える試料No.17、23ではいずれ
もピール強度が2kgfよりも低く実用的なものではな
かった。
However, in Sample No. 1 in which the amount of Fe + Si was less than 0.1% by weight, the resistance was lower than 20 mΩ / □, and in Sample No. 8 exceeding 2% by weight, the change in resistance with the sample added with 2% by weight. There was no. Further, in Samples Nos. 9 and 18 in which the total amount of NbN and Al 2 O 3 is less than 0.5% by weight, or in Samples Nos. 17 and 23 in which the total amount exceeds 20% by weight, the peel strength is lower than 2 kgf and practical. It was not something.

【0035】[0035]

【発明の効果】以上詳述した通り、本発明においては、
窒化アルミニウム質セラミックスを絶縁基板とする配線
基板において、抵抗体層を絶縁基板と同時焼成により、
且つ高い密着性をもって形成することができる結果、抵
抗体層の表面形成のみならず内蔵化が可能であり、窒化
アルミニウムの高熱伝導性を発揮した配線基板の高密度
配線化及び高密度実装化を図ることができる。
As described in detail above, in the present invention,
In a wiring board using aluminum nitride ceramics as an insulating substrate, the resistor layer is simultaneously fired with the insulating substrate,
In addition, as a result of being able to be formed with high adhesion, not only the surface formation of the resistor layer but also the internalization is possible. Can be planned.

───────────────────────────────────────────────────── フロントページの続き (72)発明者 岡山 浩 鹿児島県国分市山下町1番4号 京セラ株 式会社総合研究所内 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Hiroshi Okayama 1-4-4 Yamashita-cho, Kokubu-shi, Kagoshima Inside the Kyocera Research Institute

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】窒化アルミニウムを主体とするセラミック
絶縁基板と、該基板の表面および/または内部に、Wあ
るいはMoを主体とするメタライズ配線層と、Wあるい
はMoを主成分とし、FeおよびSiを合計で0.1〜
2重量%、NbN、Al2 3 の少なくとも1種を0.
5〜20重量%の割合で含有する抵抗体層を具備するこ
とを窒化アルミニウム質配線基板。
1. A ceramic insulating substrate mainly composed of aluminum nitride, a metallized wiring layer mainly composed of W or Mo on a surface and / or inside of the substrate, and Fe and Si mainly composed of W or Mo. 0.1 ~
2% by weight of at least one of NbN and Al 2 O 3 in 0.1%.
An aluminum nitride wiring board comprising a resistor layer containing 5 to 20% by weight.
【請求項2】窒化アルミニウムを主体とするグリーンシ
ートに、WあるいはMoを主体とするメタライズ配線層
用ペーストを所定箇所に印刷塗布すると同時に、Wある
いはMoを主成分とし、FeおよびSiを合計で0.1
〜2重量%、NbN、Al2 3 の少なくとも1種を
0.5〜20重量%の割合で含有する抵抗体層用ペース
トを印刷塗布した後、非酸化性雰囲気中で同時焼成する
ことを特徴とする窒化アルミニウム質配線基板の製造方
法。
2. A metallized wiring layer paste mainly composed of W or Mo is printed and applied to a predetermined portion on a green sheet mainly composed of aluminum nitride, and at the same time, a total of Fe and Si mainly composed of W or Mo. 0.1
2 wt%, NbN, after printing coated resistor layer paste in a proportion of 0.5 to 20 wt% of at least one Al 2 O 3, that co-fired in a non-oxidizing atmosphere A method for manufacturing an aluminum nitride wiring board, which is characterized in that:
JP32845097A 1997-11-28 1997-11-28 Aluminum nitride wiring board and manufacturing method thereof Expired - Lifetime JP3709062B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP32845097A JP3709062B2 (en) 1997-11-28 1997-11-28 Aluminum nitride wiring board and manufacturing method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP32845097A JP3709062B2 (en) 1997-11-28 1997-11-28 Aluminum nitride wiring board and manufacturing method thereof

Publications (2)

Publication Number Publication Date
JPH11163492A true JPH11163492A (en) 1999-06-18
JP3709062B2 JP3709062B2 (en) 2005-10-19

Family

ID=18210416

Family Applications (1)

Application Number Title Priority Date Filing Date
JP32845097A Expired - Lifetime JP3709062B2 (en) 1997-11-28 1997-11-28 Aluminum nitride wiring board and manufacturing method thereof

Country Status (1)

Country Link
JP (1) JP3709062B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002045470A1 (en) * 2000-11-30 2002-06-06 Tokuyama Corporation Substrate and production method therefor

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002045470A1 (en) * 2000-11-30 2002-06-06 Tokuyama Corporation Substrate and production method therefor
US6762496B2 (en) 2000-11-30 2004-07-13 Tokuyama Corporation Substrate and production method therefor

Also Published As

Publication number Publication date
JP3709062B2 (en) 2005-10-19

Similar Documents

Publication Publication Date Title
JP3517062B2 (en) Copper metallized composition and glass-ceramic wiring board using the same
JP3566569B2 (en) Wiring board and method of manufacturing the same
JPH04212441A (en) Ceramic wiring board
JP3538549B2 (en) Wiring board and method of manufacturing the same
JP3537648B2 (en) Aluminum nitride wiring board and method of manufacturing the same
JP3709062B2 (en) Aluminum nitride wiring board and manufacturing method thereof
JP3411140B2 (en) Metallized composition and method for manufacturing wiring board using the same
JP3537698B2 (en) Wiring board and method of manufacturing the same
JP2000114724A (en) Multilayer wiring board
JP2009004515A (en) Ceramic wiring board and manufacturing method of the ceramic wiring board
JP3366479B2 (en) Metallized composition and method for producing wiring board
JP2002053369A (en) Ceramic sintered compact and wiring board using the same
JP4575614B2 (en) Composite ceramic substrate
JP3101966B2 (en) High thermal expansion Al2O3-SiO2-based sintered body and method for producing the same
JP3786609B2 (en) COMPOSITE CERAMIC COMPONENT AND MANUFACTURING METHOD THEREOF
JP3827447B2 (en) Multilayer wiring board and manufacturing method thereof
JP2003073162A (en) Glass ceramic and wiring board
JP3944839B2 (en) COMPOSITE CERAMIC COMPONENT AND MANUFACTURING METHOD THEREOF
JP2580439B2 (en) High dielectric constant alumina sintered body and method for producing the same
JP3628146B2 (en) Low temperature fired ceramic composition and low temperature fired ceramic
JP2600778B2 (en) Low temperature sintering porcelain composition for multilayer substrate
JP3792355B2 (en) High-strength ceramic sintered body, method for producing the same, and wiring board
JPS63265858A (en) Low-temperature sintered ceramics composition for multi-layered substrate
JPH11274725A (en) Multilayer wiring board and manufacture thereof
JP2002198624A (en) Circuit board

Legal Events

Date Code Title Description
A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20050506

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20050705

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20050802

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20050805

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20080812

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090812

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090812

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100812

Year of fee payment: 5

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100812

Year of fee payment: 5

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110812

Year of fee payment: 6

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110812

Year of fee payment: 6

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120812

Year of fee payment: 7

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130812

Year of fee payment: 8

EXPY Cancellation because of completion of term