JPH10208969A - Laminated ceramic electronic parts - Google Patents
Laminated ceramic electronic partsInfo
- Publication number
- JPH10208969A JPH10208969A JP670897A JP670897A JPH10208969A JP H10208969 A JPH10208969 A JP H10208969A JP 670897 A JP670897 A JP 670897A JP 670897 A JP670897 A JP 670897A JP H10208969 A JPH10208969 A JP H10208969A
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- Japan
- Prior art keywords
- ceramic
- layer
- ceramic layer
- thickness
- capacitor
- Prior art date
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- Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】この発明は、セラミック層を
介して複数の内部電極が重なり合うように積層されてな
るセラミック素子を備える積層セラミック電子部品に関
し、特に、セラミック層の厚みを薄くしても、このセラ
ミック層の機能が大きく低下するのを防止できるととも
に、電子部品の信頼性の向上を図ったものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer ceramic electronic component including a ceramic element in which a plurality of internal electrodes are stacked so as to overlap with each other via a ceramic layer. The function of the ceramic layer can be prevented from being greatly reduced, and the reliability of the electronic component is improved.
【０００２】[0002]
【従来の技術】積層セラミック電子部品、例えば積層セ
ラミックコンデンサは、図１の断面図に示すように、複
数の内部電極１が誘電体からなるセラミック層２を介し
て重なり合うように配置され、かつ交互に両端部に引き
出されたコンデンサ素子３と、このコンデンサ素子３の
両端部に形成された外部電極４とから構成される。2. Description of the Related Art As shown in a sectional view of FIG. 1, a multilayer ceramic electronic component, for example, a multilayer ceramic capacitor, has a plurality of internal electrodes 1 arranged so as to overlap with each other via a ceramic layer 2 made of a dielectric material and alternately. The capacitor element 3 is drawn out to both ends and external electrodes 4 formed at both ends of the capacitor element 3.
【０００３】この積層セラミックコンデンサは、一般に
次のように製造される。まず、セラミック原料とバイン
ダなどを混合してセラミックスラリーを得て、このスラ
リーからセラミックグリーンシートを成形する。次に、
このセラミックグリーンシート上に、金属粉、例えばＡ
ｇ、Ｐｄ、Ａｇ／Ｐｄ合金、Ｃｕ、Ｎｉなどの金属粉と
有機ビヒクルとを混合した導電ペーストを塗布する。次
いで、この導電ペーストが塗布されたセラミックグリー
ンシートを、所定の枚数、積み重ねて圧着し、この積層
体を焼成することによって、コンデンサ素子３を得、次
いで、このコンデンサ素子３の両端部に外部電極４を形
成して、積層セラミックコンデンサとされる。[0003] This multilayer ceramic capacitor is generally manufactured as follows. First, a ceramic slurry is obtained by mixing a ceramic raw material and a binder, and a ceramic green sheet is formed from the slurry. next,
On this ceramic green sheet, a metal powder such as A
A conductive paste in which a metal powder such as g, Pd, Ag / Pd alloy, Cu, Ni or the like and an organic vehicle are mixed is applied. Next, a predetermined number of the ceramic green sheets to which the conductive paste is applied are stacked and pressed, and the laminate is fired to obtain a capacitor element 3. Next, external electrodes are provided on both ends of the capacitor element 3. 4 to form a multilayer ceramic capacitor.
【０００４】ところが、この積層セラミックコンデンサ
は、図１の断面図の円Ａで囲んだ部分の拡大図である図
２に示すように、セラミック層２と内部電極１との境界
面で凹凸がみられ、セラミック層２の厚みが部分的に薄
くなる傾向がある。However, as shown in FIG. 2, which is an enlarged view of a portion surrounded by a circle A in the sectional view of FIG. 1, the multilayer ceramic capacitor has unevenness at the boundary surface between the ceramic layer 2 and the internal electrode 1. Therefore, the thickness of the ceramic layer 2 tends to be partially reduced.
【０００５】ところで、このような積層セラミックコン
デンサは、近年ますます大容量化が強く求められてお
り、このため、セラミック層２の厚みをより薄くする方
法などがとられる。[0005] In recent years, such multilayer ceramic capacitors have been increasingly required to have a larger capacity in recent years. For this reason, a method of reducing the thickness of the ceramic layer 2 and the like have been adopted.
【０００６】[0006]
【発明が解決しようとする課題】しかしながら、このセ
ラミック層２の厚みを薄くした場合、特にその厚みの平
均寸法ｔ１が５μｍ以下になってくると、上記凹凸の影
響でセラミック層２の厚みの最小寸法ｔ２が薄くなるこ
とによって、積層セラミックコンデンサの破壊電圧が大
きく低下するとともに、信頼性が悪くなる問題が起こ
る。However, when the thickness of the ceramic layer 2 is reduced, particularly when the average thickness t1 of the ceramic layer 2 becomes 5 μm or less, the minimum thickness of the ceramic layer 2 is affected by the above-mentioned unevenness. When the dimension t2 is reduced, the breakdown voltage of the multilayer ceramic capacitor is greatly reduced, and the reliability is deteriorated.
【０００７】そこで、本発明は、上記の問題を解決する
ために、セラミック層の平均厚みを５μｍ以下になって
も、破壊電圧などのセラミック層の機能が大きく低下す
るのを防止できるとともに、信頼性の高い積層セラミッ
ク電子部品を提供することを目的とする。In order to solve the above-mentioned problems, the present invention can prevent the function of the ceramic layer such as the breakdown voltage from being greatly reduced even when the average thickness of the ceramic layer is reduced to 5 μm or less. It is an object to provide a multilayer ceramic electronic component having high performance.
【０００８】[0008]
【課題を解決するための手段】上記目的を達成するた
め、本発明は、セラミック層を介して複数の内部電極が
重なり合うように積層され、前記セラミック層の厚みの
平均寸法が５μｍ以下であるセラミック素子を備える積
層セラミック電子部品において、前記セラミック層の厚
みの最小寸法が平均寸法の８０％以上であることを特徴
とする積層セラミック電子部品である。本発明によれ
ば、積層セラミック電子部品のセラミック層の厚みの平
均寸法が５μｍ以下になっても、このセラミック層の厚
みの最小寸法を平均厚みの８０％以上にしたことから、
セラミック層の機能が大きく低下するのを防止できると
ともに、電子部品の信頼性が向上する。In order to achieve the above-mentioned object, the present invention relates to a ceramic wherein a plurality of internal electrodes are stacked so as to overlap each other via a ceramic layer, and the average thickness of the ceramic layer is 5 μm or less. A multilayer ceramic electronic component comprising an element, wherein a minimum dimension of the thickness of the ceramic layer is 80% or more of an average dimension. According to the present invention, even when the average dimension of the thickness of the ceramic layer of the multilayer ceramic electronic component becomes 5 μm or less, the minimum dimension of the thickness of the ceramic layer is set to 80% or more of the average thickness.
The function of the ceramic layer can be prevented from being significantly reduced, and the reliability of the electronic component is improved.
【０００９】[0009]
【発明の実施の形態】本発明の積層セラミック電子部
品、例えば積層セラミックコンデンサを、図１、図２を
用いて説明する。この図１、図２に示す積層セラミック
コンデンサは、先の従来技術の説明にも用いたものであ
り、重複する説明は省略する。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A multilayer ceramic electronic component of the present invention, for example, a multilayer ceramic capacitor will be described with reference to FIGS. The multilayer ceramic capacitors shown in FIGS. 1 and 2 are also used in the description of the prior art described above, and overlapping description will be omitted.
【００１０】本発明の積層セラミックコンデンサは、図
１の断面図の円Ａで囲んだ部分の拡大図である図２に示
すところの、セラミック層２と内部電極１との境界面の
凹凸が大きくならないようにして、セラミック層２の厚
みの平均寸法ｔ１に対する最小寸法ｔ２の比率が８０％
以上になるようにして形成されたものである。このｔ
１、ｔ２の寸法は、図１、図２の断面図に示すところ
の、任意のセラミック層２の厚みを測定して得られたも
のである。In the multilayer ceramic capacitor of the present invention, as shown in FIG. 2, which is an enlarged view of a portion surrounded by a circle A in the sectional view of FIG. 1, the unevenness of the boundary surface between the ceramic layer 2 and the internal electrode 1 is large. In this case, the ratio of the minimum dimension t2 to the average dimension t1 of the thickness of the ceramic layer 2 is 80%.
It is formed as described above. This t
The dimensions 1 and t2 are obtained by measuring the thickness of an arbitrary ceramic layer 2 as shown in the cross-sectional views of FIGS.
【００１１】従って、本発明によれば、積層セラミック
コンデンサのセラミック層２の厚みの平均寸法ｔ１が５
μｍ以下になっても、このセラミック層２の破壊電圧が
大きく低下するのを防止できるとともに、電子部品の信
頼性の向上が図れる。Therefore, according to the present invention, the average thickness t1 of the ceramic layer 2 of the multilayer ceramic capacitor is 5
Even if the thickness is less than μm, it is possible to prevent the breakdown voltage of the ceramic layer 2 from being greatly reduced, and to improve the reliability of the electronic component.
【００１２】上述のセラミック層２と内部電極１との境
界面の凹凸が大きくならないようにするための具体策
は、次のものが採用し得る。The following can be adopted as a concrete measure for preventing the above-mentioned unevenness of the boundary surface between the ceramic layer 2 and the internal electrode 1 from becoming large.
【００１３】セラミックグリーンシートを形成するセ
ラミック原料粉末を微粉化したり、篩いなどに通したり
して粒径の小さいセラミック原料粉末を使用すること。
これによって、セラミックグリーンシート全体が緻密に
なり、焼成して得られるセラミック層２の表面の凹凸の
発生が抑えられる。セラミック原料粉末とバインダと
の分散性がより良好なセラミックスラリーを使用してセ
ラミックグリーンシートを形成すること。これによっ
て、セラミックグリーンシートの密度が均一になり、焼
成して得られるセラミック層２の表面の凹凸の発生が抑
えられる。内部電極１となる金属粉を微粉化したり、
篩いなどに通したりして、粒径の小さい金属粉を使用す
ること。これによって、焼成して得られる内部電極１に
大きな塊が発生しにくくなり、内部電極１の表面の凹凸
の発生が抑えられ、結果としてセラミック層２の凹凸が
抑えられる。The use of a ceramic raw material powder having a small particle size by pulverizing a ceramic raw material powder for forming a ceramic green sheet or passing through a sieve or the like.
Thereby, the entire ceramic green sheet becomes dense, and the occurrence of unevenness on the surface of the ceramic layer 2 obtained by firing is suppressed. Forming a ceramic green sheet using a ceramic slurry having a better dispersibility between the ceramic raw material powder and the binder. Thereby, the density of the ceramic green sheets becomes uniform, and the occurrence of irregularities on the surface of the ceramic layer 2 obtained by firing is suppressed. The metal powder that becomes the internal electrode 1 is pulverized,
Use metal powder with a small particle size, such as through a sieve. As a result, a large lump is less likely to be generated in the internal electrode 1 obtained by firing, and the occurrence of unevenness on the surface of the internal electrode 1 is suppressed, and as a result, the unevenness of the ceramic layer 2 is suppressed.
【００１４】次に、上記の本発明の積層セラミック電子
部品（積層セラミックコンデンサ）の効果を確認するた
めに、以下の実験を行った。Next, in order to confirm the effects of the multilayer ceramic electronic component (multilayer ceramic capacitor) of the present invention, the following experiment was conducted.
【００１５】セラミック層２の厚みの平均寸法ｔ１が３
μｍと５μｍの各積層セラミックコンデンサを、セラミ
ック層２の厚みの平均寸法ｔ１に対する最小寸法ｔ２の
比率（％）を種々変更して作成した。具体的には、内部
電極に含まれるＡｇ／Ｐｄ合金の粒径を変えて、セラミ
ック層２の厚みの平均寸法ｔ１に対する最小寸法ｔ２の
比率（％）が８７％、８３％、８０％、７７％、７４％
になるように種々の積層セラミックコンデンサを作成し
た。そして、この積層セラミックコンデンサの破壊電圧
および寿命試験の評価を行った。この寿命試験は、ｔ１
が５μｍの場合、１５０℃、６４Ｖ（直流電圧）の負荷
を、ｔ１が３μｍの場合、１５０℃、２５Ｖ（直流電
圧）の負荷をそれぞれ５００時間かけた。The average thickness t1 of the ceramic layer 2 is 3
μm and 5 μm multilayer ceramic capacitors were produced by variously changing the ratio (%) of the minimum dimension t2 to the average dimension t1 of the thickness of the ceramic layer 2. Specifically, by changing the particle size of the Ag / Pd alloy included in the internal electrode, the ratio (%) of the minimum dimension t2 to the average dimension t1 of the thickness of the ceramic layer 2 is 87%, 83%, 80%, and 77%. %, 74%
Various multilayer ceramic capacitors were produced as follows. Then, the breakdown voltage and the life test of the multilayer ceramic capacitor were evaluated. This life test is t1
Is 5 μm, a load of 150 ° C. and 64 V (DC voltage) is applied, and when t1 is 3 μm, a load of 150 ° C. and 25 V (DC voltage) is applied for 500 hours.
【００１６】なお、セラミック層２の厚みの平均寸法ｔ
１および最小寸法ｔ２の測定は、積層セラミックコンデ
ンサを研磨して断面を電子顕微鏡を用いて行い、そこか
らｔ２／ｔ１の比率（％）を求めた。The average thickness t of the thickness of the ceramic layer 2
The measurements of 1 and the minimum dimension t2 were made by polishing the multilayer ceramic capacitor and performing a cross section using an electron microscope, and the ratio (%) of t2 / t1 was determined therefrom.
【００１７】上記の実験結果は以下の表１の通りであ
る。The results of the above experiments are shown in Table 1 below.
【００１８】[0018]
【表１】 [Table 1]
【００１９】この表１の結果より、ｔ１が５μｍの場
合、ｔ２／ｔ１の比率が７７％と７４％のものは、破壊
電圧の平均値が２０５Ｖと１８５Ｖとなり、しかも、寿
命試験での絶縁抵抗不良数が１８個と２５個発生してい
る。これに対し、ｔ２／ｔ１の比率が８０％〜８７％の
ものは、破壊電圧の平均値が３０５Ｖ〜３２５Ｖと高
く、８０％以上にすることにより、例えば前者の７７％
のものに比べ破壊電圧の平均値が約１４９％以上向上し
ている、しかも、寿命試験での絶縁抵抗不良数が０個と
信頼性が良くなっている。From the results in Table 1, when t1 is 5 μm, the average breakdown voltage is 205 V and 185 V when the ratio of t2 / t1 is 77% and 74%, and the insulation resistance in the life test is high. The number of defects is 18 and 25. On the other hand, when the ratio of t2 / t1 is 80% to 87%, the average value of the breakdown voltage is as high as 305V to 325V.
The average value of the breakdown voltage is improved by about 149% or more as compared with that of the above, and the number of insulation resistance failures in the life test is 0, and the reliability is improved.
【００２０】また、ｔ１が３μｍの場合についても、表
１の実験結果より、ｔ２／ｔ１の比率が７７％と７４％
のものは、破壊電圧の平均値が７０Ｖと６５Ｖとなり、
しかも、寿命試験での絶縁抵抗不良数が１５個と１９個
発生している。これに対し、ｔ２／ｔ１の比率が８０％
〜８７％のものは、破壊電圧の平均値が１００Ｖ〜１１
０Ｖと高く、８０％以上にすることにより、例えば前者
の７７％のものに比べ破壊電圧の平均値が約１４３％以
上向上している、しかも、寿命試験での絶縁抵抗不良数
が０個と信頼性が良くなっている。Also, in the case where t1 is 3 μm, according to the experimental results in Table 1, the ratio of t2 / t1 is 77% and 74%.
The average value of the breakdown voltage is 70V and 65V,
In addition, 15 and 19 insulation resistance failures have occurred in the life test. On the other hand, the ratio of t2 / t1 is 80%
８７87% have an average breakdown voltage of 100 V１００11
By increasing the voltage to 0 V and 80% or more, for example, the average value of the breakdown voltage is improved by about 143% or more as compared with the former of 77%, and the number of insulation resistance failures in the life test is reduced to zero. Reliability has improved.
【００２１】従って、上記結果より、セラミック層２の
厚みの平均寸法ｔ１が５μｍ以下になっても、ｔ２／ｔ
１の比率を８０％以上とすることにより、破壊電圧が大
きく低下するのを防止できて、電子部品の信頼性の向上
が図れることが分かる。Therefore, from the above results, even if the average thickness t1 of the ceramic layer 2 becomes 5 μm or less, t2 / t
It can be seen that by setting the ratio of 1 to 80% or more, the breakdown voltage can be prevented from greatly decreasing, and the reliability of the electronic component can be improved.
【００２２】なお、表１の破壊電圧の欄の値は、評価サ
ンプル数５０個の破壊電圧の平均値を示し、寿命試験の
欄の値は、評価サンプル数５０個に対する絶縁抵抗不良
数を示している。The values in the breakdown voltage column in Table 1 show the average values of the breakdown voltages of 50 evaluation samples, and the values in the life test column show the number of insulation resistance failures with respect to the 50 evaluation samples. ing.
【００２３】また、今回の実験では、ｔ１が３μｍを下
回るものや、ｔ２／ｔ１の比率が８７％を越えるものの
評価は行っていないが、上記実験の評価結果と同様の効
果が得られるものと考えられる。Also, in this experiment, the evaluation was not made for the case where t1 is less than 3 μm or the case where the ratio of t2 / t1 exceeds 87%, but it is assumed that the same effect as the evaluation result of the above experiment can be obtained. Conceivable.
【００２４】また、上記実験では、導電ペーストの金属
粉にＡｇ／Ｐｄ合金を用いたが、それに限るものでな
く、Ａｇ、Ｐｄ、Ｃｕ、Ｎｉなどの他の金属粉であって
もよい。In the above experiment, the Ag / Pd alloy was used as the metal powder of the conductive paste. However, the present invention is not limited to this, and other metal powders such as Ag, Pd, Cu, and Ni may be used.
【００２５】なお、本発明に係わる積層セラミック電子
部品は、セラミック層を介して複数の内部電極が重なり
合うように積層されてなるセラミック素子を備えるもの
であれば、上記実施例の積層セラミックコンデンサに限
らず、例えば、積層セラミックバリスタなどの他の積層
セラミック電子部品にも等しく適用することができる。The multilayer ceramic electronic component according to the present invention is not limited to the multilayer ceramic capacitor of the above embodiment as long as it has a ceramic element in which a plurality of internal electrodes are stacked so as to overlap with each other via a ceramic layer. For example, the present invention can be equally applied to other multilayer ceramic electronic components such as a multilayer ceramic varistor.
【００２６】[0026]
【発明の効果】以上のように、本発明によれば、セラミ
ック層を介して複数の内部電極が重なり合うように積層
されてなるセラミック素子を備える積層セラミック電子
部品において、そのセラミック層の厚みの平均寸法が５
μｍ以下になっても、このセラミック層の厚みの最小寸
法を平均寸法の８０％以上にしたことにより、セラミッ
ク層の機能が大きく低下するのを防止できるとともに、
信頼性の高い積層セラミック電子部品を提供することが
できる。As described above, according to the present invention, in a multilayer ceramic electronic component including a ceramic element in which a plurality of internal electrodes are stacked so as to overlap with each other via a ceramic layer, the average of the thickness of the ceramic layer is obtained. Dimension is 5
Even if the thickness is less than μm, by setting the minimum dimension of the thickness of the ceramic layer to 80% or more of the average dimension, it is possible to prevent the function of the ceramic layer from being significantly reduced,
A highly reliable multilayer ceramic electronic component can be provided.
【図面の簡単な説明】[Brief description of the drawings]
【図１】本発明の積層セラミック電子部品の一例である
積層セラミックコンデンサの断面図である。FIG. 1 is a sectional view of a multilayer ceramic capacitor which is an example of a multilayer ceramic electronic component of the present invention.
【図２】図１の円Ａで囲んだ部分を示した拡大図であ
る。FIG. 2 is an enlarged view showing a portion surrounded by a circle A in FIG.
１・・・内部電極 ２・・・セラミック層 ｔ１・・・セラミック層の厚みの平均寸法 ｔ２・・・セラミック層の厚みの最小寸法 1: Internal electrode 2: Ceramic layer t1: Average thickness of ceramic layer t2: Minimum thickness of ceramic layer
Claims (1)
重なり合うように積層され、前記セラミック層の厚みの
平均寸法が５μｍ以下であるセラミック素子を備える積
層セラミック電子部品において、 前記セラミック層の厚みの最小寸法が平均寸法の８０％
以上であることを特徴とする積層セラミック電子部品。1. A multilayer ceramic electronic component comprising: a ceramic element in which a plurality of internal electrodes are stacked so as to overlap with each other via a ceramic layer, and wherein the ceramic layer has an average thickness of 5 μm or less; The minimum dimension is 80% of the average dimension
A multilayer ceramic electronic component as described above.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP670897A JPH10208969A (en) | 1997-01-17 | 1997-01-17 | Laminated ceramic electronic parts |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP670897A JPH10208969A (en) | 1997-01-17 | 1997-01-17 | Laminated ceramic electronic parts |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH10208969A true JPH10208969A (en) | 1998-08-07 |
Family
ID=11645806
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP670897A Pending JPH10208969A (en) | 1997-01-17 | 1997-01-17 | Laminated ceramic electronic parts |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH10208969A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6404616B2 (en) | 1999-12-24 | 2002-06-11 | Taiyo Yuden Co., Ltd. | Multilayer ceramic capacitor |
-
1997
- 1997-01-17 JP JP670897A patent/JPH10208969A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6404616B2 (en) | 1999-12-24 | 2002-06-11 | Taiyo Yuden Co., Ltd. | Multilayer ceramic capacitor |
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