JPH0955447A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH0955447A JPH0955447A JP7227099A JP22709995A JPH0955447A JP H0955447 A JPH0955447 A JP H0955447A JP 7227099 A JP7227099 A JP 7227099A JP 22709995 A JP22709995 A JP 22709995A JP H0955447 A JPH0955447 A JP H0955447A
- Authority
- JP
- Japan
- Prior art keywords
- circuit pattern
- tape
- solder ball
- semiconductor device
- ground plane
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
Landscapes
- Wire Bonding (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は高周波デバイスに適する
半導体装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device suitable for high frequency devices.
【０００２】[0002]
【従来の技術】半導体装置は実装基板上の回路に当該半
導体装置のアウターリードを半田付けして接続されてい
る。近年、半導体装置は多ピン化、小型化の要請が強
く、これに対応してＢＧＡ（Ｂａｌｌ Ｇｒｉｄ Ａｒ
ｒａｙ）と称される半導体装置が提案されている。これ
は樹脂製テ−プ、例えばポリイミドテ−プの両面に回路
パタ−ンを設けた配線基板に半導体チップを搭載し、当
該半導体チップと配線基板の回路パタ−ンをワイヤ−ボ
ンディングし、配線基板の上面の回路パタ−ンと下面の
回路パタ−ンを当該配線基板に形成したスル−ホ−ルを
介して導通させ、前記下面の回路パタ−ンに接続して設
けた半田ボ−ルに導通させ、当該半田ボ−ル外部接続端
子としたものである。2. Description of the Related Art A semiconductor device is connected to a circuit on a mounting board by soldering outer leads of the semiconductor device. In recent years, there has been a strong demand for semiconductor devices having a large number of pins and miniaturization, and in response to this, BGA (Ball Grid Ar)
A semiconductor device called “ray” has been proposed. This is to mount a semiconductor chip on a wiring board having circuit patterns on both sides of a resin tape, for example, a polyimide tape, and wire bond the semiconductor chip and the circuit pattern of the wiring board to wire. A solder ball provided by connecting the circuit pattern on the upper surface of the board and the circuit pattern on the lower surface to each other through a through hole formed on the wiring board and connecting to the circuit pattern on the lower surface. To the solder ball external connection terminal.
【０００３】ＢＧＡ型の半導体装置においては、前記配
線基板の回路パタ−ンと半導体チップの接続を、ワイヤ
−を用いず直接行うギャングボンディングと称されるも
のがある。これは回路パタ−ンのリ−ド先端幅をより狭
くでき、同じ多ピン数の場合、リ−ドピッチを広げ得て
接続作業がしやすくなり、また同じ半導体チップの場合
には多ピン化できるという作用効果がある。Some BGA type semiconductor devices are called gang bonding in which the circuit pattern of the wiring board and the semiconductor chip are directly connected without using wires. This enables the lead width of the circuit pattern to be made narrower, the lead pitch can be widened for the same number of pins, which facilitates connection work, and the number of pins for the same semiconductor chip can be increased. There is an effect.
【０００４】[0004]
【この発明が解決しようとする課題】しかし、ギャング
ボンディングによる接続の半導体装置では、グランドプ
レ−ンとして別体のプレ−ンを要することになり、樹脂
製テ−プにグランドプレ−ンを要せば両面銅箔テ−プを
使用することになりコスト高となる。However, in a semiconductor device connected by gang bonding, a separate plane is required as a ground plane, and the resin tape requires the ground plane. If so, a double-sided copper foil tape will be used, resulting in high cost.
【０００５】本発明はギャンクボンディング接続であっ
て多ピン化が容易でありながら、別体のグランドプレ−
ンを不要とし、高周波デバイスに適する半導体装置を低
コストで得ることを目的とする。The present invention is a gank bonding connection, which facilitates the increase of the number of pins, while providing a separate ground plane.
It is an object of the present invention to obtain a semiconductor device suitable for a high frequency device at a low cost, without using a device.
【０００６】[0006]
【課題を解決するための手段】本発明の要旨は、片面に
回路パタ−ンを形成し他面側に接着剤を介して補強支持
材が接着された樹脂製テ−プと、該樹脂製テ−プに形成
された前記回路パタ−ンのリ−ド先端とギャングボンド
で接続した半導体チップと、前記回路パタ−ンに接続し
た半田ボ−ルとを有する半導体装置において、前記補強
支持材と前記半田ボ−ルの中の所定半田ボ−ルを、樹脂
製テ−プと接着剤層に形成した貫通孔を介して導通し、
当該補強支持材にグランドプレ−ンの機能も具備させた
半導体装置にある。DISCLOSURE OF THE INVENTION The gist of the present invention is a resin tape having a circuit pattern formed on one surface and a reinforcing support material bonded to the other surface via an adhesive, and a resin tape. In the semiconductor device having a semiconductor chip connected to the lead end of the circuit pattern formed on the tape with a gang bond, and a solder ball connected to the circuit pattern, the reinforcing support material And a predetermined solder ball in the solder ball, through the resin tape and through holes formed in the adhesive layer, to conduct,
This is a semiconductor device in which the reinforcing support material also has the function of a ground plane.
【０００７】[0007]
【作用】本発明は、片面に半田ボ−ルが接続される回路
パタ−ンを設けた樹脂製テ−プを、他面側に接着した補
強支持材で補強支持し、該回路パタ−ンのリ−ド先端を
ギャングボンディングで半導体チップと接続した半導体
装置であって、前記補強支持材と前記半田ボ−ルの中の
所定の半田ボ−ルを、樹脂製テ−プ及び接着剤層に形成
した貫通孔を通して電気的に導通させ、補強支持材にグ
ランドプレ−ンの機能をも兼備させている。而して、ギ
ャンクボンディングした当該半導体装置は別体のグラン
ドプレ−ンを省略でき小型化・薄型化できる。また、回
路パタ−ンは片面側だけに形成しているので、ＢＧＡ型
の半導体装置が有する高周波デバイスが低コストで得ら
れる。According to the present invention, a resin tape having a circuit pattern to which a solder ball is connected on one side is reinforced and supported by a reinforcing support member adhered to the other side, and the circuit pattern is reinforced. Is a semiconductor device in which the tip of the lead is connected to a semiconductor chip by gang bonding, and a reinforcing tape and a predetermined solder ball in the solder ball are formed by a resin tape and an adhesive layer. The reinforcing support also functions as a ground plane by electrically connecting through the through hole formed in. Thus, the gank-bonded semiconductor device can be made compact and thin because a separate ground plane can be omitted. Further, since the circuit pattern is formed only on one side, the high frequency device included in the BGA type semiconductor device can be obtained at low cost.
【０００８】[0008]
【実施例】次に、本発明について１実施例に基づき図面
を参照して述べる。図面において、１は樹脂製テ−プ
で、例えばポリミイドテ−プであり、その上面に接着し
た金属箔例えばＣｕ箔等からエッチングで形成された回
路パタ−ン２が設けられている。該回路パタ−ン２はＮ
ｉ、Ａｕ又はＳｎめっきされ、そのリ−ド先端２ａが半
導体チップ３の搭載領域まで延出していて、バンブ４を
介して半導体チップ３とギャングボンディングしてい
る。DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described based on one embodiment with reference to the drawings. In the drawing, 1 is a resin tape, for example, a polymide tape, and a circuit pattern 2 formed by etching from a metal foil such as a Cu foil adhered to the upper surface thereof is provided. The circuit pattern 2 is N
The lead tip 2a is plated with i, Au or Sn and extends to the mounting region of the semiconductor chip 3, and is gang-bonded to the semiconductor chip 3 via the bump 4.
【０００９】５は前記回路パタ−ン２を設けた樹脂製テ
−プ１の補強支持材で、例えば金属薄板であり、接着剤
６を介して回路パタ−ン２の上面側に設けられ、樹脂製
テ−プ１を補強し、曲がり、捻じれ、反り等の変形が生
じないようにしている。Reference numeral 5 denotes a reinforcing support member for the resin tape 1 provided with the circuit pattern 2, which is, for example, a thin metal plate and is provided on the upper surface side of the circuit pattern 2 with an adhesive 6 interposed therebetween. The resin tape 1 is reinforced to prevent deformation such as bending, twisting and warping.
【００１０】７は半田ボ−ルで、前記樹脂製テ−プ１の
所定箇所に設けた貫通孔８を通して所定の回路パタ−ン
２に接続するように設けられ外部接続端子として機能す
る。A solder ball 7 is provided so as to be connected to a predetermined circuit pattern 2 through a through hole 8 formed in a predetermined portion of the resin tape 1 and functions as an external connection terminal.
【００１１】ところで、従来のギャングボンディングし
たＢＧＡの半導体装置では、グランドプレ−ンを別体に
て設けていてそれなりの効果があるものの、コストが高
いため実用化を妨げている。そこで本発明では、前記半
田ボ−ル７の中の任意の半田ボ−ル７ａを、前記樹脂製
テ−プ１及び接着剤６層に形成した貫通孔９を通して前
記補強支持材５と導通させ、補強支持材５をグランドプ
レ−ンとしても機能させる。By the way, in the conventional gang-bonded BGA semiconductor device, although the ground plane is provided as a separate body and there is some effect, the high cost hinders its practical use. Therefore, in the present invention, an arbitrary solder ball 7a in the solder ball 7 is electrically connected to the reinforcing support member 5 through the resin tape 1 and the through hole 9 formed in the adhesive 6 layer. , The reinforcing support material 5 also functions as a ground plane.
【００１２】前記半田ボ−ル７ａと補強支持材５の接続
に際しては、予め補強支持材５の表面にＳｎめっき等の
表面処理を施しておけば、よりスム−ズに行える。In connecting the solder ball 7a and the reinforcing support member 5, if the surface of the reinforcing support member 5 is subjected to a surface treatment such as Sn plating in advance, the connection can be made smoother.
【００１３】また、前記樹脂製テ−プ１の貫通孔８は、
予め回路パタ−ン２と半田ボ−ル７の導通箇所が分かる
ので、前もって形成しておくとよい。また前記接着剤６
層への貫通孔９の形成においても、グランドとして用い
る半田ボ−ル７ａは予め分かるので、それに対応した箇
所の接着剤６層に空所を作っておくことで容易になされ
る。The through hole 8 of the resin tape 1 is
Since the conductive portion between the circuit pattern 2 and the solder ball 7 can be known in advance, it is preferable to form it in advance. Also, the adhesive 6
Even when the through hole 9 is formed in the layer, the solder ball 7a used as the ground is known in advance, so that it can be easily made by forming a space in the adhesive 6 layer at a position corresponding to the solder ball 7a.
【００１４】なお、１０は半導体チップ３を支持固定用
の樹脂である。また、放熱板を補強支持板５と半導体チ
ップ３の上面に設けることもできる。Reference numeral 10 is a resin for supporting and fixing the semiconductor chip 3. Further, a heat dissipation plate may be provided on the reinforcing support plate 5 and the upper surface of the semiconductor chip 3.
【００１５】[0015]
【発明の効果】本発明は、前述のように回路パタ−ンを
設けた樹脂製テ−プの補強支持材を、半田ボ−ルの中の
所定の半田ボ−ルと導通させグランドプレ−ンとしても
機能させているので、ギャングボンディングしたＢＧＡ
型の半導体装置をより低コスト化できる。また、回路パ
タ−ンは樹脂製テ−プの片側に設ければよいので、この
面からもコスト低減が図れる等の効果がある。According to the present invention, the reinforcing support member of the resin tape provided with the circuit pattern as described above is electrically connected to the predetermined solder ball in the solder ball. Since it is also functioning as a connector, gang-bonded BGA
Type semiconductor device can be further reduced in cost. Further, since the circuit pattern may be provided on one side of the resin tape, there is an effect such as cost reduction from this aspect as well.
【図１】本発明の１実施例におけるＢＧＡ型の半導体装
置を示す図。FIG. 1 is a diagram showing a BGA type semiconductor device according to an embodiment of the present invention.
１ 樹脂製テ−プ ２ 回路パタ−ン ３ 半導体チップ ４ バンプ ５ 補強支持材 ６ 接着剤 ７ 半田ボ−ル ８ 貫通孔 ９ 貫通孔 １０ 樹脂 1 Resin Tape 2 Circuit Pattern 3 Semiconductor Chip 4 Bump 5 Reinforcement Supporting Material 6 Adhesive 7 Solder Ball 8 Through Hole 9 Through Hole 10 Resin
Claims (1)
接着剤を介して補強支持材が接着された樹脂性テ−プ
と、該樹脂性テ−プに形成された前記回路パタ−ンのリ
−ド先端部とギャングボンドで接続した半導体チップ
と、前記回路パタ−ンに接続した半田ボ−ルとを有する
半導体装置において、前記補強支持材と前記半田ボ−ル
の中の所定の半田ボ−ルを、前記樹脂性テ−プと前記接
着剤層に設けた貫通孔を介して導通し補強支持材にグラ
ンドプレ−ンの機能も備えたことを特徴とする半導体装
置。1. A resin tape in which a circuit pattern is formed on one surface and a reinforcing support material is bonded to the other surface through an adhesive, and the circuit formed on the resin tape. In a semiconductor device having a semiconductor chip connected to a lead end of a pattern by a gang bond, and a solder ball connected to the circuit pattern, the reinforcing support member and the solder ball are A semiconductor device characterized in that the predetermined solder ball is electrically connected to the resin tape through a through hole formed in the adhesive layer to provide a reinforcing support member with a ground plane function. .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7227099A JPH0955447A (en) | 1995-08-11 | 1995-08-11 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7227099A JPH0955447A (en) | 1995-08-11 | 1995-08-11 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0955447A true JPH0955447A (en) | 1997-02-25 |
Family
ID=16855481
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7227099A Pending JPH0955447A (en) | 1995-08-11 | 1995-08-11 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0955447A (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6201298B1 (en) | 1998-04-28 | 2001-03-13 | Nec Corporation | Semiconductor device using wiring tape |
| KR20010046361A (en) * | 1999-11-12 | 2001-06-15 | 박종섭 | A tape for adhesive solder ball and a semiconductor package which use a tape for adhesive solder ball |
| US6355978B1 (en) | 1999-07-19 | 2002-03-12 | Mitsubishi Denki Kabushiki Kaisha | Package for accommodating electronic parts, semiconductor device and method for manufacturing package |
| EP1019960A4 (en) * | 1997-05-07 | 2002-03-20 | Signetics Kp Co Ltd | Ball grid array semiconductor package and method for making the same |
| KR100379085B1 (en) * | 1998-10-31 | 2003-07-10 | 앰코 테크놀로지 코리아 주식회사 | Sealing Method of Semiconductor Device |
-
1995
- 1995-08-11 JP JP7227099A patent/JPH0955447A/en active Pending
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1019960A4 (en) * | 1997-05-07 | 2002-03-20 | Signetics Kp Co Ltd | Ball grid array semiconductor package and method for making the same |
| US6201298B1 (en) | 1998-04-28 | 2001-03-13 | Nec Corporation | Semiconductor device using wiring tape |
| KR100379085B1 (en) * | 1998-10-31 | 2003-07-10 | 앰코 테크놀로지 코리아 주식회사 | Sealing Method of Semiconductor Device |
| US6355978B1 (en) | 1999-07-19 | 2002-03-12 | Mitsubishi Denki Kabushiki Kaisha | Package for accommodating electronic parts, semiconductor device and method for manufacturing package |
| KR20010046361A (en) * | 1999-11-12 | 2001-06-15 | 박종섭 | A tape for adhesive solder ball and a semiconductor package which use a tape for adhesive solder ball |
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