JPH09289139A - Manufacture of solid-state chip electrolytic capacitor - Google Patents
Manufacture of solid-state chip electrolytic capacitorInfo
- Publication number
- JPH09289139A JPH09289139A JP10073896A JP10073896A JPH09289139A JP H09289139 A JPH09289139 A JP H09289139A JP 10073896 A JP10073896 A JP 10073896A JP 10073896 A JP10073896 A JP 10073896A JP H09289139 A JPH09289139 A JP H09289139A
- Authority
- JP
- Japan
- Prior art keywords
- anode lead
- lead wire
- layer
- anode
- electrolytic capacitor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000003990 capacitor Substances 0.000 title claims abstract description 40
- 238000004519 manufacturing process Methods 0.000 title claims description 9
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 claims abstract description 40
- 238000000034 method Methods 0.000 claims abstract description 15
- 239000011347 resin Substances 0.000 claims abstract description 11
- 229920005989 resin Polymers 0.000 claims abstract description 11
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims abstract description 4
- 229910052799 carbon Inorganic materials 0.000 claims abstract description 4
- 239000011248 coating agent Substances 0.000 claims abstract description 4
- 238000000576 coating method Methods 0.000 claims abstract description 4
- 239000007787 solid Substances 0.000 claims description 24
- 238000007747 plating Methods 0.000 claims description 18
- 238000005520 cutting process Methods 0.000 claims description 6
- 239000007784 solid electrolyte Substances 0.000 claims description 2
- 238000004904 shortening Methods 0.000 abstract 1
- 238000007772 electroless plating Methods 0.000 description 5
- 238000005452 bending Methods 0.000 description 3
- 230000002542 deteriorative effect Effects 0.000 description 3
- 238000005488 sandblasting Methods 0.000 description 3
- 238000005304 joining Methods 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 2
- LVGUZGTVOIAKKC-UHFFFAOYSA-N 1,1,1,2-tetrafluoroethane Chemical compound FCC(F)(F)F LVGUZGTVOIAKKC-UHFFFAOYSA-N 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000007598 dipping method Methods 0.000 description 1
- 239000003792 electrolyte Substances 0.000 description 1
- 238000007610 electrostatic coating method Methods 0.000 description 1
- 238000007373 indentation Methods 0.000 description 1
- 238000010791 quenching Methods 0.000 description 1
- 239000004576 sand Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
- H01G2/00—Details of capacitors not covered by a single one of groups H01G4/00-H01G11/00
- H01G2/02—Mountings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
- H01G2/00—Details of capacitors not covered by a single one of groups H01G4/00-H01G11/00
- H01G2/02—Mountings
- H01G2/06—Mountings specially adapted for mounting on a printed-circuit support
- H01G2/065—Mountings specially adapted for mounting on a printed-circuit support for surface mounting, e.g. chip capacitors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/002—Details
- H01G4/228—Terminals
- H01G4/236—Terminals leading through the housing, i.e. lead-through
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
Abstract
Description
【０００１】本発明はチップ形固体電解コンデンサの製
造方法に関するものである。The present invention relates to a method for manufacturing a chip type solid electrolytic capacitor.
【０００２】[0002]
【従来の技術】従来のチップ形固体電解コンデンサは、
図３に示すように陽極導出線２を具備したコンデンサ素
子１を樹脂外装したのち、前記陽極導出線２及び前記コ
ンデンサ素子１の一部分それぞれに電気的，機械的に接
続する陽極電極層４ａ及び陰極電極層４ｂを形成してい
た。2. Description of the Related Art A conventional chip type solid electrolytic capacitor is
As shown in FIG. 3, after the capacitor element 1 having the anode lead wire 2 is covered with resin, the anode lead wire 2 and a part of the capacitor element 1 are electrically and mechanically connected to the anode electrode layer 4a and the cathode. The electrode layer 4b was formed.
【０００３】上述の従来のチップ形固体電解コンデンサ
の陽極電極層４ａは、陽極導出線２との接合を強固にす
る為、陽極導出線２上の誘電体酸化皮膜などをサンドブ
ラスト法で除去するとともに、陽極導出線２の表面に凹
凸面を形成し、その上に無電解めっき層を形成して陽極
電極層４ａを構成していた。The anode electrode layer 4a of the conventional chip-type solid electrolytic capacitor described above is formed by removing the dielectric oxide film and the like on the anode lead-out wire 2 by sandblasting in order to strengthen the connection with the anode lead-out wire 2. An uneven surface was formed on the surface of the anode lead wire 2, and an electroless plating layer was formed on the uneven surface to form the anode electrode layer 4a.
【０００４】[0004]
【発明が解決しようとする課題】しかしながら前記の従
来のチップ状固体電解コンデンサは、上述の通り凹凸面
を形成した陽極導出線２と無電解めっき層を接合する部
分がチップ形固体電解コンデンサの突起分の長さ、即ち
陽極タブ長さに直接影響する。However, in the above-described conventional chip-shaped solid electrolytic capacitor, the portion for joining the anode lead-out wire 2 having the uneven surface and the electroless plating layer as described above is the protrusion of the chip-type solid electrolytic capacitor. It directly affects the length of the minute, that is, the anode tab length.
【０００５】よって、上記の陽極タブ長さは、チップ状
固体電解コンデンサの体積有効活用率を低いものとする
上、実装基板設計時、実装面積を大きくし、高密度実装
化への妨げとなっていた。Therefore, the above-mentioned length of the anode tab makes the volume effective utilization rate of the chip-shaped solid electrolytic capacitor low and, at the time of designing the mounting board, increases the mounting area and hinders high-density mounting. Was there.
【０００６】現在まで、このタブ長さを短くすることが
検討されてきたが、サンドブラスト法による加工精度等
を含め、現状以上にタブ長さを短くすることが実際上困
難であり、今後このタブ長さをいかに短寸化するかが重
要な課題となっていた。Until now, it has been studied to shorten the tab length, but it is practically difficult to shorten the tab length more than the current one, including the processing accuracy by the sandblast method, and this tab will be used in the future. An important issue was how to shorten the length.
【０００７】一方、上述の課題を解決する為、図４，５
に示すように陽極導出線２の先端部と無電解めっき層と
を接続する構造が提示されている。On the other hand, in order to solve the above problems, FIGS.
As shown in FIG. 3, a structure is proposed in which the tip of the anode lead wire 2 and the electroless plating layer are connected.
【０００８】ところが、図５に示すように上記構造品は
コンデンサ素子を樹脂外装したのち陽極導出線２をカッ
トし、無電解めっき層を形成するものであるが、前記陽
極導出線２のカット面がカット歯により鏡面もしくは、
比較的凹凸の無いなめらかな面となってしまうので、無
電解めっき層との接合が不充分となり、インピーダンス
特性などの電気特性が劣化し、特に、半田耐熱試験（例
えば２４０℃ １０秒間 半田ディップ）後は、著しい
インピーダンス特性の劣化が認められ、実用化すること
が困難であった。However, as shown in FIG. 5, in the above-mentioned structure, the capacitor lead is coated with resin and then the anode lead wire 2 is cut to form an electroless plating layer. Is a mirror surface due to the cut teeth, or
Since it becomes a smooth surface with relatively no unevenness, the connection with the electroless plating layer becomes insufficient, and the electrical characteristics such as impedance characteristics deteriorate, especially in the solder heat resistance test (for example, solder dipping at 240 ° C for 10 seconds). After that, remarkable deterioration of impedance characteristics was observed, and it was difficult to put it into practical use.
【０００９】本発明は上記従来の課題を解決するもの
で、従来のチップ形固体電解コンデンサに対し、インピ
ーダンス特性をはじめとする電気特性及び生産性、歩留
を低下させることなくタブ長さを短寸化し、優れた体積
有効活用率を有するチップ形固体電解コンデンサの製造
方法を提供することを目的とするものである。The present invention solves the above-mentioned conventional problems, and shortens the tab length as compared with the conventional chip-type solid electrolytic capacitor without lowering the electrical characteristics such as impedance characteristics and productivity, and the yield. It is an object of the present invention to provide a method for manufacturing a chip-type solid electrolytic capacitor that is reduced in size and has an excellent effective volume utilization rate.
【００１０】[0010]
【課題を解決する為の手段】本発明は、陽極導出線２を
具備した陽極体表面に、誘電体酸化皮膜、固体電解質
層、カーボン層、陰極電極層を形成して成るコンデンサ
素子１に外装樹脂３を被覆したのち該陽極導出線２に刻
み目を形成し、該刻み目１０より陽極導出線２を切断さ
せてなる破断面と接続するめっきを施し、該めっき層１
３上に陽極電極層４ａを形成することを特徴とするチッ
プ形固体電解コンデンサの製造方法である。ここで、上
記破断面は外装樹脂層とほぼ同一平面をなすように形成
される。According to the present invention, a capacitor element 1 is formed by forming a dielectric oxide film, a solid electrolyte layer, a carbon layer, and a cathode electrode layer on the surface of an anode body having an anode lead wire 2. After coating with the resin 3, notches are formed in the anode lead-out wire 2, and plating is performed to connect to a fracture surface formed by cutting the anode lead-out wire 2 from the notch 10 to form the plating layer 1
3 is a method for manufacturing a chip-type solid electrolytic capacitor, which is characterized in that the anode electrode layer 4a is formed on the electrode 3. Here, the fracture surface is formed so as to be substantially flush with the exterior resin layer.
【００１１】[0011]
【発明の実施の形態】コンデンサ素子１に外装樹脂３を
被覆したのち、該陽極導出線２に刻み目１０を形成し、
該刻み目１０より陽極導出線２を切断させてなる破断面
が外装樹脂層とほぼ同一平面をなすように形成し、該破
断面と接続するめっきを施し、該めっき層１３上に陽極
電極層４ａを形成する。従来、サンドブラスト法により
陽極導出線の表面に凹凸面を形成し、これにめっき層を
接続していたタブ部分が不要となるので、優れた体積有
効活用率を得ることができる。また、陽極導出線のめっ
き層との接合部分は、導出線の折り取り破断面となるた
め、めっき層と電気的，機械的に接続するのに充分な凹
凸状態を得ることができ、電気特性を劣化させることが
ない。BEST MODE FOR CARRYING OUT THE INVENTION After coating an exterior resin 3 on a capacitor element 1, a notch 10 is formed on the anode lead wire 2,
The anode lead wire 2 is cut from the notch 10 to form a fracture surface that is substantially flush with the exterior resin layer, plating is performed to connect the fracture surface, and the anode electrode layer 4a is formed on the plating layer 13. To form. Conventionally, since an uneven surface is formed on the surface of the anode lead wire by the sand blast method and the tab portion which connects the plating layer to this is not necessary, an excellent effective volume utilization rate can be obtained. Further, since the joining portion of the anode lead wire with the plating layer has a broken cross section of the lead wire, it is possible to obtain a concavo-convex state sufficient to electrically and mechanically connect with the plating layer, and the electrical characteristics Does not deteriorate.
【００１２】[0012]
【実施例１】以下に本発明の実施例について、添付図面
を参照しつつ説明する。Embodiment 1 An embodiment of the present invention will be described below with reference to the accompanying drawings.
【００１３】図１は、本発明の一実施例を示す断面図で
ある。FIG. 1 is a sectional view showing an embodiment of the present invention.
【００１４】この図１においてコンデンサ素子１は、陽
極導出線２を具備した陽極体の表面に誘電体酸化皮膜，
電解質層，カーボン層，陰極層を順次形成したものであ
る。In FIG. 1, the capacitor element 1 comprises a dielectric oxide film on the surface of an anode body having an anode lead wire 2.
An electrolyte layer, a carbon layer, and a cathode layer are sequentially formed.
【００１５】前記コンデンサ素子１を静電塗装法で樹脂
外装し、エアブローやサンドブラストなどの手段によ
り、陽極導出線２及びコンデンサ素子１の陰極層を表出
させたのち、図６に示すように先端がＶ字状の上型１１
と下型１２の間に陽極導出線２を固定して圧接し、陽極
導出線２に陽極導出線２の線径の５０％の深さになるよ
う刻み目１０を設けた。The capacitor element 1 is coated with a resin by an electrostatic coating method, and the anode lead wire 2 and the cathode layer of the capacitor element 1 are exposed by means such as air blow or sand blasting, and then the tip as shown in FIG. Is V-shaped upper mold 11
The anode lead wire 2 was fixed and pressed between the lower die 12 and the lower mold 12, and the notch 10 was provided in the anode lead wire 2 so that the depth was 50% of the wire diameter of the anode lead wire 2.
【００１６】次に前記刻み目にレーザ照射して急冷し
た。このときレーザはＹＡＧレーザを用い、スポット照
射、出力０．６Ｊ、パルス巾２．０ｍｓで処理した。
尚、スポット径は陽極導出線径とほぼ同一とし、約φ
０．３ｍｍとした。又、急冷はフロン１３４ａ等により
約−５５℃とした。Then, the laser was applied to the above-mentioned notch to quench it. At this time, a YAG laser was used as a laser, and the spot irradiation, the output was 0.6 J, and the pulse width was 2.0 ms.
The spot diameter should be approximately the same as the diameter of the anode lead wire,
0.3 mm. Further, the rapid cooling was performed at about -55 ° C. by using Freon 134a.
【００１７】続いて前記刻み目１０を支点として陽極導
出線２を折り曲げて切断した。Subsequently, the anode lead wire 2 was bent and cut using the notch 10 as a fulcrum.
【００１８】次に、前記陽極導出線２の刻み目１０部分
での折り曲げ切断による破断面２ａと接続するＮｉめっ
き層を含む、陽極電極層４ａ及びコンデンサ素子１の陰
極層と接続する陰極電極層４ｂとを形成し、チップ形固
体電解コンデンサを製作した。Next, the anode electrode layer 4a and the cathode electrode layer 4b connected to the cathode layer of the capacitor element 1 including the Ni plating layer connected to the fracture surface 2a formed by bending and cutting at the notch 10 portion of the anode lead-out wire 2. Then, a chip type solid electrolytic capacitor was manufactured.
【００１９】破断面２ａとこれに接続するＮｉめっき層
との接触抵抗を推察すると、前述の刻み目１０は陽極導
出線２の断面積に対し可能な限り小さい方が陽極導出線
２の破断面２ａと接続するＮｉめっき層との接合面積が
広くなり、好ましいものであるが、これは１５％以上の
範囲の面積で形成することが望ましい。即ち、陽極導出
線２の断面積に対し、刻み目１０が１５％未満で形成し
た場合、切断時に折り曲げ回数が多くなり作業性が悪い
上に、折り曲げ時に陽極導出線２とコンデンサ素子１の
陽極体の接続部にストレスが加わることにより、誘電体
酸化皮膜が損傷し、漏れ電流不良が多発する等の問題が
生じる。When the contact resistance between the fracture surface 2a and the Ni plating layer connected thereto is inferred, the fracture surface 2a of the anode lead-out wire 2 is as small as possible with respect to the cross-sectional area of the anode lead-out wire 2 of the above-mentioned notch 10. This is preferable because it increases the bonding area with the Ni plating layer that is connected to the Ni plating layer. However, it is desirable to form this in an area of 15% or more. That is, when the indentation 10 is formed with less than 15% of the cross-sectional area of the anode lead-out wire 2, the number of times of bending is increased at the time of cutting, workability is poor, and the anode lead-out wire 2 and the anode body of the capacitor element 1 are bent during bending. When stress is applied to the connection portion of the dielectric oxide film, the dielectric oxide film is damaged, and problems such as frequent leakage current failures occur.
【００２０】以上の製造方法により製作したチップ形固
体電解コンデンサは、従来サンドブラスト法により陽極
導出線の表面に凹凸面を形成し、これにめっき層を接続
していたタブ部分が不要となる一方、陽極導出線に刻み
目を設け、刻み目より折り曲げ切断して陽極導出線の破
断面を形成した為、この破断面、即ち陽極導出線の一部
分は、めっき層と電気的，機械的に接続するに充分な凹
凸状態を得ることができ、インピーダンス特性などの電
気特性を劣化させることなく、優れた体積有効活用率の
チップ状固体電解コンデンサを得ることができた。表１
は、本発明法により得たチップ状固体電解コンデンサと
図４及び図５に示す従来のチップ状固体電解コンデンサ
と、図３に示す従来のチップ状固体電解コンデンサにお
けるインピーダンス特性の比較である。In the chip type solid electrolytic capacitor manufactured by the above manufacturing method, the uneven surface is formed on the surface of the anode lead wire by the conventional sand blasting method, and the tab portion which connects the plating layer to the surface is not required. Since the anode lead-out wire has a notch and is bent and cut from the notch to form a broken surface of the anode lead-out wire, this broken surface, that is, a part of the anode lead-out wire is sufficient for electrical and mechanical connection with the plating layer. It was possible to obtain such a concavo-convex state, and it was possible to obtain a chip solid electrolytic capacitor having an excellent volume effective utilization rate without deteriorating the electrical characteristics such as impedance characteristics. Table 1
4 is a comparison of impedance characteristics of the chip solid electrolytic capacitor obtained by the method of the present invention, the conventional chip solid electrolytic capacitors shown in FIGS. 4 and 5, and the conventional chip solid electrolytic capacitor shown in FIG.
【００２１】[0021]
【表１】 [Table 1]
【００２２】表１から明らかな通り、本発明による実施
例により得たチップ形固体電解コンデンサは、インピー
ダンス特性を劣化させることなく優れた電気特性を保持
している。As is clear from Table 1, the chip-type solid electrolytic capacitors obtained by the examples according to the present invention have excellent electric characteristics without deteriorating the impedance characteristics.
【００２３】[0023]
【発明の効果】上記製造方法によれば、陽極導出線に刻
み目を設け、これより折り曲げて切断し、陽極導出線の
破断面とＮｉなどのめっき層を接続するようにする為、
従来サンドブラスト法により陽極導出線の表面に凹凸を
形成し、これにめっき層を接続していたタブ部分が不要
となる一方、陽極導出線に刻み目を設け、刻み目より折
り曲げ切断して陽極導出線の破断面を形成した為、この
破断面、即ち陽極導出線の一部分はめっき層と電気的，
機械的に接続するに充分な凹凸状態を得ることができ、
インピーダンス特性などの電気特性を劣化させることな
く、優れた体積有効活用率を有するチップ形固体電解コ
ンデンサを得ることができる。According to the above-described manufacturing method, the anode lead wire is provided with a notch, and the anode lead wire is bent and cut to connect the fracture surface of the anode lead wire to the plating layer such as Ni.
Conventionally, the unevenness is formed on the surface of the anode lead-out wire by the sandblast method, and the tab portion that connects the plating layer to this is unnecessary, while the notch is provided on the anode lead-out wire and the anode lead-out wire is bent and cut from the notch. Since a fracture surface is formed, this fracture surface, that is, a part of the anode lead wire, is electrically connected to the plating layer,
It is possible to obtain a concavo-convex state sufficient for mechanical connection,
It is possible to obtain a chip type solid electrolytic capacitor having an excellent volume effective utilization rate without deteriorating electrical characteristics such as impedance characteristics.
【図１】本発明による一実施例を示すチップ形固体電解
コンデンサの断面図である。FIG. 1 is a cross-sectional view of a chip-type solid electrolytic capacitor showing an embodiment according to the present invention.
【図２】本発明による一実施例を示す陽極導出線の刻み
目での切断後の状態斜視図である。FIG. 2 is a perspective view showing a state according to an embodiment of the present invention after cutting the anode lead wire at the notch.
【図３】従来のチップ形固体電解コンデンサの断面図で
ある。FIG. 3 is a cross-sectional view of a conventional chip type solid electrolytic capacitor.
【図４】従来のチップ形固体電解コンデンサの他の例を
示す断面図である。FIG. 4 is a cross-sectional view showing another example of a conventional chip-type solid electrolytic capacitor.
【図５】図４に示すチップ形固体電解コンデンサの製造
途中における陽極導出線切断後の状態斜視図である。5 is a perspective view showing a state after cutting the anode lead wire in the process of manufacturing the chip-type solid electrolytic capacitor shown in FIG. 4. FIG.
【図６】本発明による陽極導出線に刻み目を形成する工
程の説明図である。FIG. 6 is an explanatory diagram of a step of forming a notch on the anode lead wire according to the present invention.
１ コンデンサ素子 ２ 陽極導出線 ２ａ 陽極導出線の破断面 ３ 外装樹脂 ４ａ 陽極電極層 ４ｂ 陰極電極層 １０ 陽極導出線の刻み目 １１ 陽極導出線への刻み目形成工程の上型 １２ 陽極導出線への刻み目形成工程の下型 １３ めっき層 DESCRIPTION OF SYMBOLS 1 Capacitor element 2 Anode lead wire 2a Fracture surface of anode lead wire 3 Exterior resin 4a Anode electrode layer 4b Cathode electrode layer 10 Notch of anode lead wire 11 Upper die of notch forming process to anode lead wire 12 Notch to anode lead wire Lower mold 13 of the forming process
Claims (3)
に、誘電体酸化皮膜、固体電解質層、カーボン層、陰極
電極層を形成して成るコンデンサ素子（１）に外装樹脂
（３）を被覆したのち、該陽極導出線（２）に刻み目
（１０）を形成し、該刻み目（１０）より陽極導出線
（２）を切断させてなる破断面と接続するめっきを施
し、該めっき層（１３）上に陽極電極層（４ａ）を形成
することを特徴とするチップ形固体電解コンデンサの製
造方法。1. An exterior resin (3) for a capacitor element (1) formed by forming a dielectric oxide film, a solid electrolyte layer, a carbon layer, and a cathode electrode layer on the surface of an anode body having an anode lead wire (2). After coating with, the notch (10) is formed on the anode lead wire (2), and plating is performed to connect to the fracture surface formed by cutting the anode lead wire (2) from the notch (10), and the plating layer (13) A method for manufacturing a chip-type solid electrolytic capacitor, which comprises forming an anode electrode layer (4a) on it.
をなすように形成することを特徴とする請求項１のチッ
プ系固体電解コンデンサの製造方法。2. The method for manufacturing a chip solid electrolytic capacitor according to claim 1, wherein the fracture surface is formed so as to be substantially flush with the exterior resin layer.
（１０）にレーザー照射して加熱し、急冷した後、折り
曲げ切断することを特徴とする請求項１のチップ形固体
電解コンデンサの製造方法。3. The chip-type solid electrolytic capacitor according to claim 1, wherein the notch (10) formed on the anode lead wire (2) is irradiated with a laser to be heated, rapidly cooled, and then bent and cut. Method.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10073896A JP3794751B2 (en) | 1996-04-23 | 1996-04-23 | Manufacturing method of chip-type solid electrolytic capacitor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10073896A JP3794751B2 (en) | 1996-04-23 | 1996-04-23 | Manufacturing method of chip-type solid electrolytic capacitor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH09289139A true JPH09289139A (en) | 1997-11-04 |
| JP3794751B2 JP3794751B2 (en) | 2006-07-12 |
Family
ID=14281917
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10073896A Expired - Fee Related JP3794751B2 (en) | 1996-04-23 | 1996-04-23 | Manufacturing method of chip-type solid electrolytic capacitor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3794751B2 (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008108931A (en) * | 2006-10-26 | 2008-05-08 | Rohm Co Ltd | Solid-state electrolytic capacitor and its manufacturing method |
| JP2016122689A (en) * | 2014-12-24 | 2016-07-07 | 昭和電工株式会社 | Articles for solid electrolytic capacitor, solid electrolytic capacitor, lead frame, and manufacturing method of solid electrolytic capacitor |
| CN106252063A (en) * | 2016-10-08 | 2016-12-21 | 安徽四新电子有限责任公司 | A kind of novel capacitor |
-
1996
- 1996-04-23 JP JP10073896A patent/JP3794751B2/en not_active Expired - Fee Related
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008108931A (en) * | 2006-10-26 | 2008-05-08 | Rohm Co Ltd | Solid-state electrolytic capacitor and its manufacturing method |
| JP2016122689A (en) * | 2014-12-24 | 2016-07-07 | 昭和電工株式会社 | Articles for solid electrolytic capacitor, solid electrolytic capacitor, lead frame, and manufacturing method of solid electrolytic capacitor |
| US10128053B2 (en) | 2014-12-24 | 2018-11-13 | Showa Denko K.K. | Solid electrolytic capacitor article, solid electrolytic capacitor, lead frame and method for manufacturing solid electrolytic capacitor |
| CN106252063A (en) * | 2016-10-08 | 2016-12-21 | 安徽四新电子有限责任公司 | A kind of novel capacitor |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3794751B2 (en) | 2006-07-12 |
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