JPH09266103A - Chip thermistor and method for manufacturing the same - Google Patents
Chip thermistor and method for manufacturing the sameInfo
- Publication number
- JPH09266103A JPH09266103A JP7404296A JP7404296A JPH09266103A JP H09266103 A JPH09266103 A JP H09266103A JP 7404296 A JP7404296 A JP 7404296A JP 7404296 A JP7404296 A JP 7404296A JP H09266103 A JPH09266103 A JP H09266103A
- Authority
- JP
- Japan
- Prior art keywords
- thermistor
- resistance value
- thin plate
- value adjusting
- electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
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- Thermistors And Varistors (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、各種の電子機器の
温度補償用サーミスタや表面温度測定用センサに適する
チップ型サーミスタ及びその製造方法に関する。更に詳
しくはプリント回路基板等に表面実装されるチップ型サ
ーミスタ及びその製造方法に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a chip type thermistor suitable for a temperature compensating thermistor of various electronic devices and a sensor for measuring a surface temperature, and a manufacturing method thereof. More specifically, the present invention relates to a chip type thermistor surface-mounted on a printed circuit board or the like and a method for manufacturing the same.
【０００２】[0002]
【従来の技術】この種のチップ型サーミスタの製造方法
として、本出願人は、セラミック焼結体よりなる薄板材
の表面に導電性ペーストを帯状に印刷して抵抗値調整用
電極を形成し、上記薄板材を抵抗値調整用電極の長手方
向に直交する方向に切断して短冊状物を作製し、この短
冊状物を抵抗値調整用電極の幅方向の中心線に沿って切
断することにより両端に上記抵抗値調整用電極の一端が
それぞれ位置するチップ状のサーミスタ素体を作製し、
更にこのサーミスタ素体の両端面に抵抗値調整用電極と
電気的に接続される端子電極を形成するチップ型サーミ
スタの製造方法を特許出願した（特開平４−１２７４０
１）。2. Description of the Related Art As a method of manufacturing a chip type thermistor of this type, the present applicant has formed a resistance value adjusting electrode by printing a conductive paste in a strip shape on the surface of a thin plate material made of a ceramic sintered body, By cutting the thin plate material in a direction orthogonal to the longitudinal direction of the resistance value adjusting electrode to produce a strip, by cutting the strip along the center line in the width direction of the resistance adjusting electrode. A chip-shaped thermistor element body in which one end of the resistance value adjusting electrode is located at each end is prepared,
Further, a patent application was filed for a method of manufacturing a chip type thermistor in which terminal electrodes electrically connected to the resistance value adjusting electrodes are formed on both end surfaces of the thermistor body (Japanese Patent Laid-Open No. 12740/1992).
1).
【０００３】このチップ型サーミスタは具体的には次の
方法により製造される。先ずセラミック焼結体よりなる
薄板材の両面又は片面に導電性ペーストを帯状に間隔を
あけて、スクリーン印刷法やロール転写印刷法等にて印
刷した後乾燥することにより、多数列の抵抗値調整用電
極を形成する。次いでこの薄板材の両面にガラス等の絶
縁性無機物を含んだペーストを印刷、吹付け又は浸漬し
た後焼成することにより、絶縁性無機物層を形成する。
この両面が絶縁性無機物層により被覆された薄板材を上
記抵抗値調整用電極の長手方向と直交する方向に短冊状
に切り出した後、短冊状物の切断面に絶縁性無機物を含
んだペーストを印刷、吹付け又は浸漬して焼成すること
により、上記切断面に絶縁性無機物層を形成する。次に
この短冊状物をその長手方向に直交する方向に切断する
ことにより、チップ状のサーミスタ素体を作製し、この
サーミスタ素体の切断面である両端面を含む両端部に導
電性ペーストを塗布し焼成することにより、焼付け電極
層を形成する。更にこの焼付け電極層の表面にめっき層
を形成することにより、両端部に焼付け電極層とめっき
層からなる端子電極を有するチップ型サーミスタを得
る。This chip type thermistor is specifically manufactured by the following method. First, a conductive paste is formed in a strip shape on both sides or one side of a thin plate material made of a ceramic sintered body, printed with a screen printing method or a roll transfer printing method, and then dried to adjust resistance values in a large number of rows. Forming electrodes. Next, an insulating inorganic material layer is formed by printing, spraying or immersing a paste containing an insulating inorganic material such as glass on both sides of this thin plate material and then firing it.
After cutting a thin plate material whose both surfaces are covered with an insulating inorganic material layer in a strip shape in a direction orthogonal to the longitudinal direction of the resistance adjusting electrode, a paste containing an insulating inorganic material on a cut surface of the strip material is formed. The insulating inorganic material layer is formed on the cut surface by printing, spraying or dipping and firing. Next, by cutting this strip in the direction orthogonal to its longitudinal direction, a chip-like thermistor element is produced, and a conductive paste is applied to both ends including both end surfaces that are cut surfaces of the thermistor element. A baked electrode layer is formed by applying and baking. Further, by forming a plating layer on the surface of this baked electrode layer, a chip type thermistor having terminal electrodes composed of the baked electrode layer and the plated layer at both ends is obtained.
【０００４】このように構成されたチップ型サーミスタ
の製造方法では、スクリーン印刷法やロール転写印刷法
等により薄板材の表面に抵抗値調整用電極を形成したの
で、抵抗値調整用電極を電極ペースト中にサーミスタ素
体を浸漬して行う方法より、その寸法精度は高い。この
結果、高精度の抵抗値調整用電極を形成できるので、抵
抗値調整用電極間の間隔も高寸法精度で形成できる。ま
た上記抵抗値調整用電極はセラミック焼結体、即ち、既
に焼結された薄板材に形成されるため、薄板材の焼成収
縮による寸法精度のばらつきの発生を防止できるように
なっている。In the method of manufacturing the chip type thermistor configured as described above, the resistance value adjusting electrode is formed on the surface of the thin plate material by the screen printing method, the roll transfer printing method or the like. The dimensional accuracy is higher than the method in which the thermistor element body is dipped therein. As a result, the resistance value adjusting electrodes can be formed with high accuracy, so that the interval between the resistance value adjusting electrodes can be formed with high dimensional accuracy. Further, since the resistance value adjusting electrode is formed on a ceramic sintered body, that is, on a thin plate material that has already been sintered, it is possible to prevent variation in dimensional accuracy due to firing shrinkage of the thin plate material.
【０００５】一方、両面に抵抗値調整用電極を有する薄
板材を積層し、これらの抵抗値調整電極の各々が並列に
接続されるように上記抵抗値調整用電極を端子電極に接
続して取出した積層形サーミスタが開示されている（特
公昭５０−１１５８５）。この積層形サーミスタでは、
サーミスタのＢ定数を変えることなく初期抵抗値を小さ
くすることができる。即ち、初期抵抗値が小さくしかも
Ｂ定数の大きいサーミスタを得ることができるようにな
っている。On the other hand, thin plate materials having resistance value adjusting electrodes on both sides are laminated, and the resistance value adjusting electrodes are connected to terminal electrodes so that the resistance value adjusting electrodes are connected in parallel. A laminated type thermistor is disclosed (Japanese Patent Publication No. 50-11585). In this laminated thermistor,
The initial resistance value can be reduced without changing the B constant of the thermistor. That is, a thermistor having a small initial resistance value and a large B constant can be obtained.
【０００６】この積層形サーミスタの製造方法を、本出
願人の出願したサーミスタ（特開平６−２３１９０６）
の明細書及び図面に基づいて説明する。先ずセラミック
グリーンシート上面に導電性ペーストを印刷乾燥し抵抗
値調整用電極を形成した後、複数のグリーンシートを積
み重ねてシート状の積層体にし、この積層体を焼成して
焼結シートを作る。次いでこの焼結シートの両面にガラ
スペーストを印刷して焼成することにより絶縁性の結晶
化ガラスからなるガラス層を形成する。次に両面がガラ
ス層で被覆された焼結シートを電極の列方向と直交する
方向に短冊状に切断した後、この短冊状物の両側の切断
面に上記と同様にガラスペーストを印刷焼成して結晶化
ガラスからなるガラス層を形成する。次に上記切断面と
垂直な方向にかつ電極の幅方向の中心線に沿ってこの短
冊状物を細かく切断してサーミスタ素体を作る。このサ
ーミスタ素体の切断面を包むようにサーミスタ素体の両
端部に導電性ペーストを塗布し、焼成して電極層を形成
する。更にこの焼付け電極層を下地電極層としてこの表
面にめっき層を形成して焼付け電極層とめっき層からな
る端止電極を有する積層形サーミスタを得る。A method for manufacturing this laminated type thermistor was applied to the thermistor filed by the present applicant (Japanese Patent Laid-Open No. 6-231906).
Will be described with reference to the specification and drawings. First, a conductive paste is printed and dried on the upper surface of the ceramic green sheet to form a resistance value adjusting electrode, and then a plurality of green sheets are stacked to form a sheet-like laminated body, and the laminated body is fired to form a sintered sheet. Then, glass paste is printed on both surfaces of the sintered sheet and fired to form a glass layer made of insulating crystallized glass. Next, after cutting the sintered sheet whose both surfaces are covered with a glass layer into strips in a direction orthogonal to the column direction of the electrodes, glass paste is printed and fired on the cut surfaces on both sides of this strip in the same manner as above. To form a glass layer made of crystallized glass. Next, the strip is finely cut in a direction perpendicular to the cut surface and along the center line in the width direction of the electrode to form a thermistor body. A conductive paste is applied to both ends of the thermistor body so as to wrap the cut surface of the thermistor body, and is baked to form an electrode layer. Further, by using this baked electrode layer as a base electrode layer, a plating layer is formed on the surface of the baked electrode layer to obtain a laminated thermistor having end-stop electrodes composed of the baked electrode layer and the plated layer.
【０００７】[0007]
【発明が解決しようとする課題】しかし、上記従来のチ
ップ型サーミスタの製造方法では、抵抗値調整用電極が
サーミスタ素体の互いに対向する２つの側面にのみ形成
されているため、サーミスタの抵抗値を減少するのに限
度がある。この結果、サーミスタ特性（抵抗値とＢ定数
の組合せ）の範囲が比較的狭くなるため、近年開発の要
望が増大している低抵抗かつ高Ｂ定数のサーミスタを得
ることができない問題点があった。また、上記従来のチ
ップ型サーミスタの製造方法では、薄板材の表面にガラ
ス等の絶縁性無機物層を形成した状態で薄板材を短冊状
に切り出すため、薄板材及び絶縁性無機物層の熱膨張係
数の違いに起因する熱応力（この熱応力は内部に残留す
る。）により、上記切り出し時に薄板材又は絶縁性無機
物層にマイクロクラック等が発生し、チップ型サーミス
タの機械的強度を十分に得られない問題点があった。こ
の結果、耐基板曲げ性試験や温度サイクル試験等のチッ
プ型サーミスタの強度に関する信頼性試験についても十
分な性能が得られない問題点もあった。一方、上記従来
の積層形サーミスタでは、グリーンシートと導電性ペー
ストとが同時焼成されるため、焼成時のグリーンシート
又は導電性ペーストの収縮によるばらつき等の影響を受
けて十分な寸法精度が得られず、サーミスタの抵抗値に
ばらつきが発生する問題点があった。また、上記従来の
積層形サーミスタでは、サーミスタ素体の表面を被覆す
るガラス層が比較的高温で焼成されるため、サーミスタ
素体の特性を変動させる問題点があった。However, in the above-mentioned conventional method for manufacturing a chip type thermistor, since the resistance value adjusting electrodes are formed only on the two side surfaces of the thermistor element body facing each other, the resistance value of the thermistor is reduced. There is a limit to the reduction. As a result, the range of thermistor characteristics (combination of resistance value and B constant) becomes relatively narrow, so that there has been a problem that a thermistor having a low resistance and a high B constant, which has been increasingly demanded in recent years, cannot be obtained. . Further, in the above-described conventional method of manufacturing a chip type thermistor, since the thin plate material is cut into strips in a state where the insulating inorganic material layer such as glass is formed on the surface of the thin plate material, the thermal expansion coefficient of the thin plate material and the insulating inorganic material layer. Due to the thermal stress caused by the difference (this thermal stress remains inside), micro cracks etc. occur in the thin plate material or the insulating inorganic material layer at the time of the above cutting, and the mechanical strength of the chip type thermistor can be sufficiently obtained. There was no problem. As a result, there has been a problem that sufficient performance cannot be obtained even in reliability tests regarding the strength of the chip type thermistor such as a substrate bending resistance test and a temperature cycle test. On the other hand, in the above conventional laminated type thermistor, since the green sheet and the conductive paste are simultaneously fired, sufficient dimensional accuracy can be obtained under the influence of variations due to shrinkage of the green sheet or the conductive paste during firing. However, there is a problem in that the resistance value of the thermistor varies. Further, in the conventional laminated thermistor, the glass layer covering the surface of the thermistor element body is fired at a relatively high temperature, which causes a problem of varying the characteristics of the thermistor element body.
【０００８】本発明の目的は、抵抗値の調整範囲を広げ
ることにより抵抗値及びＢ定数のサーミスタ特性の範囲
を拡大することができ、低抵抗かつ高Ｂ定数という特性
を容易に得ることができ、更にマイクロクラック等の発
生を防止することにより十分な機械的強度を得ることが
できるチップ型サーミスタ及びその製造方法を提供する
ことにある。本発明の別の目的は、抵抗値のばらつきを
抑えることによりサーミスタ本来の機能精度を向上で
き、サーミスタ素体表面を被覆する被膜の加熱硬化時に
サーミスタ特性の変動を小さくすることができるチップ
型サーミスタ及びその製造方法を提供することにある。The object of the present invention is to widen the range of resistance value and B constant thermistor characteristics by expanding the adjustment range of resistance value, and to easily obtain the characteristics of low resistance and high B constant. Another object of the present invention is to provide a chip type thermistor that can obtain sufficient mechanical strength by preventing the generation of microcracks and the like, and a manufacturing method thereof. Another object of the present invention is to improve the original function accuracy of the thermistor by suppressing variations in resistance value, and to reduce fluctuations in thermistor characteristics during heat curing of the coating that covers the surface of the thermistor body. And to provide a manufacturing method thereof.
【０００９】[0009]
【課題を解決するための手段】請求項１に係る発明は、
図５に示すように、セラミック焼結体よりなる複数の薄
板材１１を積層接着することにより直方体状に形成され
たサーミスタ素体１２と、サーミスタ素体１２の表面及
び内部に形成されサーミスタ素体１２の端面に露出する
複数の抵抗値調整用電極１３と、サーミスタ素体１２の
両端面を含む両端部に設けられ抵抗値調整用電極１３に
電気的に接続された端子電極１４とを備えたチップ型サ
ーミスタの改良である。その特徴ある構成は、薄板材１
１が絶縁性接着剤１６により積層接着され、サーミスタ
素体１２の４側面のうち互いに対向しかつ抵抗値調整用
電極１３が形成された２側面に絶縁性接着剤１６を介し
て絶縁性セラミック板材１５が接着され、サーミスタ素
体１２の４側面のうち２側面以外の２側面が絶縁性を有
する高分子被膜１７により被覆されたところにある。The invention according to claim 1 is
As shown in FIG. 5, a thermistor element body 12 formed into a rectangular parallelepiped shape by laminating and adhering a plurality of thin plate materials 11 made of a ceramic sintered body, and a thermistor element body formed on the surface and inside of the thermistor element body 12. A plurality of resistance adjusting electrodes 13 exposed at the end faces of the thermistor 12; and terminal electrodes 14 provided at both ends of the thermistor body 12 including both end faces and electrically connected to the resistance adjusting electrodes 13. This is an improvement of the chip type thermistor. Its characteristic structure is the thin plate material 1
1 is laminated and adhered by an insulating adhesive 16, and the insulating ceramic plate material is interposed between the two side surfaces of the thermistor element body 12 which face each other and on which the resistance adjusting electrode 13 is formed, through the insulating adhesive 16. 15 is adhered, and two of the four side surfaces of the thermistor element body 12 other than the two side surfaces are covered with the polymer film 17 having an insulating property.
【００１０】このチップ型サーミスタでは、サーミスタ
素体１２の表面及び内部に抵抗値調整用電極１３を有す
る構造であるため、抵抗値を調整する、即ち抵抗値を容
易に減少でき、低抵抗かつ高Ｂ定数のサーミスタ特性を
有するサーミスタ１０を比較的容易に得ることができ
る。またサーミスタ素体１２表面が比較的低温で加熱硬
化可能な高分子被膜１７により被覆されるため、サーミ
スタ素体１２への熱負荷が小さく、抵抗値及びＢ定数の
サーミスタ特性の変動を小さくすることができる。更に
サーミスタ素体１２の４側面のうち２側面に機械的強度
に優れた絶縁性セラミック板材１５が接着されているの
で、サーミスタ１０の強度を向上できる。In this chip type thermistor, the resistance value adjusting electrode 13 is provided on the surface and inside of the thermistor element body 12, so that the resistance value can be adjusted, that is, the resistance value can be easily reduced, and the resistance and the resistance can be increased. The thermistor 10 having the thermistor characteristic of B constant can be obtained relatively easily. Further, since the surface of the thermistor body 12 is covered with the polymer film 17 which can be heat-cured at a relatively low temperature, the thermal load on the thermistor body 12 is small, and the fluctuations of the thermistor characteristics such as the resistance value and the B constant are small. You can Furthermore, since the insulating ceramic plate material 15 having excellent mechanical strength is adhered to two of the four side surfaces of the thermistor body 12, the strength of the thermistor 10 can be improved.
【００１１】請求項２に係る発明は、請求項１に係る発
明であって、更に複数の薄板材がＭｎ，Ｃｏ，Ｃｕ，Ｆ
ｅ，Ａｌ及びＮｉを含む金属酸化物からなる群より選ば
れた１種又は２種以上の金属酸化物を含有するセラミッ
ク焼結体であって、各薄板材毎に金属酸化物の組成比が
異なるように構成されたことを特徴とする。The invention according to claim 2 is the invention according to claim 1, wherein a plurality of thin plate members are Mn, Co, Cu, F.
A ceramic sintered body containing one or more metal oxides selected from the group consisting of metal oxides containing e, Al and Ni, wherein the composition ratio of the metal oxides for each thin plate material is It is characterized by being configured differently.
【００１２】請求項３に係る発明は、図１及び図５に示
すように、セラミック焼結体よりなる薄板材１１の表面
に所定の間隔をあけて互いに平行に多数の抵抗値調整用
電極１３を形成する工程と、抵抗値調整用電極１３が形
成された複数の薄板材１１を一対の絶縁性セラミック板
材１５にて挟んだ状態で複数の薄板材１１及び一対の絶
縁性セラミック板材１５を絶縁性接着剤１６により積層
接着して積層体１８を形成する工程と、積層体１８を抵
抗値調整用電極１３の長手方向に直交する方向に短冊状
に切り出す工程と、短冊状物２１の切断面に絶縁性高分
子ペーストを塗布し乾燥し加熱硬化して被膜付短冊状物
２２を形成する工程と、被膜付短冊状物２２を各抵抗値
調整用電極１３の幅方向の中央に沿ってそれぞれ切断す
ることにより両端に抵抗値調整用電極１３がそれぞれ露
出するサーミスタ素体１２を形成する工程と、サーミス
タ素体１２の両端面及び複数の抵抗値調整用電極１３の
一端面を含むサーミスタ素体１２の両端部に電極層２３
を形成する工程と、電極層２３の表面にめっき層２４を
形成して電極層２３とめっき層２４からなる端子電極１
４を形成する工程とを含むチップ型サーミスタの製造方
法である。In the invention according to claim 3, as shown in FIGS. 1 and 5, a large number of resistance value adjusting electrodes 13 are provided in parallel on the surface of the thin plate material 11 made of a ceramic sintered body at a predetermined interval. Insulating the plurality of thin plate members 11 and the pair of insulating ceramic plate members 15 with the plurality of thin plate members 11 on which the resistance adjusting electrodes 13 are formed being sandwiched by the pair of insulating ceramic plate members 15. Forming a laminated body 18 by laminating and adhering with a conductive adhesive 16, a step of cutting the laminated body 18 into a strip shape in a direction orthogonal to the longitudinal direction of the resistance value adjusting electrode 13, and a cut surface of the strip-shaped material 21. A step of applying the insulating polymer paste to the substrate, drying it, and curing it by heating to form a strip 22 with a coating, and strip 22 with a coating along the center of each resistance value adjusting electrode 13 in the width direction. Both ends by cutting A step of forming the thermistor element body 12 in which the resistance value adjusting electrodes 13 are respectively exposed, and electrodes on both ends of the thermistor element body 12 including both end surfaces of the thermistor element body 12 and one end surfaces of the plurality of resistance value adjusting electrodes 13. Layer 23
And a step of forming the plating layer 24 on the surface of the electrode layer 23 to form the terminal electrode 1 including the electrode layer 23 and the plating layer 24.
4 is a step of forming a chip thermistor.
【００１３】このチップ型サーミスタの製造方法では、
薄板材１１を焼結した後に、この薄板材１１の表面に抵
抗値調整用電極１３を形成し、更にこれらの薄板材１１
を積層接着するため、抵抗値調整用電極１３間の距離が
正確となり、抵抗値のばらつきが小さい高精度のサーミ
スタを得ることができる。またサーミスタ素体１２表面
を被覆する被膜１７が比較的低温で加熱硬化可能な高分
子材料により形成されるため、サーミスタ素体１２への
熱負荷が小さく、抵抗値及びＢ定数のサーミスタ特性の
変動を小さくすることができる。更に高分子被膜１７は
緻密性に優れ、強度に関しても高性能であるため、サー
ミスタ素体１２表面を高分子被膜１７により被覆した状
態で切断するときにマイクロクラック等が発生せず、サ
ーミスタ１０の機械的強度の向上を図ることができる。In the method of manufacturing the chip type thermistor,
After sintering the thin plate material 11, the resistance value adjusting electrode 13 is formed on the surface of the thin plate material 11, and the thin plate material 11 is further formed.
Since the electrodes are laminated and adhered, the distance between the resistance value adjusting electrodes 13 becomes accurate, and a highly accurate thermistor with a small resistance value variation can be obtained. Further, since the coating film 17 that covers the surface of the thermistor body 12 is formed of a polymer material that can be heat-cured at a relatively low temperature, the thermal load on the thermistor body 12 is small, and the thermistor characteristics such as the resistance value and the B constant vary. Can be made smaller. Further, since the polymer coating 17 has excellent denseness and high performance in terms of strength, when the surface of the thermistor body 12 is covered with the polymer coating 17, no microcracks or the like are generated, and the thermistor 10 has It is possible to improve the mechanical strength.
【００１４】[0014]
【発明の実施の形態】次に本発明の第１の実施の形態を
図面に基づいて詳しく説明する。図３及び図５に示すよ
うに、本発明のチップ型サーミスタ１０はセラミック焼
結体よりなる２枚の薄板材１１，１１を積層接着するこ
とによりチップ状に形成されたサーミスタ素体１２と、
サーミスタ素体１２の表面及び内部に形成された８枚の
抵抗値調整用電極１３と、サーミスタ素体１２の両端面
を含む両端部に設けられた一対の端子電極１４，１４と
を備える。８枚の抵抗値調整用電極１３はサーミスタ素
体１２の両端面のうちのいずれか一方の端面に露出し、
一対の端止電極１４，１４は抵抗値調整用電極１３に電
気的に接続される。Next, a first embodiment of the present invention will be described in detail with reference to the drawings. As shown in FIGS. 3 and 5, the chip-type thermistor 10 of the present invention includes a thermistor element body 12 formed in a chip shape by laminating and adhering two thin plate members 11 made of a ceramic sintered body.
Eight resistance value adjusting electrodes 13 formed on the surface and inside of the thermistor element body 12 and a pair of terminal electrodes 14 and 14 provided at both ends including both end surfaces of the thermistor element body 12 are provided. The eight resistance value adjusting electrodes 13 are exposed on either one of the end faces of the thermistor element body 12,
The pair of end stop electrodes 14, 14 are electrically connected to the resistance value adjusting electrode 13.
【００１５】本実施の形態の特徴ある構成は、２枚の薄
板材１１，１１が絶縁性接着剤１６により積層接着さ
れ、サーミスタ素体１２の４側面のうち互いに対向しか
つ抵抗値調整用電極１３が形成された２側面に絶縁性接
着剤１６を介して絶縁性セラミック板材１５が接着さ
れ、更にサーミスタ素体１２の残りの２側面が絶縁性を
有する高分子被膜１７（図３）により被覆されたところ
にある。なお、薄板材を３枚以上積層接着してもよく、
抵抗値調整用電極は所望の抵抗値を得るために７枚以下
又は９枚以上形成してもよい。The characteristic structure of the present embodiment is that two thin plate members 11 and 11 are laminated and adhered by an insulating adhesive 16 and are opposed to each other among the four side surfaces of the thermistor element body 12 and a resistance value adjusting electrode. Insulating ceramic plate material 15 is adhered to the two side surfaces on which 13 is formed via an insulating adhesive 16, and the remaining two side surfaces of the thermistor element body 12 are covered with a polymer film 17 (FIG. 3) having an insulating property. It is in the place where it was done. In addition, three or more thin plate materials may be laminated and bonded,
The resistance value adjusting electrode may be formed in seven or less pieces or in nine or more pieces in order to obtain a desired resistance value.
【００１６】このように構成されたチップ型サーミスタ
の製造方法を図１〜図５を用いて説明する。 (ア) セラミック焼結体からなる薄板材１１の作製 先ずＭｎ，Ｃｏ，Ｃｕ，Ｆｅ，Ａｌ，Ｎｉ等の金属の酸
化物粉末を１種又は２種以上、金属原子比が所定の割合
になるようにそれぞれ秤量し、ボールミル等により５〜
２０時間混合して、脱水し乾燥する。次いでこの混合物
を大気圧下５００〜１０００℃で１〜１０時間仮焼し、
再びボールミル等で粉砕して、脱水し乾燥する。次にこ
の粉砕物に有機系結合材等を加え、スプレードライヤ等
を用いて上記粉砕物の粒径が３０〜２００μｍ程度にな
るように造粒し、油圧プレス等により直方体に圧縮成形
する。更にこの成型物を大気圧下１０００〜１３００℃
で２〜１０時間焼成して、所定の寸法のセラミック焼結
ブロックを作製し、このブロックをバンドソー等を用い
て所定の厚さに切断することにより、薄板材１１を作製
する（図１（ａ））。A method of manufacturing the chip type thermistor having the above structure will be described with reference to FIGS. (A) Preparation of thin plate material 11 made of ceramic sintered body First, one or more kinds of oxide powders of metals such as Mn, Co, Cu, Fe, Al, and Ni are used, and the metal atomic ratio becomes a predetermined ratio. As weigh each and
Mix for 20 hours, dehydrate and dry. Then, the mixture is calcined under atmospheric pressure at 500 to 1000 ° C. for 1 to 10 hours,
It is pulverized again with a ball mill or the like, dehydrated and dried. Next, an organic binder or the like is added to this crushed product, and the crushed product is granulated to have a particle size of about 30 to 200 μm using a spray dryer or the like, and compression-molded into a rectangular parallelepiped by a hydraulic press or the like. Furthermore, this molded product is 1000 to 1300 ° C. under atmospheric pressure.
By firing for 2 to 10 hours, a ceramic sintered block having a predetermined size is manufactured, and this block is cut to a predetermined thickness using a band saw or the like to manufacture the thin plate material 11 (Fig. 1 (a )).
【００１７】(イ) 薄板材１１の表面への抵抗値調整用電
極１３の形成 上記薄板材１１の両面に幅０．２〜２．８ｍｍの帯状の
導電性ペーストを幅方向に０．１〜１．４ｍｍの間隔を
あけて印刷し乾燥する。このとき薄板材１１の両面の導
電性ペーストが薄板材１１を挟んで互いに対向するよう
に印刷する。この薄板材１１を大気圧下７５０〜８５０
℃で保持し、厚さ３〜５μｍの多数列の抵抗値調整用電
極１３を薄板材１１の両面に形成する（図１（ａ））。
なお、導電性ペーストとしてはＡｇペーストやＡｇ−Ｐ
ｄペースト等が用いられ、この導電性ペーストは薄板材
の両面ではなく片面に印刷してもよい。またＡｕ等のレ
ジネートペーストを用いて厚さ０．１〜１μｍの薄膜電
極を形成してもよい。(A) Formation of the resistance adjusting electrode 13 on the surface of the thin plate member 11 A strip-shaped conductive paste having a width of 0.2 to 2.8 mm is formed on both surfaces of the thin plate member 11 in the width direction by 0.1 to 0.1 mm. Print and dry at 1.4 mm intervals. At this time, printing is performed so that the conductive pastes on both surfaces of the thin plate member 11 face each other with the thin plate member 11 interposed therebetween. This thin plate material 11 is heated to 750 to 850 at atmospheric pressure.
The temperature is maintained at 0 ° C., and the resistance value adjusting electrodes 13 having a thickness of 3 to 5 μm are formed on both surfaces of the thin plate member 11 (FIG. 1A).
The conductive paste is Ag paste or Ag-P.
A d-paste or the like is used, and the conductive paste may be printed on one side of the thin plate material instead of both sides. Further, a thin film electrode having a thickness of 0.1 to 1 μm may be formed by using a resinate paste such as Au.
【００１８】(ウ) 絶縁性セラミック板材１５の作成 アルミナ（焼結助剤としてシリカ、マグネシア）等の絶
縁性のセラミック粉末に結合材、可塑剤、溶剤等を混合
して調製したスリップをドクタブレード法等により所定
の厚さのグリーンシートに成形し、このグリーンシート
を所定雰囲気中１３００〜１７００℃で１０〜２０時間
焼成して厚さ０．１５〜０．２０ｍｍの絶縁性セラミッ
ク板材１５を作製する（図１（ａ））。 (エ) 薄板材１１及び絶縁性セラミック板材１５の積層接
着 抵抗値調整電極１３を形成した薄板材１１を複数枚用意
し、これらの薄板材１１に形成された抵抗値調整用電極
１３のパターンがそれぞれ所定の位置になるように位置
決めして積重ね、更にこれらの薄板材１１を２枚の絶縁
性セラミック板材１５，１５で挟んで、絶縁性接着剤１
６により積層接着して積層体１８を形成する（図１
（ｂ）及び図２）。絶縁性接着剤１６としてはエポキシ
系接着剤等の熱硬化性の接着剤を用いることが好まし
い。また上記接着を確実にするために、接着剤１６の硬
化前に積層された薄板材１１及び絶縁性セラミック板材
１５に所定の圧力を加えることが好ましい。(C) Preparation of Insulating Ceramic Plate 15 A slip prepared by mixing an insulating ceramic powder such as alumina (silica as a sintering aid, magnesia) with a binder, a plasticizer, a solvent and the like is used as a doctor blade. Method to form a green sheet having a predetermined thickness, and the green sheet is fired in a predetermined atmosphere at 1300 to 1700 ° C. for 10 to 20 hours to produce an insulating ceramic plate material 15 having a thickness of 0.15 to 0.20 mm. (FIG. 1 (a)). (D) Laminate adhesion of thin plate material 11 and insulating ceramic plate material 15 A plurality of thin plate materials 11 having resistance value adjusting electrodes 13 formed thereon are prepared, and the pattern of the resistance value adjusting electrodes 13 formed on these thin plate materials 11 is Each of them is positioned and stacked so as to have a predetermined position, and these thin plate members 11 are sandwiched by two insulating ceramic plate members 15 and 15 to form an insulating adhesive 1.
6 is laminated and adhered to form a laminated body 18 (FIG. 1).
(B) and FIG. 2). As the insulating adhesive 16, it is preferable to use a thermosetting adhesive such as an epoxy adhesive. Further, in order to ensure the above-mentioned adhesion, it is preferable to apply a predetermined pressure to the thin plate member 11 and the insulating ceramic plate member 15 laminated before the adhesive 16 is cured.
【００１９】(オ) 積層体１８の切断 上記積層体１８をダイシングマシン等により抵抗値調整
用電極１３の長手方向に直交する方向に幅０．７０〜
０．８０ｍｍの短冊状に切り出す（図１（ｃ））。 (カ) 短冊状物２１の切断面の高分子被膜１７による被覆 上記短冊状物２１の切断面に高分子ペーストをスクリー
ン印刷法等により印刷し乾燥後、所定雰囲気中２００〜
２５０℃で１０〜３０分間加熱して硬化することによ
り、高分子被膜１７により被覆された被膜付短冊状物２
２を形成する（図１（ｄ）及び図３）。高分子ペースト
としては、上記と同一種類のエポキシ系ペースト等を用
いることが好ましい。(E) Cutting of laminated body 18 The laminated body 18 is cut by a dicing machine or the like in a width 0.70 in a direction orthogonal to the longitudinal direction of the resistance adjusting electrode 13.
A strip of 0.80 mm is cut out (Fig. 1 (c)). (F) Covering the cut surface of the strip 21 with the polymer film 17 After printing the polymer paste on the cut surface of the strip 21 by a screen printing method or the like, and drying it in a predetermined atmosphere at 200-
A strip-shaped article with a coating 2 coated with the polymer coating 17 by heating and curing at 250 ° C. for 10 to 30 minutes
2 is formed (FIG. 1 (d) and FIG. 3). As the polymer paste, it is preferable to use the same type of epoxy paste as the above.
【００２０】(キ) 被膜付短冊状物２２の切断 上記被膜付短冊状物２２を各抵抗値調整用電極１３の幅
方向の中央に沿って短冊状物２２の長手方向に直交する
方向に、ダイシングマシン等を用いてチップ状に切断す
る（図１（ｅ）及び図４）。この切断により、両端に抵
抗値調整用電極１３の一端面がそれぞれ露出するサーミ
スタ素体１２が得られる。このサーミスタ素体１２の長
さは１．５０〜１．５８ｍｍの範囲に形成されることが
好ましい。 (ク) サーミスタ素体１２の両端部への端子電極１４の形
成 先ず上記チップ状のサーミスタ素体１２の両端面及び抵
抗値調整用電極１３の一端面を含むサーミスタ素体１２
の両端部に貴金属粉末を含む樹脂系フリットの導電性ペ
ーストを塗布して加熱硬化することにより、電極層２３
を形成する。次に電極層２３を下地電極層としてこの表
面にめっき層２４を形成して、電極層２３とめっき層２
４からなる端子電極１４を有するチップ型サーミスタを
得る（図１（ｆ）、図５）。(G) Cutting of the strip 22 with the coating The strip 22 with the coating is cut along the center of the resistance adjusting electrodes 13 in the width direction in a direction orthogonal to the longitudinal direction of the strip 22. It is cut into chips using a dicing machine or the like (FIG. 1 (e) and FIG. 4). By this cutting, the thermistor element body 12 in which both ends of the resistance value adjusting electrode 13 are exposed is obtained. It is preferable that the thermistor body 12 is formed to have a length of 1.50 to 1.58 mm. (H) Formation of the terminal electrodes 14 on both ends of the thermistor element body 12. First, the thermistor element body 12 including both end surfaces of the chip-like thermistor element body 12 and one end surface of the resistance value adjusting electrode 13 is formed.
A conductive paste of a resin-based frit containing a noble metal powder is applied to both ends of the electrode layer and heat-cured to form the electrode layer 23.
To form Next, the electrode layer 23 is used as a base electrode layer, and a plating layer 24 is formed on this surface to form the electrode layer 23 and the plating layer 2.
A chip type thermistor having the terminal electrodes 14 of 4 is obtained (FIG. 1 (f), FIG. 5).
【００２１】図６は本発明の第２の実施の形態を示す。
図６において図５と同一符号は同一部品を示す。この実
施の形態では、サーミスタ５０の薄板材１１の両面に形
成された抵抗値調整用電極５３のパターンが薄板材１１
の表及び裏で異なる位置に形成される。即ち薄板材１１
の表に形成された抵抗値調整用電極５３はサーミスタ素
体１２の一端に露出し、薄板材１１の裏に形成された抵
抗値調整用電極５３はサーミスタ素体１２の他端に露出
するように形成され、これらの抵抗値調整用電極５３は
互いに重なる部分を有する。上記以外は第１の実施の形
態と同一に構成される。なお、上記抵抗値調整用電極
は、サーミスタの抵抗値を所望の値にするために、様々
なパターン及び枚数に適宜変更できる。従って上記第１
及び第２実施の形態のパターンに限定されるものではな
い。FIG. 6 shows a second embodiment of the present invention.
6, the same reference numerals as those in FIG. 5 indicate the same parts. In this embodiment, the pattern of the resistance value adjusting electrodes 53 formed on both surfaces of the thin plate member 11 of the thermistor 50 is the thin plate member 11.
Are formed at different positions on the front and back. That is, the thin plate material 11
The resistance value adjusting electrode 53 formed on the front surface of the thermistor element body 12 is exposed at one end of the thermistor element body 12, and the resistance value adjusting electrode 53 formed on the back surface of the thin plate member 11 is exposed at the other end of the thermistor element body 12. And the resistance adjusting electrodes 53 have portions overlapping each other. The configuration other than the above is the same as that of the first embodiment. The resistance value adjusting electrode can be appropriately changed into various patterns and numbers in order to set the resistance value of the thermistor to a desired value. Therefore, the first
The pattern is not limited to the pattern of the second embodiment.
【００２２】[0022]
【実施例】次に本発明の実施例を比較例とともに詳しく
説明する。 ＜実施例１＞図１〜図５に示すように、次の方法で製造
されたチップ型サーミスタ１０を実施例１とした。先ず
炭酸マンガン、炭酸コバルト、酸化銅を出発原料とし、
これらを金属原子比が所定の割合になるようにそれぞれ
秤量し、ボールミルで１６時間均一に混合して、脱水し
乾燥した。この混合物を大気圧下９００℃で２時間仮焼
し、再びボールミルで粉砕して、脱水し乾燥した。この
粉砕物に有機系結合材を加え、スプレードライヤにより
粉砕物の粒径が６０μｍ程度になるように造粒し、油圧
プレスにより直方体に圧縮成形した。この成型物を大気
圧下１１００℃で４時間焼成し、縦、横及び厚さがそれ
ぞれ３５ｍｍ，５０ｍｍ及び１０ｍｍのセラミック焼結
ブロックを作製し、このブロックをバンドソーで切断し
て、縦、横及び厚さが３５ｍｍ，５０ｍｍ及び０．２０
ｍｍの薄板材１１を作製した（図１（ａ））。Next, examples of the present invention will be described in detail together with comparative examples. <Embodiment 1> As shown in FIGS. 1 to 5, a chip type thermistor 10 manufactured by the following method was used as Embodiment 1. First, manganese carbonate, cobalt carbonate, and copper oxide are used as starting materials,
These were weighed so that the metal atomic ratio was a predetermined ratio, uniformly mixed in a ball mill for 16 hours, dehydrated and dried. This mixture was calcined at 900 ° C. under atmospheric pressure for 2 hours, ground again with a ball mill, dehydrated and dried. An organic binder was added to this pulverized product, and the pulverized product was granulated by a spray dryer so that the particle size was about 60 μm, and compression molded into a rectangular parallelepiped by a hydraulic press. This molded product was fired at 1100 ° C. under atmospheric pressure for 4 hours to produce ceramic sintered blocks having lengths, widths and thicknesses of 35 mm, 50 mm and 10 mm, respectively, and the blocks were cut with a band saw to obtain length, width and 35mm, 50mm and 0.20 thickness
A thin plate member 11 having a thickness of mm was produced (FIG. 1A).
【００２３】次いでこの薄板材１１の両面に幅２．７ｍ
ｍの帯状のＡｇペーストを幅方向に０．２０ｍｍの間隔
をあけてスクリーン印刷法により印刷し乾燥した。この
とき薄板材１１の両面のＡｇ性ペーストが薄板材１１を
挟んで互いに対向するように印刷した。この薄板材１１
を大気圧下８２０℃で保持して、上記Ａｇペーストを薄
板材１１に焼付けることにより、厚さ約５μｍの多数列
の抵抗値調整用電極１３を形成した（図１（ａ））。一
方、アルミナ粉末に結合材、可塑剤、溶剤等を混合して
調製したスリップをドクタブレード法により所定の厚さ
のグリーンシートに成形し、このグリーンシートを大気
中１５００℃で１５時間焼成して、縦、横及び厚さがそ
れぞれ３５ｍｍ，５０ｍｍ及び０．２０ｍｍの絶縁性セ
ラミック板材１５を作製した（図１（ａ））。Next, a width of 2.7 m is applied to both sides of the thin plate material 11.
m band-shaped Ag paste was printed by a screen printing method at intervals of 0.20 mm in the width direction and dried. At this time, the Ag paste on both surfaces of the thin plate member 11 was printed so as to face each other with the thin plate member 11 interposed therebetween. This thin plate material 11
Was held at 820 ° C. under atmospheric pressure, and the Ag paste was baked on the thin plate material 11 to form a plurality of rows of resistance value adjusting electrodes 13 having a thickness of about 5 μm (FIG. 1A). On the other hand, a slip prepared by mixing a binder, a plasticizer, a solvent and the like with alumina powder is formed into a green sheet having a predetermined thickness by a doctor blade method, and this green sheet is fired at 1500 ° C. for 15 hours in the atmosphere. An insulating ceramic plate material 15 having a length, width, and thickness of 35 mm, 50 mm, and 0.20 mm was produced (FIG. 1A).
【００２４】上記抵抗値調整電極１３を形成した薄板材
１１を２枚用意し、これらの薄板材１１に形成された抵
抗値調整用電極１３のパターンがそれぞれ所定の位置に
なるように位置決めして積重ね、更にこれらの薄板材１
１を２枚の絶縁性セラミック板材１５で挟んで、エポキ
シ系接着剤等の絶縁性接着剤１６により積層接着して積
層体１８を形成した（図１（ｂ）及び図２）。このとき
上記接着を確実にするために、接着剤１６の硬化前に積
層された２枚の薄板材１１，１１に所定の圧力を加え
た。Two thin plate members 11 on which the resistance value adjusting electrodes 13 are formed are prepared and positioned so that the patterns of the resistance value adjusting electrodes 13 formed on these thin plate members 11 are at predetermined positions. Stacked and further these thin plate materials 1
1 was sandwiched between two insulating ceramic plate materials 15 and laminated and adhered with an insulating adhesive 16 such as an epoxy adhesive to form a laminated body 18 (FIGS. 1B and 2). At this time, in order to ensure the above-mentioned adhesion, a predetermined pressure was applied to the two thin plate members 11, 11 laminated before the adhesive 16 was cured.
【００２５】この積層体１８をダイシングマシンにより
抵抗値調整用電極１３の長手方向に直交する方向に幅
０．７５ｍｍの短冊状に切り出し（図１（ｃ））、この
短冊状物２１の切断面に高分子ペーストをスクリーン印
刷法により印刷し乾燥後、大気雰囲気中２５０℃で２０
分間加熱して硬化することにより、高分子被膜１７によ
り被覆された被膜付短冊状物２２を形成した（図１
（ｄ））。この被膜付短冊状物２２を各抵抗値調整用電
極１３の幅方向の中央に沿って短冊状物２２の長手方向
に直交する方向に、ダイシングマシンを用いてチップ状
に切断し、長さ１．５２ｍｍのチップ状のサーミスタ素
体１２を作製した（図１（ｅ）及び図４）。このサーミ
スタ素体１２の両端には抵抗値調整用電極１３の一端面
がそれぞれ露出した。This laminated body 18 is cut into a strip shape having a width of 0.75 mm in a direction orthogonal to the longitudinal direction of the resistance value adjusting electrode 13 by a dicing machine (FIG. 1 (c)), and a cut surface of the strip 21 is cut. After printing the polymer paste on screen by the screen printing method and drying, at 20 ℃ in air atmosphere
By heating and curing for a minute, a strip 22 with a coating coated with the polymer coating 17 was formed (FIG. 1).
(D)). The coated strip 22 is cut into chips in a direction orthogonal to the longitudinal direction of the strip 22 along the center of the resistance value adjusting electrodes 13 in the width direction, and is cut into a length of 1 A thermistor element body 12 having a chip shape of 0.52 mm was produced (FIGS. 1E and 4). One end faces of the resistance value adjusting electrodes 13 are exposed at both ends of the thermistor body 12.
【００２６】更にサーミスタ素体１２の両端面及び抵抗
値調整用電極１３の一端面を含むサーミスタ素体１２の
両端部にエポキシ系フリットのＡｇ電極ペーストをディ
ッピング法により塗布した後、２５０℃に３０分間加熱
硬化することにより、サーミスタ素体１２の両端部に電
極層２３を形成した。上記電極層２３の表面にめっき層
２４を形成した（図５）。めっき層２４は上記電極層２
３の表面に電解バレル法により形成された厚さ２〜５μ
ｍのＮｉめっき層２４ａと、Ｎｉめっき層２４ａの表面
に形成された厚さ３〜７μｍのはんだめっき層２４ｂと
を有する。このようにして図１（ｆ）及び図５に示すチ
ップ型サーミスタ１０を得た。Further, Ag electrode paste of epoxy frit is applied to both ends of the thermistor body 12 including both end faces of the thermistor body 12 and one end face of the resistance adjusting electrode 13 by a dipping method, and then at 250 ° C. 30 The electrode layers 23 were formed on both ends of the thermistor element body 12 by heat curing for a minute. A plating layer 24 was formed on the surface of the electrode layer 23 (FIG. 5). The plating layer 24 is the electrode layer 2 described above.
2-5μ formed on the surface of No. 3 by electrolytic barrel method
m of the Ni plating layer 24a and a solder plating layer 24b having a thickness of 3 to 7 μm formed on the surface of the Ni plating layer 24a. Thus, the chip type thermistor 10 shown in FIGS. 1F and 5 was obtained.
【００２７】＜比較例１＞図示しないが、上記実施例１
のサーミスタ素体と同一寸法のサーミスタ素体を単一の
薄板材により形成し、このサーミスタ素体の上面及び下
面の２面に上記実施例１の抵抗値調整用電極を形成した
ことを除いて、上記実施例１と同一に製造したチップ型
サーミスタを比較例１とした。即ちこの比較例１のチッ
プ型サーミスタの内部には抵抗値調整用電極は形成され
ていない。<Comparative Example 1> Although not shown, the above-mentioned Example 1 was used.
Except that the thermistor element body having the same size as that of the thermistor element body is formed of a single thin plate material, and the resistance value adjusting electrodes of Example 1 are formed on the upper surface and the lower surface of the thermistor element body. A chip type thermistor manufactured in the same manner as in Example 1 was used as Comparative Example 1. That is, no resistance value adjusting electrode is formed inside the chip type thermistor of Comparative Example 1.
【００２８】＜比較例２＞図示しないが、上記比較例１
のサーミスタ素体の上面及び下面に抵抗値調整用電極を
形成しないことを除いて、上記比較例１と同様に製造し
たチップ型サーミスタを比較例２とした。即ちこの比較
例２のチップ型サーミスタには抵抗値調整用電極は全く
形成されていない。<Comparative Example 2> Although not shown, the above Comparative Example 1
Comparative Example 2 was a chip-type thermistor manufactured in the same manner as in Comparative Example 1 except that the resistance value adjusting electrodes were not formed on the upper and lower surfaces of the thermistor element body. That is, in the chip type thermistor of Comparative Example 2, no resistance value adjusting electrode was formed.
【００２９】＜比較試験及び評価＞実施例１、比較例１
及び２のチップ型サーミスタについて、抵抗値を測定し
た。その結果を表１に示す。なお、表１において抵抗値
減少率とは、比較例２の抵抗値に対する実施例１及び比
較例１の抵抗値の減少率をいう。<Comparative Test and Evaluation> Example 1, Comparative Example 1
The resistance values of the chip type thermistors Nos. 2 and 2 were measured. Table 1 shows the results. In Table 1, the resistance value reduction rate refers to the resistance value reduction rate of Example 1 and Comparative Example 1 with respect to the resistance value of Comparative Example 2.
【００３０】[0030]
【表１】 [Table 1]
【００３１】表１から明らかなように、実施例１のチッ
プ型サーミスタは比較例１及び２のチップ型サーミスタ
と比較して、抵抗値が大幅に減少したことが判った。As is clear from Table 1, the chip type thermistor of Example 1 was found to have a significantly reduced resistance value as compared with the chip type thermistors of Comparative Examples 1 and 2.
【００３２】＜比較例３＞図示しないが以下に示す製造
方法により上記実施例１のチップ型サーミスタと同形同
大に作製されたチップ型サーミスタを比較例３とした。
先ずセラミックグリーンシート上面に導電性ペーストを
印刷乾燥し抵抗値調整用電極を形成した後、複数のグリ
ーンシートを積み重ねてシート状の積層体にし、この積
層体を焼成して焼結シートを作製した。次いでこの焼結
シートの両面にガラスペーストを印刷して焼成すること
により絶縁性の結晶化ガラスからなるガラス層を形成し
た。次に両面がガラス層で被覆された焼結シートを電極
の列方向と直交する方向に短冊状に切断した後、この短
冊状物の両側の切断面に上記と同様にガラスペーストを
印刷焼成して結晶化ガラスからなるガラス層を形成し
た。次に上記切断面と垂直な方向にかつ電極の幅方向の
中心線に沿ってこの短冊状物を細かく切断してサーミス
タ素体を作製した。このサーミスタ素体の切断面を包む
ようにサーミスタ素体の両端部に導電性ペーストを塗布
し、焼成して電極層を形成した。更にこの焼付け電極層
を下地電極層としてこの表面にめっき層を形成して焼付
け電極層とめっき層からなる端止電極を有するチップ型
サーミスタを得た。COMPARATIVE EXAMPLE 3 Although not shown, a chip type thermistor manufactured to have the same shape and size as the chip type thermistor of Example 1 by the following manufacturing method was used as Comparative Example 3.
First, a conductive paste is printed and dried on the upper surface of a ceramic green sheet to form a resistance value adjusting electrode, and then a plurality of green sheets are stacked to form a sheet-like laminated body, and the laminated body is fired to produce a sintered sheet. . Then, glass paste was printed on both surfaces of the sintered sheet and fired to form a glass layer made of insulating crystallized glass. Next, after cutting the sintered sheet whose both surfaces are covered with a glass layer into strips in a direction orthogonal to the column direction of the electrodes, glass paste is printed and fired on the cut surfaces on both sides of this strip in the same manner as above. To form a glass layer made of crystallized glass. Next, the strip was finely cut in a direction perpendicular to the cut surface and along the center line in the width direction of the electrode to prepare a thermistor body. A conductive paste was applied to both ends of the thermistor body so as to wrap the cut surface of the thermistor body and fired to form an electrode layer. Further, a plated layer was formed on the surface of this baked electrode layer as a base electrode layer to obtain a chip type thermistor having a termination electrode composed of the baked electrode layer and the plated layer.
【００３３】＜比較試験２及び評価＞実施例１及び比較
例３のチップ型サーミスタを３０個ずつ作製し、それぞ
れの抵抗値のばらつきを比較した。抵抗値のばらつきは
標準偏差をｓ、抵抗値の平均値をＡｖ．としたときに、
３×ｓ／Ａｖ．で表される抵抗値の変動係数（％）を求
め、この変動係数を比較することにより行った。その結
果、比較例３の抵抗値の変動係数は６．９％であったの
に対し、実施例１の抵抗値の変動係数は１．５％と小さ
く、実施例１のチップ型サーミスタの方が比較例３のチ
ップ型サーミスタより抵抗値のばらつきが極め小さくな
ることが判った。<Comparative Test 2 and Evaluation> Thirty chip-type thermistors of Example 1 and Comparative Example 3 were produced and the variations in resistance values were compared. For the variation in resistance value, the standard deviation is s, and the average resistance value is Av. And when
3 × s / Av. The coefficient of variation (%) of the resistance value represented by was calculated and the coefficient of variation was compared. As a result, the coefficient of variation of the resistance value of Comparative Example 3 was 6.9%, whereas the coefficient of variation of the resistance value of Example 1 was as small as 1.5%. However, it was found that the variation in resistance value was extremely smaller than that of the chip type thermistor of Comparative Example 3.
【００３４】[0034]
【発明の効果】以上述べたように、本発明によれば、セ
ラミック焼結体よりなる複数の薄板材を絶縁性接着剤に
より積層接着し、サーミスタ素体の４側面のうち互いに
対向しかつ抵抗値調整用電極が形成された２側面に絶縁
性接着剤を介して絶縁性セラミック板材を接着し、更に
サーミスタ素体の４側面のうち残りの２側面を絶縁性高
分子被膜により被覆したので、サーミスタ素体表面が比
較的低温で加熱硬化可能な高分子被膜により被覆されて
おり、サーミスタ素体への熱負荷が小さく、抵抗値及び
Ｂ定数のサーミスタ特性の変動を小さくすることができ
る。またサーミスタ素体の表面及び内部に抵抗値調整用
電極を有する構造であるため、抵抗値を調整する、即ち
抵抗値を容易に減少でき、低抵抗かつ高Ｂ定数のサーミ
スタ特性を有するサーミスタを比較的容易に得ることが
できる。更にサーミスタ素体の４側面のうち２側面に機
械的強度に優れた絶縁性セラミック板材が接着されてい
るので、サーミスタの強度を向上できる。As described above, according to the present invention, a plurality of thin plate members made of a ceramic sintered body are laminated and adhered by an insulating adhesive, and the four side surfaces of the thermistor element body are opposed to each other and the resistance is increased. Since the insulating ceramic plate material is adhered to the two side surfaces on which the value adjusting electrodes are formed through the insulating adhesive, and the remaining two side surfaces of the four side surfaces of the thermistor body are covered with the insulating polymer film, Since the surface of the thermistor body is covered with a polymer film that can be heat-cured at a relatively low temperature, the thermal load on the thermistor body is small, and fluctuations in the resistance value and the B constant of the thermistor characteristics can be reduced. In addition, since the structure has resistance value adjusting electrodes on the surface and inside of the thermistor element body, the resistance value can be adjusted, that is, the resistance value can be easily decreased, and thermistors having low resistance and high B constant thermistor characteristics are compared. It can be easily obtained. Furthermore, since the insulating ceramic plate material having excellent mechanical strength is adhered to two of the four side surfaces of the thermistor body, the strength of the thermistor can be improved.
【００３５】またセラミック焼結体よりなる薄板材の表
面に抵抗値調整用電極を形成し、複数の薄板材を一対の
絶縁性セラミック板材にて挟んだ状態でこれらを絶縁性
接着剤により積層接着して積層体を形成し、この積層体
を短冊状に切り出してその切断面に絶縁性高分子ペース
トを塗布・乾燥・加熱硬化して被膜付短冊状物を形成
し、この被膜付短冊状物を切断してチップ状のサーミス
タ素体を形成し、更にサーミスタ素体の両端部に電極層
及びめっき層からなる端子電極を形成すれば、薄板材及
び絶縁性セラミック板材をそれぞれ焼結し、薄板材に抵
抗値調整用電極を形成した後に、薄板材及び絶縁性セラ
ミック板材を積層接着するので、焼成時のグリーンシー
ト又は導電性ペーストの収縮によるばらつき等の影響を
受けず、抵抗値調整用電極間の距離が正確となり、抵抗
値のばらつきが小さい高精度のサーミスタを得ることが
できる。Further, a resistance value adjusting electrode is formed on the surface of a thin plate material made of a ceramic sintered body, and a plurality of thin plate materials are sandwiched between a pair of insulating ceramic plate materials and laminated and bonded by an insulating adhesive. To form a laminated body, and the laminated body is cut into strips, and an insulating polymer paste is applied to the cut surface, dried, and cured by heating to form a strip with a coating. The strip with a coating is formed. To form a chip thermistor body, and further form terminal electrodes consisting of an electrode layer and a plating layer at both ends of the thermistor body, by sintering the thin plate material and the insulating ceramic plate material, respectively. After the resistance value adjustment electrode is formed on the plate material, the thin plate material and the insulating ceramic plate material are laminated and adhered, so that the resistance value adjustment is not affected by variations such as shrinkage of the green sheet or conductive paste during firing. The distance between the electrodes is exactly, variations in resistance value can be obtain a small highly accurate thermistor.
【００３６】またサーミスタ素体の４側面のうち２側面
を被覆する被膜として、比較的高温で焼付ける必要のあ
ったガラス層に代えて、比較的低温で加熱硬化できる絶
縁性高分子被膜を用いることにより、サーミスタ素体を
高温にさらすことなく被覆できるので、サーミスタ素体
への熱負荷が小さく、サーミスタ特性の変動を小さくす
ることができる。また上記高分子材料は、ガラス材料よ
りも熱膨張係数が大きいため、被膜形成後に高分子が硬
化する温度でサーミスタ素体と高分子被膜との応力関係
は、高分子被膜がサーミスタ素体に対して圧縮応力を作
用させることになり、従来のガラス層がサーミスタ素体
に対して引張応力を作用させる場合と比較して、サーミ
スタの機械的強度を向上できる。また高分子被膜は緻密
性に優れ、強度に関しても高性能であるため、サーミス
タ素体を高分子被膜により被覆した状態で切断するとき
にマイクロクラック等が発生せず、サーミスタの機械的
強度の向上を図ることができる。Further, as a film for covering two of the four side faces of the thermistor body, an insulating polymer film which can be heat-cured at a relatively low temperature is used instead of the glass layer which needs to be baked at a relatively high temperature. As a result, the thermistor body can be coated without being exposed to high temperatures, so that the thermal load on the thermistor body is small and fluctuations in the thermistor characteristics can be reduced. Further, since the polymer material has a larger coefficient of thermal expansion than the glass material, the stress relationship between the thermistor body and the polymer film at the temperature at which the polymer cures after the film formation is such that the polymer film is different from the thermistor body. As a result, the compressive stress is applied, and the mechanical strength of the thermistor can be improved as compared with the case where the conventional glass layer applies tensile stress to the thermistor body. In addition, since the polymer coating has excellent compactness and high performance in terms of strength, when the thermistor element body is covered with the polymer coating, microcracks do not occur and the mechanical strength of the thermistor is improved. Can be achieved.
【図１】本発明第１実施形態のチップ型サーミスタの製
造工程を説明する図。FIG. 1 is a diagram illustrating a manufacturing process of a chip type thermistor according to a first embodiment of the present invention.
【図２】図１のＡ−Ａ線断面図。FIG. 2 is a sectional view taken along line AA of FIG.
【図３】図１のＢ−Ｂ線断面図。FIG. 3 is a sectional view taken along line BB of FIG. 1;
【図４】図１のＣ−Ｃ線断面図。FIG. 4 is a sectional view taken along line CC of FIG. 1;
【図５】図１のＤ−Ｄ線断面図。FIG. 5 is a sectional view taken along line DD of FIG. 1;
【図６】本発明の第２実施形態を示す図５に対応する断
面図。FIG. 6 is a sectional view illustrating a second embodiment of the present invention and corresponding to FIG. 5;
１０，５０ サーミスタ １１ 薄板材 １２ サーミスタ素体 １３，５３ 抵抗値調整用電極 １４ 端止電極 １５ 絶縁性セラミック板材 １６ 絶縁性接着剤 １７ 高分子被膜 １８ 積層体 ２１ 短冊状物 ２２ 被膜付短冊状物 ２３ 電極層 ２４ めっき層 10, 50 Thermistor 11 Thin plate material 12 Thermistor element body 13, 53 Resistance value adjusting electrode 14 End stop electrode 15 Insulating ceramic plate material 16 Insulating adhesive 17 Polymer film 18 Laminated body 21 Strip-shaped article 22 Strip-shaped article with coating 23 Electrode layer 24 Plating layer
───────────────────────────────────────────────────── フロントページの続き (72)発明者 村木 孝幸 埼玉県秩父郡横瀬町大字横瀬2270番地 三 菱マテリアル株式会社電子技術研究所内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Takayuki Muraki 2270 Yokoze, Yokose-cho, Chichibu-gun, Saitama Sanryo Materials Co., Ltd.
Claims (3)
(11)を積層接着することにより直方体状に形成されたサ
ーミスタ素体(12)と、前記サーミスタ素体(12)の表面及
び内部に形成され前記サーミスタ素体(12)の端面に露出
する複数の抵抗値調整用電極(13,53)と、前記サーミス
タ素体(12)の両端面を含む両端部に設けられ前記抵抗値
調整用電極(13,53)に電気的に接続された端子電極(14)
とを備えたチップ型サーミスタにおいて、 前記薄板材(11)が絶縁性接着剤(16)により積層接着さ
れ、 前記サーミスタ素体(12)の４側面のうち互いに対向しか
つ前記抵抗値調整用電極(13,53)が形成された２側面に
絶縁性接着剤(16)を介して絶縁性セラミック板材(15)が
接着され、 前記サーミスタ素体(12)の４側面のうち前記２側面以外
の２側面が絶縁性を有する高分子被膜(17)により被覆さ
れたことを特徴とするチップ型サーミスタ。1. A plurality of thin plate materials made of a ceramic sintered body.
(11) a thermistor element body (12) formed in a rectangular parallelepiped shape by laminating and bonding, and a plurality of thermistor element bodies (12) formed on the surface and inside and exposed on the end surface of the thermistor element body (12) Of the resistance value adjusting electrode (13,53), and a terminal electrode electrically connected to the resistance value adjusting electrode (13,53) provided at both ends including both end surfaces of the thermistor element body (12) (14)
A thin plate material (11) is laminated and adhered by an insulating adhesive (16), and the resistance value adjusting electrodes face each other among the four side surfaces of the thermistor body (12). An insulating ceramic plate material (15) is adhered to the two side surfaces on which (13, 53) are formed via an insulating adhesive (16), and among the four side surfaces of the thermistor body (12) other than the two side surfaces. A chip type thermistor characterized in that two sides are covered with a polymer film (17) having an insulating property.
ｅ，Ａｌ及びＮｉを含む金属酸化物からなる群より選ば
れた１種又は２種以上の金属酸化物を含有するセラミッ
ク焼結体であって、前記各薄板材毎に前記金属酸化物の
組成比が異なるように構成された請求項１記載のチップ
型サーミスタ。2. A plurality of thin plate materials are Mn, Co, Cu and F.
A ceramic sintered body containing one or more metal oxides selected from the group consisting of metal oxides containing e, Al and Ni, wherein the composition of the metal oxide is for each thin plate material. The chip type thermistor according to claim 1, wherein the ratio is different.
表面に所定の間隔をあけて互いに平行に多数の抵抗値調
整用電極(13)を形成する工程と、 前記抵抗値調整用電極(13)が形成された複数の薄板材(1
1)を一対の絶縁性セラミック板材(15)にて挟んだ状態で
前記複数の薄板材(11)及び一対の絶縁性セラミック板材
(15)を絶縁性接着剤(16)により積層接着して積層体(18)
を形成する工程と、 前記積層体(18)を前記抵抗値調整用電極(13)の長手方向
に直交する方向に短冊状に切り出す工程と、 前記短冊状物(21)の切断面に絶縁性高分子ペーストを塗
布し乾燥し加熱硬化して被膜付短冊状物(22)を形成する
工程と、 前記被膜付短冊状物(22)を前記各抵抗値調整用電極(13)
の幅方向の中央に沿ってそれぞれ切断することにより両
端に前記抵抗値調整用電極(13)がそれぞれ露出するサー
ミスタ素体(12)を形成する工程と、 前記サーミスタ素体(12)の両端面及び前記複数の抵抗値
調整用電極(13)の一端面を含む前記サーミスタ素体(12)
の両端部に電極層(23)を形成する工程と、 前記電極層(23)の表面にめっき層(24)を形成して前記電
極層(23)と前記めっき層(24)からなる端子電極(14)を形
成する工程とを含むチップ型サーミスタの製造方法。3. A step of forming a large number of resistance value adjusting electrodes (13) in parallel with each other at a predetermined interval on the surface of a thin plate material (11) made of a ceramic sintered body, and the resistance value adjusting electrode. A plurality of thin plate materials (1)
A plurality of thin plate materials (11) and a pair of insulating ceramic plate materials in a state that (1) is sandwiched by a pair of insulating ceramic plate materials (15)
Laminate (18) by laminating (15) with insulating adhesive (16)
And a step of cutting the laminate (18) into a strip shape in a direction orthogonal to the longitudinal direction of the resistance value adjusting electrode (13), and an insulating property on the cut surface of the strip (21). A step of forming a strip with coating (22) by coating a polymer paste, drying and heat curing, and the strip with coating (22) for each resistance adjustment electrode (13)
A step of forming the thermistor element body (12) in which the resistance value adjusting electrodes (13) are exposed at both ends by cutting along the center of the width direction, and both end surfaces of the thermistor element body (12) And the thermistor element body (12) including one end faces of the plurality of resistance value adjusting electrodes (13)
A step of forming an electrode layer (23) on both ends of the electrode layer (23) and a terminal electrode composed of the electrode layer (23) and the plating layer (24) by forming a plating layer (24) on the surface of the electrode layer (23) A method of manufacturing a chip type thermistor, including the step of forming (14).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7404296A JPH09266103A (en) | 1996-03-28 | 1996-03-28 | Chip thermistor and method for manufacturing the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7404296A JPH09266103A (en) | 1996-03-28 | 1996-03-28 | Chip thermistor and method for manufacturing the same |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH09266103A true JPH09266103A (en) | 1997-10-07 |
Family
ID=13535730
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7404296A Pending JPH09266103A (en) | 1996-03-28 | 1996-03-28 | Chip thermistor and method for manufacturing the same |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH09266103A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003515245A (en) * | 1999-09-14 | 2003-04-22 | タイコ・エレクトロニクス・コーポレイション | Electrical device and method for manufacturing such a device |
| WO2012173183A1 (en) * | 2011-06-17 | 2012-12-20 | タイコエレクトロニクスジャパン合同会社 | Ptc device |
-
1996
- 1996-03-28 JP JP7404296A patent/JPH09266103A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003515245A (en) * | 1999-09-14 | 2003-04-22 | タイコ・エレクトロニクス・コーポレイション | Electrical device and method for manufacturing such a device |
| WO2012173183A1 (en) * | 2011-06-17 | 2012-12-20 | タイコエレクトロニクスジャパン合同会社 | Ptc device |
| JPWO2012173183A1 (en) * | 2011-06-17 | 2015-02-23 | タイコエレクトロニクスジャパン合同会社 | PTC device |
| US9287696B2 (en) | 2011-06-17 | 2016-03-15 | Tyco Electronics Corporation | PTC device |
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