JPH09260822A - Structure for connecting/fixing electronic part to board with solder - Google Patents
Structure for connecting/fixing electronic part to board with solderInfo
- Publication number
- JPH09260822A JPH09260822A JP9021496A JP9021496A JPH09260822A JP H09260822 A JPH09260822 A JP H09260822A JP 9021496 A JP9021496 A JP 9021496A JP 9021496 A JP9021496 A JP 9021496A JP H09260822 A JPH09260822 A JP H09260822A
- Authority
- JP
- Japan
- Prior art keywords
- solder
- layer
- electronic component
- substrate
- conductive
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/09—Use of materials for the conductive, e.g. metallic pattern
- H05K1/092—Dispersed materials, e.g. conductive pastes or inks
- H05K1/095—Dispersed materials, e.g. conductive pastes or inks for polymer thick films, i.e. having a permanent organic polymeric binder
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/24—Reinforcing the conductive pattern
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4007—Surface contacts, e.g. bumps
Landscapes
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、導電塗料によって
形成されるランド部に電子部品の端子部を半田によって
接続固定するのに好適な基板への半田による電子部品接
続固定構造に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a structure for connecting and fixing an electronic component by soldering to a substrate suitable for connecting and fixing a terminal portion of an electronic component to a land portion formed of a conductive paint by soldering.
【０００２】[0002]
【従来の技術】従来、基板上に設けた回路パターンのラ
ンド部に電子部品の端子部を半田によって固定する場合
は、前記回路パターンとして銅箔をエッチングすること
によって形成したものが使用されてきた。2. Description of the Related Art Conventionally, when a terminal portion of an electronic component is fixed to a land portion of a circuit pattern provided on a substrate by soldering, a circuit pattern formed by etching a copper foil has been used. .
【０００３】一方近年、基板上に銀ペーストを印刷形成
してなる回路パターンがあるが、この回路パターンの場
合、半田との接着性などの点で下記するような問題点が
あったので、通常は半田の代わりに導電接着剤等を用い
て固定していた。さらに基板として耐熱性の低いポリエ
チレンテレフタレート（ＰＥＴ）フイルムを用いた場合
は、その耐熱温度が最高でも１５０℃〜１７０℃であ
り、一般の６：４スズ：鉛半田のリフロー条件である２
００℃〜２４０℃には耐えられない。On the other hand, in recent years, there is a circuit pattern formed by printing and forming a silver paste on a substrate. However, in the case of this circuit pattern, there were the following problems in terms of adhesiveness with solder, etc. Was fixed using a conductive adhesive or the like instead of solder. Furthermore, when a polyethylene terephthalate (PET) film having low heat resistance is used as the substrate, the heat resistance temperature is 150 ° C. to 170 ° C. at the maximum, which is a general reflow condition of 6: 4 tin: lead solder.
It cannot withstand 00 ° C to 240 ° C.
【０００４】これに対して最近、従来の半田よりも低温
（例えば１５０℃〜１７０℃以下）で溶融することで、
ＰＥＴフイルムでも使用が可能な各種の低温半田が販売
されるようになった。On the other hand, recently, by melting at a lower temperature (for example, 150 ° C. to 170 ° C. or less) than conventional solder,
Various low-temperature solders that can be used with PET films are now on sale.
【０００５】[0005]
【発明が解決しようとする課題】ところで回路パターン
を構成する銀ペーストの中には、熱可塑性合成樹脂中に
銀粉を混合したものと、熱硬化性樹脂中に銀粉を混合し
たものとがあるが、いずれの銀ペーストを用いて形成し
た回路パターンであっても、これらに低温半田を用いて
電子部品を固定した場合は、それぞれ以下のような問題
点があった。By the way, among the silver pastes constituting the circuit pattern, there are a silver paste mixed with a thermoplastic synthetic resin and a silver paste mixed with a thermosetting resin. However, no matter which silver paste is used for the circuit pattern, when the low-temperature solder is used to fix the electronic component to the circuit pattern, there are the following problems.
【０００６】銀ペーストとして、熱可塑性合成樹脂中
に銀粉を混合してなる銀ペーストを用い、図５に示すよ
うに、該銀ペーストからなる２本の回路パターン８１，
８１を基板８０上に形成し、該回路パターン８１，８１
の端部に設けたランド部８３，８３上に低温半田８９を
塗布してその上にチップ型電子部品８５の両端電極８
７，８７を載せ、低温半田８９をリフローすることによ
って該両端電極８７，８７とランド部８３，８３間を接
続固定した場合。As the silver paste, a silver paste prepared by mixing a silver powder in a thermoplastic synthetic resin is used. As shown in FIG. 5, two circuit patterns 81 made of the silver paste are used.
81 is formed on the substrate 80, and the circuit patterns 81, 81
The low temperature solder 89 is applied on the lands 83, 83 provided at the end portions of the two end electrodes 8
In the case where the both end electrodes 87, 87 and the land portions 83, 83 are connected and fixed by placing 7, 87 and reflowing the low temperature solder 89.
【０００７】この場合は、回路パターン８１，８１を構
成する樹脂は熱可塑性であり加熱時に軟化するので、半
田との接着性（いわゆる「ぬれ性」）は良いのである
が、一方で低温半田８９の溶融のための加熱時に該樹脂
が軟化して該ランド部８３，８３中の銀粉が低温半田８
９に食われやすくなり、これによって該ランド部８３，
８３の部分ｂの材質が変質し、同図に示す線ａの部分で
電気の導通が悪くなってしまう場合があった。特にこの
ランド部８３，８３（回路パターン８１，８１も同じ）
の厚みは１０μｍ程度と薄く、変質した部分と変質しな
い回路パターン８１，８１の部分の境界の面積が小さい
ので、該導通不良による影響が大きく、接続不良と判断
されるような場合もあった。In this case, since the resin forming the circuit patterns 81, 81 is thermoplastic and softens when heated, the adhesiveness with solder (so-called "wettability") is good, while the low temperature solder 89 is used. The resin softens at the time of heating for melting and the silver powder in the land portions 83, 83 is cooled by the low temperature solder 8.
9 is more likely to be eaten by the land portion 83,
In some cases, the material of the portion b of 83 is deteriorated, and the electrical continuity is deteriorated at the portion of the line a shown in FIG. In particular, the land portions 83 and 83 (the circuit patterns 81 and 81 are the same)
Has a small thickness of about 10 μm, and the area of the boundary between the altered portion and the portions of the circuit patterns 81, 81 which are not altered is small, so that there is a large influence of the conduction failure and it may be judged that the connection is defective.
【０００８】銀ペーストとして、熱硬化性合成樹脂中
に銀粉を混合してなる銀ペーストを用い、図６に示すよ
うに、該銀ペーストからなる２本の回路パターン９１，
９１を基板９０上に形成し、該回路パターン９１，９１
の端部に設けたランド部９３，９３上に低温半田９９を
塗布してその上にチップ型電子部品９５の両端電極９
７，９７を載せ、低温半田９９をリフローすることによ
って該両端電極９７，９７とランド部９３，９３間を接
続固定した場合。As the silver paste, a silver paste prepared by mixing a thermosetting synthetic resin with silver powder is used. As shown in FIG. 6, two circuit patterns 91, which are made of the silver paste, are used.
91 is formed on the substrate 90, and the circuit patterns 91, 91
The low temperature solder 99 is applied on the lands 93, 93 provided at the end of the chip, and the both-end electrodes 9 of the chip-type electronic component 95 are applied thereon.
A case where the both end electrodes 97, 97 and the land portions 93, 93 are connected and fixed by placing 7, 97 and reflowing the low temperature solder 99.
【０００９】この場合は、回路パターン９１，９１を構
成する樹脂は低温半田９９溶融時の加熱によっても軟化
しないので、該ランド部９３，９３中の銀粉は低温半田
９９に食われにくく、前記に示すようなランド部９
３，９３の材質の変質による導通不良は生じにくい。In this case, since the resin forming the circuit patterns 91, 91 is not softened by the heating when the low temperature solder 99 is melted, the silver powder in the lands 93, 93 is less likely to be eaten by the low temperature solder 99. Land part 9 as shown
It is difficult for defective conduction to occur due to alteration of the material of 3,93.
【００１０】しかしながら逆にランド部９３，９３を構
成する熱硬化性合成樹脂は低温半田９９のリフロー時の
熱によって軟化しないので、ランド部９３，９３の表面
と低温半田９９とのぬれ性は悪く、両表面間の機械的接
続状態が強固ではなく、この点から電気の導通が悪くな
り、導通不良を生じる場合があった。On the contrary, since the thermosetting synthetic resin forming the lands 93, 93 is not softened by the heat of the low temperature solder 99 during reflow, the wettability between the surfaces of the lands 93, 93 and the low temperature solder 99 is poor. However, the mechanical connection between the two surfaces is not strong, and from this point, electrical conduction may be deteriorated, resulting in defective conduction.
【００１１】本発明は上述の点に鑑みてなされたもので
ありその目的は、導電塗料によって形成される回路パタ
ーンのランド部に電子部品の端子部を半田によって接続
固定しても、該接続固定が確実に行なえる基板への半田
による電子部品接続固定構造を提供することにある。The present invention has been made in view of the above points, and an object thereof is to connect and fix the terminal portion of the electronic component to the land portion of the circuit pattern formed by the conductive paint by soldering. Another object of the present invention is to provide a structure for connecting and fixing electronic components by soldering to a substrate, which can be reliably performed.
【００１２】[0012]
【課題を解決するための手段】上記問題点を解決するた
め本発明は、端子部を設けた電子部品と、ランド部を設
けた基板とを具備し、前記基板のランド部に前記電子部
品の端子部を半田によって接続固定する基板への半田に
よる電子部品接続固定構造において、前記ランド部は、
熱硬化性樹脂中に導電粉を混入してなる導電塗料を前記
基板上に直接又は他の層を介して間接に塗布することに
よって形成される第１層と、熱可塑性樹脂中に導電粉を
混入してなる導電塗料を前記第１層の上に塗布すること
によって形成される第２層とによって構成され、前記電
子部品の端子部は前記ランド部の第２層の上に半田によ
って接続固定されるように構成した。In order to solve the above problems, the present invention comprises an electronic component provided with a terminal portion and a substrate provided with a land portion, and the land portion of the substrate is provided with the electronic component of the electronic component. In the electronic component connection fixing structure by soldering to the substrate for connecting and fixing the terminal part with solder, the land part is
A first layer formed by applying a conductive coating material obtained by mixing a conductive powder into a thermosetting resin directly or indirectly through another layer on the substrate, and a conductive powder in a thermoplastic resin. And a second layer formed by applying a mixed conductive paint on the first layer, and the terminal portion of the electronic component is connected and fixed by soldering on the second layer of the land portion. Configured to be.
【００１３】[0013]
【発明の実施の形態】以下、本発明の実施形態を図面に
基づいて詳細に説明する。図１は本発明の一実施形態を
示す拡大断面図（なおチップ型電子部品４０は断面とな
っていない）である。同図に示すように本実施形態の場
合、フレキシブル基板１０上に一対のランド部２１，２
１を設け、該ランド部２１，２１上に低温半田５０によ
ってチップ型電子部品４０の端子部４１，４１を接続・
固定して構成されている。以下各構成部品についてその
製造方法とともに説明する。Embodiments of the present invention will be described below in detail with reference to the drawings. FIG. 1 is an enlarged cross-sectional view (note that the chip-type electronic component 40 is not a cross-section) showing an embodiment of the present invention. As shown in the figure, in the case of the present embodiment, a pair of land portions 21, 2 are formed on the flexible substrate 10.
1 is provided, and the terminal portions 41, 41 of the chip type electronic component 40 are connected to the land portions 21, 21 by the low temperature solder 50.
It is fixedly configured. Hereinafter, each component will be described together with its manufacturing method.
【００１４】即ち本実施形態にかかる半田による電子部
品固定構造を構成するには、まずフレキシブル基板１０
を用意する。このフレキシブル基板１０はＰＥＴフイル
ムで構成されている。That is, in order to construct the electronic component fixing structure using solder according to this embodiment, first, the flexible substrate 10 is used.
Prepare The flexible substrate 10 is made of PET film.
【００１５】次に該フレキシブル基板１０上にランド部
２１，２１をスクリーン印刷で形成する。ここでこのラ
ンド部２１，２１は、以下のように第１層２３，２３と
第２層２５，２５とによって構成されている。Next, land portions 21 and 21 are formed on the flexible substrate 10 by screen printing. Here, the land portions 21 and 21 are composed of the first layers 23 and 23 and the second layers 25 and 25 as follows.
【００１６】即ち、まず熱硬化性樹脂中に導電粉と溶剤
を混入してなる導電塗料を前記フレキシブル基板１０上
のランド部２１となる部分のみにスクリーン印刷し乾燥
することによって第１層２３，２３を形成する。この実
施形態においては熱硬化性樹脂としてフェノール系樹脂
を用い、導電粉として銀粉を用い、且つフェノール系樹
脂：銀粉の重量比を、５５：４５としている。なお乾燥
のための加熱温度は例えば１６５℃で加熱時間は例えば
３分である。なお熱硬化性樹脂としてはこの実施形態の
外にエポキシ系樹脂等の樹脂であっても良い。また導電
粉としてはこの実施形態の外に銅粉，ニッケル粉等の他
の導電粉，又はこれら導電粉を混合したものを用いても
良い。また熱硬化性樹脂と導電粉の混合割合も必要に応
じて種々の変更が可能である。That is, first, a conductive coating material obtained by mixing a conductive powder and a solvent in a thermosetting resin is screen-printed only on a portion which becomes the land portion 21 on the flexible substrate 10 and dried to form the first layer 23, 23 is formed. In this embodiment, a phenol resin is used as the thermosetting resin, silver powder is used as the conductive powder, and the weight ratio of phenol resin: silver powder is 55:45. The heating temperature for drying is, for example, 165 ° C., and the heating time is, for example, 3 minutes. The thermosetting resin may be a resin such as an epoxy resin other than this embodiment. Further, as the conductive powder, other conductive powder such as copper powder, nickel powder, or a mixture of these conductive powders may be used in addition to this embodiment. Further, the mixing ratio of the thermosetting resin and the conductive powder can be variously changed as necessary.
【００１７】次に、熱可塑性樹脂中に導電粉と溶剤を混
入してなる導電塗料を前記第１層２３，２３の上にスク
リーン印刷し乾燥することによって第２層２５，２５を
形成する。なおこの第２層２５，２５は、第１層２３，
２３の上だけでなく、フレキシブル基板１０上にも引き
回すように印刷することで同時に回路パターン２７，２
７を構成する。この実施形態においては熱可塑性樹脂と
してポリウレタン系樹脂を用い、導電粉として銀粉を用
い、且つポリウレタン系樹脂：銀粉の重量比を、４０：
６０としている。なお乾燥のための加熱温度は例えば１
５０℃で加熱時間は例えば１０分である。Next, the second layer 25, 25 is formed by screen-printing a conductive paint, which is a mixture of a conductive powder and a solvent in a thermoplastic resin, on the first layer 23, 23 and drying it. The second layers 25, 25 are the first layers 23,
The circuit patterns 27, 2 can be simultaneously printed on the flexible substrate 10 as well as on the 23.
7 is constituted. In this embodiment, a polyurethane resin is used as the thermoplastic resin, silver powder is used as the conductive powder, and the weight ratio of polyurethane resin: silver powder is 40:
It is set to 60. The heating temperature for drying is 1
The heating time at 50 ° C. is, for example, 10 minutes.
【００１８】なお熱可塑性樹脂としてはこの実施形態の
外にポリエステル系樹脂，塩ビ酢ビ系樹脂等の樹脂であ
っても良い。また導電粉としてはこの実施形態の外に銅
粉，ニッケル粉等の他の導電粉，又はこれら導電粉を混
合したものを用いても良い。また熱可塑性樹脂と導電粉
の混合割合も必要に応じて種々の変更が可能である。In addition to this embodiment, the thermoplastic resin may be a resin such as polyester resin, vinyl chloride vinyl chloride resin, or the like. Further, as the conductive powder, other conductive powder such as copper powder, nickel powder, or a mixture of these conductive powders may be used in addition to this embodiment. Further, the mixing ratio of the thermoplastic resin and the conductive powder can be variously changed as necessary.
【００１９】つまり本実施形態においては、熱硬化性樹
脂中に導電粉を混入してなる第１層２３，２３の上面を
覆うように、熱可塑性樹脂中に導電粉を混入してなる第
２層２５，２５を設けることによってランド部２１，２
１が形成されている。なお図では第１層２３，２３と第
２層２５，２５の厚みをかなり厚く示しているが、実際
はいずれの層も１０μｍ程度である。That is, in the present embodiment, the second layer is formed by mixing the conductive powder in the thermoplastic resin so as to cover the upper surfaces of the first layers 23, 23 in which the conductive powder is mixed in the thermosetting resin. By providing the layers 25, 25, the land portions 21, 2
1 is formed. In the figure, the thicknesses of the first layers 23, 23 and the second layers 25, 25 are shown to be considerably thick, but in reality, all the layers are about 10 μm.
【００２０】次にこのランド部２１，２１上、即ち第２
層２５，２５の上を覆うようにクリーム状の低温半田５
０，５０をスクリーン印刷する。ここでこの低温半田５
０，５０としてこの実施形態では、スズ：鉛：ビスマ
ス：銀粉の重量比が、４２：４２：１４：２の合金を用
いた。この低温半田５０，５０の溶融温度は、９９℃〜
１３７℃程度である。Next, on the land portions 21, 21, that is, the second portion
Cream-like low temperature solder 5 covering the layers 25, 25
Screen print 0,50. This low temperature solder 5
In this embodiment, an alloy having a weight ratio of tin: lead: bismuth: silver powder of 42: 42: 14: 2 was used as 0,50. The melting temperature of the low temperature solder 50, 50 is 99 ° C.
It is about 137 ° C.
【００２１】次にこのフレキシブル基板１０の上にチッ
プ型発光素子などのチップ型電子部品４０を載置する
が、このとき該チップ型電子部品４０の表面に露出する
半田メッキ又は金メッキからなる端子部４１，４１を前
記低温半田５０，５０上に載置する。Next, a chip type electronic component 40 such as a chip type light emitting device is placed on the flexible substrate 10. At this time, a terminal portion made of solder plating or gold plating exposed on the surface of the chip type electronic component 40. 41, 41 is placed on the low temperature solder 50, 50.
【００２２】そして該低温半田５０，５０をリフローす
れば、低温半田５０，５０が溶融してランド部２１，２
１の第２層２５，２５と端子部４１，４１の両者に接続
・固定される。なおリフロー温度は例えばＭＡＸ１７０
℃で加熱時間は数秒程度である。When the low-temperature solder 50, 50 is reflowed, the low-temperature solder 50, 50 is melted and the land portions 21, 2 are melted.
It is connected and fixed to both the second layer 25, 25 of 1 and the terminal portions 41, 41. The reflow temperature is, for example, MAX170.
The heating time at ℃ is several seconds.
【００２３】本実施形態によれば、たとえ導電塗料から
なるランド部２１，２１上に低温半田５０，５０によっ
てチップ型電子部品４０を取り付けたとしても、導通不
良が生じない。According to this embodiment, even if the chip-type electronic component 40 is mounted on the lands 21 and 21 made of conductive paint by the low-temperature solder 50 and 50, the conduction failure does not occur.
【００２４】ここで図２は、上記本実施形態と上記図
５，図６に示す従来例とを比較した基本特性試験の結果
を示す図である。FIG. 2 is a diagram showing the result of a basic characteristic test comparing the present embodiment with the conventional examples shown in FIGS. 5 and 6.
【００２５】同図において従来例１は、前記図５に示す
接続構造のものであり、ランド部８３，８３の材質とし
て、ポリウレタン系の熱可塑性樹脂４０重量部に対して
銀粉を６０重量部混合したものを用いている。In the figure, Conventional Example 1 has the connection structure shown in FIG. 5, and as the material for the lands 83, 83, 60 parts by weight of silver powder is mixed with 40 parts by weight of a thermoplastic polyurethane resin. I am using what I did.
【００２６】従来例２は、前記図６に示す接続構造のも
のであり、ランド部９３，９３の材質として、フェノー
ル系樹脂５５重量部に対して銀粉を４５重量部としたも
のを用いている。The conventional example 2 has the connection structure shown in FIG. 6, and the land parts 93, 93 are made of silver powder of 45 parts by weight with respect to 55 parts by weight of phenol resin. .
【００２７】ここで各試験内容を説明する。 ヒートサイクル試験 −３０℃と＋８０℃の雰囲気を各３０分ずつ４８６サイ
クル繰り返した後に、２つの回路パターン２７，２７
（８１，８１，９１，９１）間の抵抗値を測定した。な
おこの時使用するチップ型電子部品８５内部の抵抗値は
０Ωのものを用いている（以下同様）。抵抗値が１Ω以
上になったものを不良品とした（以下同様）。The contents of each test will be described below. Heat cycle test After repeating 486 cycles of the atmosphere of −30 ° C. and + 80 ° C. for 30 minutes each, two circuit patterns 27, 27
The resistance value between (81, 81, 91, 91) was measured. The resistance value inside the chip-type electronic component 85 used at this time is 0Ω (the same applies hereinafter). A product having a resistance value of 1Ω or more was regarded as a defective product (the same applies hereinafter).
【００２８】耐熱性試験 １００℃の雰囲気中に５００時間放置した後の２つの回
路パターン２７，２７（８１，８１，９１，９１）間の
抵抗値を測定した。Heat resistance test The resistance value between the two circuit patterns 27, 27 (81, 81, 91, 91) after being left in an atmosphere of 100 ° C. for 500 hours was measured.
【００２９】耐湿性試験 ６０℃で湿度９０％の雰囲気中に５００時間放置した後
の２つの回路パターン２７，２７（８１，８１，９１，
９１）間の抵抗値を測定した。Moisture resistance test Two circuit patterns 27, 27 (81, 81, 91, after being left for 500 hours in an atmosphere of 60 ° C. and 90% humidity)
The resistance value between 91) was measured.
【００３０】以上の試験結果は、図２に示すように、従
来例１と従来例２ではヒートサイクル試験と耐熱性試験
において不良品が発生したのに対して、本実施形態では
いずれの試験においても不良品は発生しなかった。従来
例１，２について不良品が発生した理由は、前記「発明
が解決しようとする課題」の欄の，で説明した通り
であるが、本実施形態において不良品が発生しなかった
理由は以下のように考えられる。ここで図３はチップ型
電子部品４０を接続した状態のランド部２１の部分を拡
大して示す要部拡大断面図である。The above test results show that, as shown in FIG. 2, in the conventional example 1 and the conventional example 2, defective products were generated in the heat cycle test and the heat resistance test. However, no defective products occurred. The reason why the defective product is generated in Conventional Examples 1 and 2 is as described in the above-mentioned “Problems to be solved by the invention”, but the reason why the defective product is not generated in the present embodiment is as follows. Can be thought of as. Here, FIG. 3 is an enlarged cross-sectional view of an essential part showing an enlarged part of the land portion 21 in a state where the chip-type electronic component 40 is connected.
【００３１】即ち、本実施形態にかかる第１層２３は熱
硬化性樹脂製であり硬化前は接着強度が強いので、該第
１層２３とフレキシブル基板１０間の接着強度は強い。
また第１層２３と第２層２５は何れも樹脂製なので、両
者間の接着強度も強い。That is, since the first layer 23 according to the present embodiment is made of thermosetting resin and has a high adhesive strength before being cured, the adhesive strength between the first layer 23 and the flexible substrate 10 is strong.
Further, since both the first layer 23 and the second layer 25 are made of resin, the adhesive strength between them is also strong.
【００３２】また第２層２５は熱可塑性樹脂製で低温半
田５０溶融時の加熱によって軟化するので、低温半田５
０との接着性（ぬれ性）も良い。従ってフレキシブル基
板１０と第１層２３と第２層２５と低温半田５０とのそ
れぞれの機械的接着強度は強い。The second layer 25 is made of a thermoplastic resin and is softened by heating when the low temperature solder 50 is melted.
The adhesiveness (wettability) with 0 is also good. Therefore, the mechanical adhesion strength between the flexible substrate 10, the first layer 23, the second layer 25, and the low-temperature solder 50 is strong.
【００３３】一方熱可塑性樹脂製の第２層２５は、前述
のように加熱時に軟化するので、内部の銀粉の移動が生
じやすく、従って前記低温半田５０による融着の際、又
は経時的に、該低温半田５０に第２層２５内部の銀粉が
食われ易く該食われた部分Ｂの第２層２５の材質が変質
し、材質が変質しない部分との境界部分Ａで電気の導通
が悪くなる。On the other hand, since the second layer 25 made of a thermoplastic resin is softened during heating as described above, the movement of the silver powder inside is likely to occur, and therefore, during fusion by the low temperature solder 50, or over time, The silver powder inside the second layer 25 is easily eaten by the low-temperature solder 50, and the material of the second layer 25 of the portion B that is eaten is deteriorated, and the electrical conduction is deteriorated at the boundary A with the portion where the material is not deteriorated. .
【００３４】しかしながらこの実施形態の場合、第２層
２５の材質が変質する部分Ｂの下面全体に第１層２３が
広い面積で接続されている。なお第１層２３は熱硬化性
樹脂製なので加熱されても軟化せず、その内部の銀粉は
前記低温半田５０に食われにくく変質しにくい。However, in this embodiment, the first layer 23 is connected to the entire lower surface of the portion B where the material of the second layer 25 is altered in a large area. Since the first layer 23 is made of a thermosetting resin, it does not soften even when heated, and the silver powder inside the first layer 23 is less likely to be eaten by the low-temperature solder 50 and is unlikely to deteriorate.
【００３５】従って前記図３に示す境界部分Ａで第１層
２３の導通が悪くなっても、広い面積で接触している第
１層２３と第２層２５の間の導通はそれほど悪くなら
ず、矢印Ｃに示すルートで電気が導通するので、抵抗値
の増大による不良という問題は生じないのである。Therefore, even if the conduction of the first layer 23 becomes poor at the boundary portion A shown in FIG. 3, the conduction between the first layer 23 and the second layer 25 which are in contact with each other over a wide area does not become so bad. Since electricity is conducted along the route indicated by arrow C, the problem of defects due to an increase in resistance does not occur.
【００３６】つまり本実施形態は、ランド部の構造を、
半田とのぬれ性は良いが内部の銀粉が食われやすい熱可
塑性樹脂製の導電塗料と、半田とのぬれ性は悪いが内部
の銀粉は食われにくい熱硬化性樹脂製の導電塗料のそれ
ぞれの利点を引き出すことによって、導電塗料によって
形成したランド部に電子部品の端子部を半田によって確
実に接続固定できるようにしたものである。That is, in this embodiment, the structure of the land portion is
Conductive paint made of thermoplastic resin that has good wettability with solder but is easily eaten by silver powder inside, and conductive paint made of thermosetting resin that has poor wettability with solder but is hard to eat silver powder inside By taking advantage of the advantages, the terminal portion of the electronic component can be securely connected and fixed to the land portion formed by the conductive coating material by soldering.
【００３７】なお前記図１に示すチップ型電子部品４０
（下記するチップ型電子部品４０−２も同様）には通常
その全体を覆うようにＵＶ硬化型の封止材が塗布され
る。The chip type electronic component 40 shown in FIG.
A UV-curable encapsulant is usually applied to (the same applies to the chip-type electronic component 40-2 described below) so as to cover the whole.
【００３８】図４は本発明の他の実施形態を示す拡大断
面図（なおチップ型電子部品４０−２は断面となってい
ない）である。同図に示すように本実施形態において
も、基板１０−２上に設けた一対のランド部２１−２，
２１−２の構造を、熱硬化性樹脂中に導電粉を混合して
なる第１層２３−２，２３−２の上に、熱可塑性樹脂中
に導電粉を混合してなる第２層２５−２，２５−２を形
成した点は同様である。FIG. 4 is an enlarged sectional view showing another embodiment of the present invention (note that the chip type electronic component 40-2 is not a section). As shown in the figure, also in the present embodiment, the pair of land portions 21-2 provided on the substrate 10-2,
The structure of 21-2 is obtained by mixing the conductive powder in the thermosetting resin on the first layers 23-2 and 23-2 and the second layer 25 formed by mixing the conductive powder in the thermoplastic resin. The points where −2 and 25-2 are formed are the same.
【００３９】但しこの実施形態においては、回路パター
ン２７−２，２７−２として第１層２３−２，２３−２
の方を引き出している。また基板１０−２として硬質基
板を用いている。However, in this embodiment, the first layers 23-2 and 23-2 are used as the circuit patterns 27-2 and 27-2.
Is pulling out. A hard substrate is used as the substrate 10-2.
【００４０】このように構成しても、前記図１に示す実
施形態と同様の効果を生じる。Even with this structure, the same effect as that of the embodiment shown in FIG. 1 can be obtained.
【００４１】ところで上記実施形態で低温半田５０中に
銀粉を配合したのは以下の理由による。即ち、スズは他
の金属と合金化し易いので、リフローするとランド部中
の銀がスズ中に引き寄せられて拡散（いわゆる「くわ
れ」）する。そのため予め半田に銀粉を添加しておくこ
とによりランド部中の銀粉の拡散速度を遅くするためで
ある。By the way, the reason why the silver powder is mixed in the low temperature solder 50 in the above embodiment is as follows. That is, since tin is easily alloyed with other metals, when reflowing, the silver in the land part is attracted into the tin and diffused (so-called “crack”). Therefore, by adding silver powder to the solder in advance, the diffusion speed of the silver powder in the land portion is slowed.
【００４２】なお使用する半田は基板や導電塗料の材質
が許すのであれば通常の半田を用いても良い。またラン
ド部を構成する第１層と基板との間には別途他の導電
層、例えば銅箔層，メッキ層などを介在しても良い。The solder to be used may be a normal solder as long as the material of the substrate and the conductive paint permits. Further, another conductive layer, for example, a copper foil layer, a plating layer, or the like may be interposed between the first layer forming the land portion and the substrate.
【００４３】[0043]
【発明の効果】以上詳細に説明したように本発明によれ
ば、導電塗料によって形成される回路パターンのランド
部に電子部品の端子部を半田によって接続固定しても、
該接続固定が確実に行なえるという優れた効果を有す
る。As described in detail above, according to the present invention, even if the terminal portion of the electronic component is connected and fixed to the land portion of the circuit pattern formed by the conductive paint by soldering,
This has an excellent effect that the connection and fixing can be surely performed.
【図１】本発明の一実施形態を示す拡大断面図である。FIG. 1 is an enlarged sectional view showing one embodiment of the present invention.
【図２】本実施形態と図５，図６に示す従来例とを比較
した基本特性試験の結果を示す図である。FIG. 2 is a diagram showing a result of a basic characteristic test comparing the present embodiment with the conventional example shown in FIGS. 5 and 6.
【図３】チップ型電子部品４０を接続した状態のランド
部２１の部分を拡大して示す要部拡大断面図である。FIG. 3 is an enlarged cross-sectional view of an essential part showing an enlarged part of a land portion 21 in a state where a chip electronic component 40 is connected.
【図４】本発明の他の実施形態を示す拡大断面図であ
る。FIG. 4 is an enlarged sectional view showing another embodiment of the present invention.
【図５】従来例を示す拡大断面図である。FIG. 5 is an enlarged cross-sectional view showing a conventional example.
【図６】従来例を示す拡大断面図である。FIG. 6 is an enlarged cross-sectional view showing a conventional example.
【符号の説明】 １０ フレキシブル基板 ２１，２１ ランド部 ２３，２３ 第１層 ２５，２５ 第２層 ４０ チップ型電子部品 ４１，４１ 端子部 ５０ 低温半田[Explanation of reference numerals] 10 flexible substrate 21, 21 land portion 23, 23 first layer 25, 25 second layer 40 chip type electronic component 41, 41 terminal portion 50 low temperature solder
───────────────────────────────────────────────────── フロントページの続き (72)発明者 平山 雄也 神奈川県川崎市中原区苅宿335番地 帝国 通信工業株式会社内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Yuya Hirayama, 335, Kayajuku, Nakahara-ku, Kawasaki-shi, Kanagawa Imperial Telecommunications Industry Co., Ltd.
Claims (1)
設けた基板とを具備し、前記基板のランド部に前記電子
部品の端子部を半田によって接続固定する基板への半田
による電子部品接続固定構造において、 前記ランド部は、熱硬化性樹脂中に導電粉を混入してな
る導電塗料を前記基板上に直接又は他の層を介して間接
に塗布することによって形成される第１層と、熱可塑性
樹脂中に導電粉を混入してなる導電塗料を前記第１層の
上に塗布することによって形成される第２層とによって
構成され、 前記電子部品の端子部は前記ランド部の第２層の上に半
田によって接続固定されることを特徴とする基板への半
田による電子部品接続固定構造。1. An electronic component by soldering to a substrate, comprising: an electronic component provided with a terminal portion; and a substrate provided with a land portion, wherein the terminal portion of the electronic component is connected and fixed to the land portion of the substrate by soldering. In the connection fixing structure, the land portion is a first layer formed by applying a conductive coating material obtained by mixing a conductive powder into a thermosetting resin, directly or indirectly through another layer on the substrate. And a second layer formed by applying a conductive paint obtained by mixing a conductive powder into a thermoplastic resin on the first layer, and the terminal portion of the electronic component is formed of the land portion. A structure for connecting and fixing electronic components by soldering to a substrate, characterized in that the structure is connected and fixed on the second layer by soldering.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9021496A JPH09260822A (en) | 1996-03-18 | 1996-03-18 | Structure for connecting/fixing electronic part to board with solder |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9021496A JPH09260822A (en) | 1996-03-18 | 1996-03-18 | Structure for connecting/fixing electronic part to board with solder |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH09260822A true JPH09260822A (en) | 1997-10-03 |
Family
ID=13992242
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9021496A Pending JPH09260822A (en) | 1996-03-18 | 1996-03-18 | Structure for connecting/fixing electronic part to board with solder |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH09260822A (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007300038A (en) * | 2006-05-08 | 2007-11-15 | Matsushita Electric Ind Co Ltd | Electronic component package, and its manufacturing method |
| JP2008135515A (en) * | 2006-11-28 | 2008-06-12 | Fujikura Ltd | Mounting substrate |
| JP2008198712A (en) * | 2007-02-09 | 2008-08-28 | Toppan Printing Co Ltd | Circuit board with built-in electronic component, electronic module, electronic apparatus, and method for manufacturing circuit board with built-in electronic component |
| WO2009081929A1 (en) * | 2007-12-26 | 2009-07-02 | Fujikura Ltd. | Mounted board and method for manufacturing the same |
| US20160276303A1 (en) * | 2015-03-17 | 2016-09-22 | E I Du Pont De Nemours And Company | Electronic component |
-
1996
- 1996-03-18 JP JP9021496A patent/JPH09260822A/en active Pending
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007300038A (en) * | 2006-05-08 | 2007-11-15 | Matsushita Electric Ind Co Ltd | Electronic component package, and its manufacturing method |
| JP2008135515A (en) * | 2006-11-28 | 2008-06-12 | Fujikura Ltd | Mounting substrate |
| JP4727556B2 (en) * | 2006-11-28 | 2011-07-20 | 株式会社フジクラ | Mounting substrate and manufacturing method thereof |
| JP2008198712A (en) * | 2007-02-09 | 2008-08-28 | Toppan Printing Co Ltd | Circuit board with built-in electronic component, electronic module, electronic apparatus, and method for manufacturing circuit board with built-in electronic component |
| WO2009081929A1 (en) * | 2007-12-26 | 2009-07-02 | Fujikura Ltd. | Mounted board and method for manufacturing the same |
| US8039760B2 (en) | 2007-12-26 | 2011-10-18 | Fujikura Ltd. | Mounting board and method of producing the same |
| JP5220766B2 (en) * | 2007-12-26 | 2013-06-26 | 株式会社フジクラ | Mounting board |
| US20160276303A1 (en) * | 2015-03-17 | 2016-09-22 | E I Du Pont De Nemours And Company | Electronic component |
| US10186494B2 (en) | 2015-03-17 | 2019-01-22 | E I Du Pont De Nemours And Company | Electronic component |
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