JPH09181220A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH09181220A JPH09181220A JP7337499A JP33749995A JPH09181220A JP H09181220 A JPH09181220 A JP H09181220A JP 7337499 A JP7337499 A JP 7337499A JP 33749995 A JP33749995 A JP 33749995A JP H09181220 A JPH09181220 A JP H09181220A
- Authority
- JP
- Japan
- Prior art keywords
- thermal expansion
- insulating substrate
- radiator
- semiconductor device
- copper
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1532—Connection portion the connection portion being formed on the die mounting surface of the substrate
- H01L2924/15321—Connection portion the connection portion being formed on the die mounting surface of the substrate being a ball array, e.g. BGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16195—Flat cap [not enclosing an internal cavity]
Landscapes
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、半導体素子が搭載
されるとともに、熱放散のための放熱体を具備した半導
体装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device on which a semiconductor element is mounted and which is provided with a heat radiator for heat dissipation.
【０００２】[0002]
【従来技術】半導体素子、とりわけＬＳＩは高集積化、
高速化のために発熱が増加する傾向にある。これら発生
した熱が半導体素子内に蓄積されると、半導体素子内の
回路の誤動作を発生させたり、さらには半導体回路自身
を破壊したりするという問題がある。そこで、従来よ
り、半導体素子から発生する熱を外部に放散するための
放熱体が設けられている。2. Description of the Related Art Semiconductor devices, especially LSIs, are highly integrated.
Heat generation tends to increase due to speeding up. When the generated heat is accumulated in the semiconductor element, there is a problem that a circuit in the semiconductor element malfunctions or the semiconductor circuit itself is destroyed. Therefore, conventionally, a heat radiator for dissipating the heat generated from the semiconductor element to the outside is provided.
【０００３】一方、半導体素子を搭載する半導体装置
は、絶縁基板の内部またはその表面に配線層が形成さ
れ、さらに絶縁基板の表面に半導体素子が搭載されてい
る。高集積半導体素子を搭載する半導体装置において
は、その回路の信頼性の点から絶縁基板として、熱伝導
率が約２０Ｗ／ｍＫのアルミナ（Ａｌ2 Ｏ3 ）などのセ
ラミックスが最も多用されている。熱放散が必要な場合
には、上記の半導体装置にさらに、放熱体が取り付けら
れる。On the other hand, in a semiconductor device on which a semiconductor element is mounted, a wiring layer is formed inside or on the surface of an insulating substrate, and the semiconductor element is mounted on the surface of the insulating substrate. In a semiconductor device having a highly integrated semiconductor element mounted thereon, ceramics such as alumina (Al 2 O 3 ) having a thermal conductivity of about 20 W / mK are most frequently used as an insulating substrate in terms of the reliability of the circuit. When heat dissipation is necessary, a radiator is further attached to the above semiconductor device.
【０００４】このような放熱体材料としては、高熱伝導
性を有することが求められるが、熱伝導率の高い材料と
しては、銅（熱伝導率３９３Ｗ／ｍ・Ｋ）等が知られて
いるが、放熱体を取り付ける絶縁基板との熱膨張差が大
きいと基板にクラックが発生したり、半導体素子の封止
構造における気密性が損なわれるため、放熱体として、
約１０重量％の銅を含む、銅−タングステン焼結体（熱
伝導率 約１８０Ｗ／ｍＫ、熱膨張率 約７ｐｐｍ／
℃）が最も広く用いられている。Such a radiator material is required to have high thermal conductivity, and copper (thermal conductivity 393 W / mK) or the like is known as a material having high thermal conductivity. , If the thermal expansion difference with the insulating substrate to which the heat radiator is attached is large, cracks may occur in the substrate, or the airtightness of the sealing structure of the semiconductor element may be impaired.
A copper-tungsten sintered body containing about 10% by weight of copper (thermal conductivity of about 180 W / mK, thermal expansion coefficient of about 7 ppm /
(° C) is the most widely used.
【０００５】一方、半導体のさらなる高速化、高周波数
化にともない、半導体素子と外部回路の間で高速に信号
をやりとりする必要性が増している。そのためには半導
体装置内を信号が伝送される際の損失をより小さくする
必要があるが、従来より、アルミナ質セラミックスとの
同時焼成により基板を作製する場合には、配線層を高融
点金属のタングステンあるいはモリブデン等により形成
されるが、このタングステンやモリブデンは、導体抵抗
が高く、特に高周波においては導体抵抗による損失が大
きいという問題がある。On the other hand, with the further increase in speed and frequency of semiconductors, there is an increasing need to exchange signals at high speed between semiconductor elements and external circuits. For that purpose, it is necessary to further reduce the loss when a signal is transmitted in the semiconductor device, but conventionally, when a substrate is produced by co-firing with alumina ceramics, the wiring layer is made of refractory metal. Although it is formed of tungsten, molybdenum, or the like, tungsten or molybdenum has a high conductor resistance, and there is a problem that loss due to the conductor resistance is large especially at high frequencies.
【０００６】そこで、最近では、導体として良電気伝導
性を有する銅、金などの低抵抗金属を使用する半導体装
置が増加している。これにともない、絶縁基板材料とし
て、アルミナ質セラミックスに代わり、有機樹脂を主成
分とする材料や、これらの低抵抗金属と同時焼成が可能
な材料として、有機樹脂を主成分とする複合材料や焼成
温度が１０００℃以下のガラス−セラミックス複合材料
が多く用いられつつある。Therefore, recently, an increasing number of semiconductor devices use low-resistance metals such as copper and gold having good electrical conductivity as conductors. Along with this, as an insulating substrate material, a material containing organic resin as a main component instead of alumina ceramics, or a composite material containing organic resin as a main component or a material that can be co-fired with these low resistance metals A glass-ceramic composite material having a temperature of 1000 ° C. or lower is being widely used.
【０００７】加えて、半導体装置を有機樹脂を主成分と
する外部電気回路基板に実装した場合、特に半導体装置
が大集積化により大型化した場合、半導体装置における
絶縁基板と、外部電気回路基板との熱膨張差に起因して
半導体装置の実装時あるいが実装後の過酷な使用条件下
で、熱サイクルが付加された時に、半導体装置と外部電
気回路基板との電気的接続不良が発生するという問題が
提起されている。In addition, when the semiconductor device is mounted on an external electric circuit board containing an organic resin as a main component, particularly when the semiconductor device becomes large due to large integration, the insulating substrate in the semiconductor device and the external electric circuit board Due to the difference in thermal expansion between the semiconductor device and the external electrical circuit board when the semiconductor device is mounted or under a severe use condition after mounting and a thermal cycle is applied. Has been raised.
【０００８】このような問題に対しては、半導体装置に
おける絶縁基板の熱膨張特性を、有機樹脂を主成分とす
る外部電気回路基板の熱膨張係数に近似させることが提
案さている。通常、外部電気回路基板の熱膨張係数は９
〜１４ｐｐｍ／℃程度であるため、絶縁基板としても同
様に９〜１４ｐｐｍ／℃程度が要求される。[0008] With respect to such a problem, it has been proposed that the thermal expansion characteristics of the insulating substrate in the semiconductor device be approximated to the thermal expansion coefficient of the external electric circuit substrate containing organic resin as a main component. Generally, the coefficient of thermal expansion of the external electric circuit board is 9
Since it is about 14 ppm / ° C, about 9-14 ppm / ° C is also required as an insulating substrate.
【０００９】[0009]
【発明が解決しようとする課題】熱膨張係数が９〜１４
ｐｐｍ／℃程度の絶縁材料としては、アルミナ質セラミ
ックスでは得ることが難しいため、ガラスセラミックス
や有機樹脂を主成分とする複合材料により形成すること
が望ましいが、このような有機樹脂を主成分とする複合
材料やガラス−セラミックス複合材料は、アルミナ質セ
ラミックスに比較して熱伝導率が数Ｗ／ｍ・ｋ程度と低
いために、半導体装置の絶縁基板として用いた場合に
は、搭載する半導体素子からの発熱を充分に放散するこ
とができないために、高集積化、高速化された半導体素
子を搭載する半導体装置の絶縁基板として適用できない
ものであった。The coefficient of thermal expansion is 9-14.
Since it is difficult to obtain alumina / ceramics as an insulating material of about ppm / ° C., it is desirable to use glass ceramics or a composite material containing an organic resin as a main component, but such an organic resin is used as a main component. Since the composite material and the glass-ceramic composite material have a low thermal conductivity of about several W / m · k as compared with the alumina ceramics, when used as an insulating substrate of a semiconductor device, the composite material and glass-ceramic composite material are Since it is not possible to sufficiently dissipate the heat generated by the above, it cannot be applied as an insulating substrate of a semiconductor device mounting a highly integrated and high speed semiconductor element.
【００１０】また、熱放散性を改善する方法としては、
高熱伝導性を有する放熱体を取り付けることが望まれる
が、従来から最も多用されている約１０重量％銅を含む
銅−タングステン焼結体では、有機樹脂を主成分とする
複合材料やガラス−セラミックス複合材料からなる絶縁
基板とは熱膨張係数が大きく異なるために、熱膨張差に
起因する応力によって基板にクラックや反りが発生する
等の問題があった。As a method for improving the heat dissipation property,
Although it is desired to attach a heat radiator having high thermal conductivity, a copper-tungsten sintered body containing approximately 10% by weight of copper, which has been most frequently used in the past, is a composite material or glass-ceramics containing an organic resin as a main component. Since the thermal expansion coefficient is largely different from that of the insulating substrate made of the composite material, there is a problem that the substrate is cracked or warped due to the stress caused by the thermal expansion difference.
【００１１】しかも、ガラスセラミックス複合材料を配
線基板とする場合は、アルミナセラミックスの場合と同
様に靭性が低いので、熱膨張率が一致しないとクラック
が生じる可能性が高い。また有機樹脂を主成分とする複
合材料においては、材料の靭性は高いものの、逆に剛性
が低いために、熱膨張差に起因する応力によってパッケ
ージの反りが生じるなどの不具合が発生する。Moreover, when the glass-ceramic composite material is used as the wiring board, since the toughness is low as in the case of the alumina ceramics, cracks are likely to occur if the thermal expansion coefficients do not match. Further, in a composite material containing an organic resin as a main component, although the material has high toughness, on the contrary, since the rigidity is low, a problem such as warpage of the package occurs due to stress due to the difference in thermal expansion.
【００１２】このような熱膨張係数が９〜１４ｐｐｍ／
℃の高い熱膨張特性を有する絶縁基板を具備する半導体
装置における熱放散性の改善については、具体的に検討
されておらず、まして、熱膨張係数が９〜１４ｐｐｍ／
℃の高い熱膨張特性を有する絶縁基板に取り付ける放熱
体についても具体的に何ら検討されていない。Such a thermal expansion coefficient is 9 to 14 ppm /
Improvement of heat dissipation in a semiconductor device including an insulating substrate having a high thermal expansion characteristic of high temperature has not been specifically examined, let alone a thermal expansion coefficient of 9 to 14 ppm /
No specific study has been made on a heat radiator attached to an insulating substrate having a high thermal expansion characteristic of ℃.
【００１３】従って、本発明は、熱膨張係数が９〜１４
ｐｐｍ／℃の高い熱膨張特性を有する絶縁基板を具備す
る半導体装置における熱放散性を改善した半導体装置を
提供することを目的とするものである。Therefore, according to the present invention, the coefficient of thermal expansion is 9 to 14.
An object of the present invention is to provide a semiconductor device having improved heat dissipation in a semiconductor device including an insulating substrate having a high thermal expansion characteristic of ppm / ° C.
【００１４】[0014]
【課題を解決するための手段】本発明者らは、上記の問
題点に対して、検討を重ねた結果、有機樹脂を主成分と
する複合材料やガラス−セラミックス複合材料の強度が
これまでのアルミナ質セラミックスに比較して小さいこ
とに起因し、この絶縁基板に放熱体を取り付ける場合、
放熱体と絶縁基板との熱膨張差を小さく制御することが
必要であること、また、絶縁基板の熱膨張特性との差が
小さく、しかも高熱伝導性を有する材料としては、銅を
比較的多量に含み、これと室温から熱膨張係数が小さい
材料および焼結助剤と組み合わせた材料が最もよいこと
を知見した。As a result of repeated studies on the above problems, the inventors of the present invention have found that the strength of a composite material containing an organic resin as a main component or the strength of a glass-ceramic composite material has not been improved. Due to its small size compared to alumina ceramics, when mounting a radiator on this insulating substrate,
It is necessary to control the difference in thermal expansion between the heat radiator and the insulating substrate to be small, and the material having a small difference in thermal expansion characteristics from the insulating substrate and having high thermal conductivity is copper in a relatively large amount. It has been found that the best combination is a material having a small coefficient of thermal expansion from room temperature and a material combined with a sintering aid.
【００１５】即ち、本発明は、配線層を有し、且つ室温
から４００℃における熱膨張係数が９〜１４ｐｐｍ／℃
の絶縁基板と、該絶縁基板の表面に搭載された半導体素
子と、前記絶縁基板に接合された放熱体とを具備してな
る半導体装置において、前記放熱体が、銅を３０〜８０
重量％と、残部が室温から４００℃における熱膨張係数
が６ｐｐｍ／℃以下の低熱膨張金属と、焼結助剤金属と
の焼結体からなるとともに、前記絶縁基板との熱膨張差
が±０．５ｐｐｍ／℃であることを特徴とするものであ
り、特に、前記絶縁基板が、有機樹脂を主成分とする複
合材料やガラス−セラミックス複合材料からなり、前記
配線層が銅からなること特徴とするものである。That is, the present invention has a wiring layer and has a coefficient of thermal expansion from room temperature to 400 ° C. of 9 to 14 ppm / ° C.
In an insulating substrate, a semiconductor element mounted on the surface of the insulating substrate, and a radiator bonded to the insulating substrate, the radiator dissipating copper from 30 to 80.
% By weight, and the balance being a sintered body of a low thermal expansion metal having a thermal expansion coefficient of 6 ppm / ° C. or less at room temperature to 400 ° C. and a sintering aid metal, and having a thermal expansion difference of ± 0 with the insulating substrate. In particular, the insulating substrate is made of a composite material containing an organic resin as a main component or a glass-ceramic composite material, and the wiring layer is made of copper. To do.
【００１６】[0016]
【作用】本発明によれば、半導体素子を搭載した半導体
装置において、絶縁基板の室温から４００℃における熱
膨張係数を９〜１４ｐｐｍ／℃に制御することにより、
有機樹脂を主成分とする外部電気回路基板との熱膨張差
を小さくできるために、半導体装置をこの外部電気回路
基板に実装する時、あるいは実装後に熱サイクルが付与
された場合においても、熱膨張差に起因する接続不良を
生じることがなく、高信頼性の実装が可能となる。特
に、半導体装置の外部電気回路基板への接続端子がリー
ドピンでなく、半導体装置の裏面に形成された半田等や
金具からなり、半田等により表面実装するような半導体
装置の場合、特に熱膨張差による応力の発生が顕著であ
るため、特に上記のような高熱膨張係数の絶縁基板を用
いることが有効である。According to the present invention, in a semiconductor device mounted with a semiconductor element, the thermal expansion coefficient of the insulating substrate at room temperature to 400 ° C. is controlled to 9 to 14 ppm / ° C.
Since the difference in thermal expansion from the external electric circuit board containing organic resin as a main component can be made small, the thermal expansion does not occur even when the semiconductor device is mounted on this external electric circuit board or when a thermal cycle is applied after the mounting. It is possible to mount with high reliability without causing connection failure due to the difference. Particularly, in the case of a semiconductor device in which the connection terminals to the external electric circuit board of the semiconductor device are not lead pins but solder or metal fittings formed on the back surface of the semiconductor device and are surface-mounted by solder, etc. Since stress is significantly generated by the above, it is particularly effective to use an insulating substrate having a high coefficient of thermal expansion as described above.
【００１７】また、本発明によれば、上記のような高熱
膨張係数の絶縁基板が有機樹脂を主成分とする複合材料
やガラス−セラミックス複合材料から構成した場合、熱
伝導率が低いために放熱体を取り付けることが必須とな
るが、このような放熱体として、銅を３０〜８０重量％
と、残部が室温から４００℃における熱膨張係数が６ｐ
ｐｍ／℃以下の低熱膨張金属と、焼結助剤金属との焼結
体により構成する。このように銅の含有量を高めること
により放熱体の熱伝導率を高めることができ、半導体素
子の熱の放熱を高めることができる。Further, according to the present invention, when the insulating substrate having a high coefficient of thermal expansion as described above is made of a composite material containing an organic resin as a main component or a glass-ceramic composite material, the thermal conductivity is low, so that the heat radiation is reduced. It is essential to attach a body, but as such a heat radiator, copper is 30 to 80% by weight.
And the balance has a thermal expansion coefficient of 6p from room temperature to 400 ° C.
It is composed of a sintered body of a low thermal expansion metal of pm / ° C. or less and a sintering aid metal. By increasing the copper content in this way, the thermal conductivity of the radiator can be increased, and the heat dissipation of the semiconductor element can be increased.
【００１８】また、絶縁基板が有機樹脂を主成分とする
複合材料やガラス−セラミックス複合材料は、それ自体
と強度が大きくないために熱膨張差に起因する応力によ
って、容易にクラックが発生したり、封止構造の気密性
が損なわれる可能性が高い。Further, since the insulating substrate is a composite material containing an organic resin as a main component or the glass-ceramic composite material is not so strong as itself, a stress caused by a difference in thermal expansion easily causes cracks. The airtightness of the sealing structure is likely to be impaired.
【００１９】そこで、放熱体と前記絶縁基板との熱膨張
差を±０．５ｐｐｍ／℃以下に制御することにより、応
力の発生を抑制し、半導体装置の信頼性を高めることが
できるのである。Therefore, by controlling the difference in thermal expansion between the radiator and the insulating substrate to be ± 0.5 ppm / ° C. or less, it is possible to suppress the generation of stress and enhance the reliability of the semiconductor device.
【００２０】[0020]
【発明の実施の形態】本発明の半導体装置と、外部電気
回路基板への実装構造の概略図を図１に示した。図１に
よれば、半導体装置１の絶縁基板２の内部には配線層３
が形成され、配線層３の一部はスルーホール４として形
成される。また、絶縁基板２の一部には、キャビティ５
が形成され、キャビティ５の内部には半導体素子が収納
される。キャビティ５は、蓋体６により気密に封止され
ている。FIG. 1 is a schematic view of a semiconductor device of the present invention and a mounting structure on an external electric circuit board. According to FIG. 1, the wiring layer 3 is provided inside the insulating substrate 2 of the semiconductor device 1.
Are formed, and a part of the wiring layer 3 is formed as a through hole 4. In addition, the cavity 5 is provided in a part of the insulating substrate 2.
Is formed, and a semiconductor element is housed inside the cavity 5. The cavity 5 is hermetically sealed by the lid 6.
【００２１】また、この半導体装置１には放熱体７が取
り付けられている。この放熱体７は、絶縁基板２に接着
剤８により接合され、放熱体７の表面には半導体素子９
が直接取り付けられており、半導体素子９から発生する
熱を放熱する。A heat radiator 7 is attached to the semiconductor device 1. The radiator 7 is bonded to the insulating substrate 2 with an adhesive 8, and the semiconductor element 9 is provided on the surface of the radiator 7.
Are directly attached to radiate heat generated from the semiconductor element 9.
【００２２】なお、半導体装置１の下面には、外部電気
回路基板と接続するための端子電極１０が形成されてい
る。なお、この端子電極１０は、半導体素子９と配線層
３を通じて電気的に接続されている。この端子電極１０
は、図１によれば、半田からなるボール状電極である。A terminal electrode 10 for connecting to an external electric circuit board is formed on the lower surface of the semiconductor device 1. The terminal electrode 10 is electrically connected to the semiconductor element 9 through the wiring layer 3. This terminal electrode 10
1 is a ball-shaped electrode made of solder according to FIG.
【００２３】この半導体装置１を外部電気回路基板１１
に実装するには、外部電気回路基板１１の表面に形成さ
れた外部配線層１２と半田１３により実装される。ま
た、この外部電気回路基板１１は、有機樹脂を主体とす
る複合材料から構成され、具体的には、ガラスエポキシ
銅張基板等からなり、その熱膨張係数は、室温から４０
０℃において９〜１４ｐｐｍ／℃程度である。The semiconductor device 1 is connected to the external electric circuit board 11
The external wiring layer 12 and the solder 13 formed on the surface of the external electric circuit board 11 are used for mounting. The external electric circuit board 11 is composed of a composite material mainly composed of an organic resin, specifically, a glass epoxy copper clad board or the like, and its coefficient of thermal expansion is from room temperature to 40.
It is about 9 to 14 ppm / ° C at 0 ° C.
【００２４】本発明によれば、上記の半導体装置におい
て、絶縁基板２は、室温から４００℃における熱膨張係
数が９〜１４ｐｐｍ／℃の絶縁体から構成される。この
絶縁基板２の熱膨張係数を上記の範囲に限定したのは、
この範囲から逸脱すると、外部電気回路基板１１との熱
膨張差により半導体装置の実装時、または実装後の熱サ
イクル付加時に電気的接続不良が生じる場合があり、信
頼性を損ねるためである。According to the present invention, in the above semiconductor device, the insulating substrate 2 is made of an insulator having a coefficient of thermal expansion of 9 to 14 ppm / ° C. from room temperature to 400 ° C. The reason why the thermal expansion coefficient of the insulating substrate 2 is limited to the above range is that
If it deviates from this range, electrical connection failure may occur at the time of mounting the semiconductor device or at the time of applying a heat cycle after mounting due to the difference in thermal expansion with the external electric circuit board 11, and this will reduce the reliability.
【００２５】このような熱膨張特性を有する材料として
は、熱膨張係数が上記の範囲を満足するものであれば、
有機樹脂を主成分とする複合材料、セラミックス、ガラ
ス−セラミックス複合材料のいずれであってもよいが、
半導体装置の配線層を銅配線により構成する場合には、
とりわけ、有機樹脂を主成分とする複合材料やガラスセ
ラミックス複合材料が好適である。As a material having such a thermal expansion characteristic, if the coefficient of thermal expansion satisfies the above range,
It may be any of a composite material containing an organic resin as a main component, ceramics, and a glass-ceramic composite material,
When the wiring layer of the semiconductor device is composed of copper wiring,
Above all, a composite material containing an organic resin as a main component and a glass ceramic composite material are preferable.
【００２６】このような特性を有する有機樹脂を主成分
とする複合材料としては、ガラス−エポキシ系複合材料
等が挙げられる。なお、この有機樹脂を主成分とする複
合材料は、それ自体の靱性が低いことから、内部に配設
される銅配線層の配線密度によって、熱膨張係数が変化
する。Examples of the composite material containing an organic resin as a main component having such characteristics include a glass-epoxy composite material. Since the composite material containing the organic resin as a main component has low toughness, the coefficient of thermal expansion changes depending on the wiring density of the copper wiring layer provided inside.
【００２７】一方、上記のような特性を有するガラスセ
ラミックス複合材料としては、特願平７−１９５２０６
号、特願平７−２８３８３２号にて提案したように、Ｌ
ｉ2Ｏを５〜３０重量％の割合で含有するリチウム珪酸
ガラスやＮａ2 Ｏ、Ａｌ2 Ｏ3 を含有するソーダアルミ
ニウム珪酸ガラス、室温から４００℃までの熱膨張係数
が６ｐｐｍ／℃以上のセラミックフィラーとから構成さ
れるものが挙げられる。室温から４００℃までの熱膨張
係数が６ｐｐｍ／℃以上のセラミックフィラーとして
は、フォルステライト、クリストバライト、クウォー
ツ、スピネル、ネフェリン、アルミナ、ペタライト、エ
ンスタタイト等が挙げられる。On the other hand, as a glass-ceramic composite material having the above characteristics, Japanese Patent Application No. 7-195206 is available.
No., as proposed in Japanese Patent Application No. 7-283832.
Lithium silicate glass containing 5 to 30% by weight of i 2 O, soda aluminum silicate glass containing Na 2 O and Al 2 O 3, and ceramic having a thermal expansion coefficient of 6 ppm / ° C or more from room temperature to 400 ° C. Examples include those composed of a filler. Examples of the ceramic filler having a thermal expansion coefficient of 6 ppm / ° C. or higher from room temperature to 400 ° C. include forsterite, cristobalite, quartz, spinel, nepheline, alumina, petalite, enstatite and the like.
【００２８】また、配線層としては、Ｗ、Ｍｏ、Ｍｏ−
Ｍｎ、Ｃｕ、Ａｇ、Ａｕ等が挙げられるが、配線層とし
ての信頼性の点、および高周波用としてはＣｕが最も望
ましく、配線層は、絶縁基板と同時焼成によって形成さ
れることが多層化の上で望ましい。As the wiring layer, W, Mo, Mo-
Examples thereof include Mn, Cu, Ag, Au, etc., but Cu is most preferable in terms of reliability as a wiring layer and for high frequencies, and the wiring layer may be formed by co-firing with an insulating substrate. Desirable above.
【００２９】一方、放熱体としては、銅を３０〜８０重
量％と、残部が室温から４００℃における熱膨張係数が
６ｐｐｍ／℃以下の低熱膨張金属と、焼結助剤金属との
合金からなる。また、前記絶縁基板が、有機樹脂を主体
する複合材料や、ガラスセラミックス複合材料からなる
場合、それ自体の熱伝導率は低いために半導体装置とし
ての放熱体の熱伝導性はより高いものが要求される。従
って、望ましくは、放熱体の熱伝導率は１５０Ｗ／ｍ・
ｋ以上、特に２００Ｗ／ｍ・ｋ以上であることが望まし
い。On the other hand, the heat radiating body is made of an alloy of 30 to 80% by weight of copper, the balance being a low thermal expansion metal having a thermal expansion coefficient of 6 ppm / ° C. or less at room temperature to 400 ° C. and a sintering aid metal. . In addition, when the insulating substrate is made of a composite material mainly composed of an organic resin or a glass ceramic composite material, the thermal conductivity of the semiconductor substrate is low, and thus a heat radiator of a semiconductor device is required to have higher thermal conductivity. To be done. Therefore, it is desirable that the heat conductivity of the radiator be 150 W / m.
It is desirable that it is k or more, especially 200 W / m · k or more.
【００３０】なお、銅の含有量を上記の範囲に限定した
のは、３０重量％より少ないと、１５０Ｗ／ｍ・ｋ以上
の熱伝導率が得られずに本発明の半導体装置に対する放
熱体としての機能が不十分となり、８０重量％を越える
と熱膨張係数を上記の範囲に制御することが困難となる
ためである。The copper content is limited to the above range when the content is less than 30% by weight, the thermal conductivity of 150 W / m · k or more cannot be obtained, and the copper is used as a radiator for the semiconductor device of the present invention. This is because the above function becomes insufficient, and if it exceeds 80% by weight, it becomes difficult to control the thermal expansion coefficient within the above range.
【００３１】また、熱膨張係数が６ｐｐｍ／℃以下の金
属は、銅の熱膨張係数が非常に大きいために、放熱体の
熱膨張係数を上記のように調整するための必須の成分で
あり、６ｐｐｍ／℃より大きい金属を選択すると、熱膨
張係数を上記の範囲に制御するためには、銅の量を減ら
さねばならないために、放熱体としての熱伝導率を高め
ることができないためである。なお、焼結助剤は主成分
に応じて適切に選択すれば良い。A metal having a coefficient of thermal expansion of 6 ppm / ° C. or less is an essential component for adjusting the coefficient of thermal expansion of the radiator as described above, because the coefficient of thermal expansion of copper is very large. This is because if a metal having a content of more than 6 ppm / ° C. is selected, the amount of copper must be reduced in order to control the thermal expansion coefficient within the above range, so that the thermal conductivity as a radiator cannot be increased. The sintering aid may be appropriately selected according to the main component.
【００３２】例えば、銅に対して、熱膨張係数が６ｐｐ
ｍ／℃以下の金属としてタングステンを選択した場合、
焼結助剤金属としては、鉄、ニッケル、コバルトなどの
鉄族元素が最適である。その他、熱膨張係数が６ｐｐｍ
／℃以下の金属としては、モリブデン等が挙げられ、焼
結助剤金属としては、Ｎｉ等の鉄族金属等が最適であ
る。For example, the coefficient of thermal expansion is 6 pp for copper.
When tungsten is selected as the metal of m / ° C or less,
As the sintering aid metal, iron group elements such as iron, nickel and cobalt are most suitable. In addition, the thermal expansion coefficient is 6ppm
Examples of the metal having a temperature of / ° C. or lower include molybdenum and the like, and the sintering aid metal is most preferably an iron group metal such as Ni.
【００３３】本発明における放熱体は、上記金属成分の
組成によって、放熱体焼結体の室温から４００℃までの
熱膨張係数の前記絶縁基板との熱膨張差が±０．５ｐｐ
ｍ／℃、特に±０．３ｐｐｍ／℃以下となるように調整
される。本発明の放熱体は、粉末冶金により作製される
ものであり、各金属成分がそれぞれ粒子分散した組織か
ら構成されるために、これらの複合材料の熱膨張係数α
は、一般に次の数１で容易に計算することができる。In the heat radiator of the present invention, the difference in thermal expansion coefficient of the thermal expansion body from the room temperature to 400 ° C. of the insulating substrate is ± 0.5 pp, depending on the composition of the metal components.
m / ° C., especially ± 0.3 ppm / ° C. or less. The heat radiator of the present invention is produced by powder metallurgy, and since each metal component is composed of a structure in which particles are dispersed, the thermal expansion coefficient α of these composite materials is
Can generally be easily calculated by the following equation 1.
【００３４】[0034]
【数１】 [Equation 1]
【００３５】また、個々の材料の体積弾性率、剛性率が
著しく異なることのない場合には、次の数２で近似する
ことができる。If the bulk modulus and the rigidity of the individual materials are not significantly different, the following equation 2 can be used for approximation.
【００３６】[0036]
【数２】 [Equation 2]
【００３７】この数１あるいは数２あるいはこの式に準
じた実験式を作製することにより、熱膨張係数を絶縁基
板に正確に一致させることのできる放熱体材料を容易に
決定することができる。By preparing the Mathematical formula 1 or the Mathematical formula 2 or an empirical formula based on this formula, it is possible to easily determine a radiator material that can exactly match the thermal expansion coefficient with the insulating substrate.
【００３８】なお、放熱体を半導体装置に絶縁基板に取
り付ける方法としては、エポキシ系の有機樹脂による接
着や、半田による接合等でも可能である。また、放熱体
に半導体素子を取り付ける場合には、放熱体の熱膨張係
数が大きくても、半導体素子自体が小さいために熱膨張
差による応力も大きくなく、問題となることはないが、
信頼性の点からは、エポキシ系。ポリイミド系の有機系
の樹脂の接着剤あるいはこれにＡｇなどの金属を配合し
たものにより接着することにより、応力が発生した場合
においても接着層により応力が緩和される。As a method of attaching the heat radiator to the insulating substrate on the semiconductor device, adhesion with an epoxy-based organic resin, joining with solder, or the like is also possible. In addition, when a semiconductor element is attached to the heat radiator, even if the thermal expansion coefficient of the heat radiator is large, the stress due to the difference in thermal expansion is not large because the semiconductor element itself is small, so there is no problem.
From the point of reliability, epoxy type. By adhering with a polyimide-based organic resin adhesive or a compound in which a metal such as Ag is mixed, the stress is relieved by the adhesive layer even when stress is generated.
【００３９】上記の実施の形態では、接続端子がボール
状の半田により形成される場合について述べたが、上記
以外にリードレスチップキャリア、クワッドフラットパ
ッケージのように、外部電気回路基板に対して表面実装
されるタイプの接続端子であってもよく、また、ピング
リッドアレイの様にリードタイプの接続端子であっても
よい。In the above embodiment, the case where the connection terminal is formed by ball-shaped solder has been described, but in addition to the above, the surface of the external electric circuit board is different from that of the leadless chip carrier or the quad flat package. It may be a type of connection terminal to be mounted, or a lead type connection terminal such as a pin grid array.
【００４０】[0040]
【実施例】本発明による図１に示す半導体装置を具体的
に製造した。なお、基板の外辺寸法は５ｃｍ×５ｃｍ、
キャビティ内寸法 ２ｃｍ×２ｃｍ、基板厚み３ｍｍの
寸法とし、放熱体は３ｃｍ×３ｃｍ×５ｍｍの寸法とし
た。EXAMPLE A semiconductor device shown in FIG. 1 according to the present invention was specifically manufactured. The outer dimensions of the substrate are 5 cm × 5 cm,
The inside dimensions of the cavity were 2 cm × 2 cm, the substrate thickness was 3 mm, and the radiator was 3 cm × 3 cm × 5 mm.
【００４１】（絶縁基板）絶縁基板としては、ガラス−
エポキシ複合材料を絶縁基板として、Ｃｕを内部配線と
して、絶縁基板内への配線密度の異なる複数の基板を作
製し、室温から４００℃までの熱膨張係数が１２．７ｐ
ｐｍ／℃、１３．１ｐｐｍ／℃、１３．７ｐｐｍ／℃の
３種類の配線基板を作製した。(Insulating Substrate) As the insulating substrate, glass-
A plurality of substrates having different wiring densities into the insulating substrate were prepared by using the epoxy composite material as the insulating substrate and Cu as the internal wiring, and the thermal expansion coefficient from room temperature to 400 ° C. was 12.7 p.
Three types of wiring boards of pm / ° C, 13.1 ppm / ° C, and 13.7 ppm / ° C were produced.
【００４２】また、ガラスセラミック複合材料として、
表１に示すような種々の材料を用いた。そして、これら
の組成物を用いてドクターブレード法によりグリーンシ
ートを作製した後、シートの表面に銅ペーストを塗布し
て複数層積層した後、９００〜１０００℃で同時焼成し
た。また、基板の底面には、内部配線層との接続され
た、高温半田からなるボール状の端子電極を取付けた。As the glass ceramic composite material,
Various materials as shown in Table 1 were used. Then, a green sheet was produced by a doctor blade method using these compositions, a copper paste was applied to the surface of the sheet to laminate a plurality of layers, and then the sheets were simultaneously fired at 900 to 1000 ° C. Further, ball-shaped terminal electrodes made of high-temperature solder, which were connected to the internal wiring layer, were attached to the bottom surface of the substrate.
【００４３】[0043]
【表１】 [Table 1]
【００４４】（放熱体の作製）放熱体として、銅、低熱
膨張率の金属としてタングステン、焼結助剤金属として
ニッケルを選択した。銅粉末とタングステン粉末とニッ
ケル粉末を所定量だけ調合し、粉末１００重量部に対し
てナイロンボールを１２０重量部加え、乾式にてボール
ミル中で８時間混合を行った。混合を行った粉末を所定
の金型に充填し、１平方ｃｍあたり３ｔの荷重に調整し
た１軸プレスにて加圧を行い成形体を得た。その後、成
形体を水素１２．５体積％、窒素８７．５体積％のフォ
ーミングガス気流中で、組成に応じて１２００〜１３５
０℃の炉中に２時間保持し、材料を焼結させた。この焼
結体を所定寸法に切りだした後、上下面を研磨し、放熱
体とした。そして、これらの放熱体を上記のガラス−エ
ポキシ複合材料製の基板に対してはエポキシ樹脂系接着
剤により、ガラスセラミック複合材料製の配線基板に対
しては高温の半田付けにて接合した。また、半導体素子
の放熱体への取付は、エポキシ系樹脂接着剤により行っ
た。(Preparation of Heat Dissipator) Copper was selected as the heat dissipator, tungsten was selected as the metal having a low coefficient of thermal expansion, and nickel was selected as the sintering aid metal. A predetermined amount of copper powder, tungsten powder and nickel powder were mixed, 120 parts by weight of nylon balls were added to 100 parts by weight of the powder, and the mixture was dry-type mixed in a ball mill for 8 hours. The mixed powder was filled in a predetermined mold and pressed with a uniaxial press adjusted to a load of 3 t per 1 cm 2 to obtain a molded body. Then, the molded body is subjected to a forming gas flow of 12.5% by volume of hydrogen and 87.5% by volume of nitrogen, and the amount of 1200 to 135 depending on the composition.
The material was sintered by holding it in an oven at 0 ° C for 2 hours. After cutting this sintered body into a predetermined size, the upper and lower surfaces were polished to obtain a radiator. Then, these radiators were bonded to the above-mentioned glass-epoxy composite material substrate by an epoxy resin adhesive and to the glass-ceramic composite material wiring board by high-temperature soldering. Further, the semiconductor element was attached to the radiator by an epoxy resin adhesive.
【００４５】（試験）上記のようにして作製された半導
体装置に対して、基板自体の反りなどを含む寸法変化
量、および放熱体と絶縁基板との接合部周辺でのクラッ
クの有無について調べた。(Test) For the semiconductor device manufactured as described above, the amount of dimensional change including the warp of the substrate itself and the presence or absence of cracks around the joint between the radiator and the insulating substrate were examined. .
【００４６】また、この半導体装置をガラスエポキシ樹
脂の表面に銅箔の配線導体が形成された複合基板からな
る外部電気回路基板（０〜４００℃熱膨張係数１３ｐｐ
ｍ／℃）に半田により実装した後、これを−４０℃と１
２５℃の恒温槽に１５分／１５分の１サイクルとして、
熱サイクル試験を行い電気抵抗に変化が現れるまでのサ
イクル数を表２に示した。Further, this semiconductor device is provided with an external electric circuit board (0 to 400 ° C. having a thermal expansion coefficient of 13 pp, which is a composite board in which wiring conductors of copper foil are formed on the surface of glass epoxy resin.
m / ° C) by soldering and then -40 ° C and 1
In a constant temperature bath at 25 ° C, cycle 15 minutes / 15 minutes,
Table 2 shows the number of cycles until a change in the electric resistance was observed in the heat cycle test.
【００４７】[0047]
【表２】 [Table 2]
【００４８】表２からも明らかなように、絶縁基板と放
熱体との熱膨張差の絶対値が０．５ｐｐｍ／℃よりも大
きい試料Ｎo.２、３、６、８では、いずれも、反りが大
きくなったり、絶縁基板にクラックが発生する等を弊害
が生じた。また、絶縁基板としての熱膨張係数が７．５
ｐｐｍ／℃の試料Ｎo.１０では、外部電気回路基板との
熱膨張差が起因する応力により、熱サイクル試験で電気
抵抗の変化が認められ、十分な信頼性の高いものではな
かった。As is clear from Table 2, in samples Nos. 2, 3, 6, and 8 in which the absolute value of the difference in thermal expansion between the insulating substrate and the radiator is larger than 0.5 ppm / ° C. Has a bad effect such as a large size and cracks on the insulating substrate. Further, the thermal expansion coefficient of the insulating substrate is 7.5.
In sample No. 10 of ppm / ° C., due to stress caused by the difference in thermal expansion from the external electric circuit board, a change in electric resistance was observed in the thermal cycle test, and the reliability was not sufficiently high.
【００４９】また、放熱体の組成において、Ｃｕの含有
量が３０重量％より少ない試料Ｎo.３、１３では、熱膨
張係数が９ｐｐｍ／℃より小さくなるか、または熱伝導
率が２００Ｗ／ｍ・Ｋより低くなり、８０重量％を越え
る試料Ｎo.９では、熱膨張係数が１４ｐｐｍ／℃を越え
るものとなった。Regarding the composition of the heat radiator, in samples No. 3 and 13 in which the Cu content is less than 30% by weight, the coefficient of thermal expansion is smaller than 9 ppm / ° C., or the thermal conductivity is 200 W / m.multidot. The sample No. 9, which has a temperature lower than K and exceeds 80% by weight, has a coefficient of thermal expansion exceeding 14 ppm / ° C.
【００５０】これに対して、絶縁基板の熱膨張係数が９
〜１４ｐｐｍ／℃の範囲で、放熱体との熱膨張差を絶対
値で０．５ｐｐｍ／℃以下とすることにより、反りやク
ラックの発生が解消されると同時に、外部電気回路基板
への実装においても熱サイクルに対して高い信頼性を有
するものであった。しかも、放熱体として３０〜８０重
量％のＣｕを含有するものは、いずれも２００Ｗ／ｍ・
Ｋ以上の高い熱伝導率−示した。On the other hand, the thermal expansion coefficient of the insulating substrate is 9
In the range of up to 14 ppm / ° C, the difference in thermal expansion with the radiator is set to 0.5 ppm / ° C or less in absolute value, which eliminates the occurrence of warpage and cracks and at the same time when mounting on an external electric circuit board. Also had high reliability for thermal cycling. Moreover, the heat radiator containing 30 to 80% by weight of Cu is 200 W / m.
High thermal conductivity of K or higher-shown.
【００５１】[0051]
【発明の効果】以上詳述したように、本発明によれば、
高熱膨張係数の絶縁基板を有するために、有機樹脂を主
成分とする外部電気回路基板への実装においても高い信
頼性を有すると同時に、さらに絶縁基板との熱膨張差の
小さい放熱体を具備するために、基板と放熱体との熱膨
張差に起因する応力の発生を抑制し、反りやクラックの
発生がなく、且つ高い放熱特性を有する半導体装置を提
供できる。As described in detail above, according to the present invention,
Since it has an insulating substrate with a high coefficient of thermal expansion, it has high reliability even when mounted on an external electric circuit board containing organic resin as a main component, and at the same time, it has a radiator with a small difference in thermal expansion from the insulating substrate. Therefore, it is possible to provide a semiconductor device that suppresses the generation of stress due to the difference in thermal expansion between the substrate and the heat radiator, does not cause warpage or cracks, and has high heat radiation characteristics.
【図１】本発明の半導体装置と、外部電気回路基板への
実装構造を説明するための概略図である。FIG. 1 is a schematic diagram for explaining a semiconductor device of the present invention and a mounting structure on an external electric circuit board.
１ 半導体装置 ２ 絶縁基板 ３ 配線層 ４ スルーホール ５ キャビティ ６ 蓋体 ７ 放熱体 ８ 接着剤 ９ 半導体素子 １０ 端子電極 １１ 外部電気回路基板 １２ 外部配線層 １３ 半田 1 Semiconductor Device 2 Insulating Substrate 3 Wiring Layer 4 Through Hole 5 Cavity 6 Lid 7 Heat Dissipator 8 Adhesive 9 Semiconductor Element 10 Terminal Electrode 11 External Electric Circuit Board 12 External Wiring Layer 13 Solder
Claims (3)
熱膨張係数が９〜１４ｐｐｍ／℃の絶縁基板と、該絶縁
基板の表面に搭載された半導体素子と、前記絶縁基板に
接合された放熱体とを具備してなる半導体装置におい
て、前記放熱体が、銅を３０〜８０重量％と、残部が室
温から４００℃における熱膨張係数が６ｐｐｍ／℃以下
の低熱膨張金属と、焼結助剤金属との焼結体からなると
ともに、前記絶縁基板との熱膨張差が±０．５ｐｐｍ／
℃であることを特徴とする半導体装置。1. An insulating substrate having a wiring layer and having a coefficient of thermal expansion from room temperature to 400 ° C. of 9 to 14 ppm / ° C., a semiconductor element mounted on the surface of the insulating substrate, and bonded to the insulating substrate. In a semiconductor device comprising a heat radiator, the heat radiator comprises 30 to 80% by weight of copper, and the rest is a low thermal expansion metal having a thermal expansion coefficient of 6 ppm / ° C or less at room temperature to 400 ° C, and a sintering aid. It is made of a sintered body with an agent metal and has a thermal expansion difference of ± 0.5 ppm /
A semiconductor device having a temperature of ° C.
複合材料またはガラス−セラミックス複合材料からなる
請求項１記載の半導体装置。2. The semiconductor device according to claim 1, wherein the insulating substrate is made of a composite material containing an organic resin as a main component or a glass-ceramic composite material.
求項２記載の半導体装置。3. The semiconductor device according to claim 1, wherein the wiring layer is made of copper.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP33749995A JP3426827B2 (en) | 1995-12-25 | 1995-12-25 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP33749995A JP3426827B2 (en) | 1995-12-25 | 1995-12-25 | Semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH09181220A true JPH09181220A (en) | 1997-07-11 |
| JP3426827B2 JP3426827B2 (en) | 2003-07-14 |
Family
ID=18309234
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP33749995A Expired - Fee Related JP3426827B2 (en) | 1995-12-25 | 1995-12-25 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3426827B2 (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003007940A (en) * | 2001-06-25 | 2003-01-10 | Kyocera Corp | Heat radiation member and package for housing semiconductor element |
| US6611056B2 (en) | 1999-03-16 | 2003-08-26 | Hitachi, Ltd. | Composite material, and manufacturing method and uses of same |
| US6909185B1 (en) | 1998-12-07 | 2005-06-21 | Hitachi, Ltd. | Composite material including copper and cuprous oxide and application thereof |
| JP2016216795A (en) * | 2015-05-25 | 2016-12-22 | 住友金属鉱山株式会社 | Alloy target for sputtering, and production method of alloy target for sputtering |
-
1995
- 1995-12-25 JP JP33749995A patent/JP3426827B2/en not_active Expired - Fee Related
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6909185B1 (en) | 1998-12-07 | 2005-06-21 | Hitachi, Ltd. | Composite material including copper and cuprous oxide and application thereof |
| US6611056B2 (en) | 1999-03-16 | 2003-08-26 | Hitachi, Ltd. | Composite material, and manufacturing method and uses of same |
| US6630734B2 (en) | 1999-03-16 | 2003-10-07 | Hitachi, Ltd. | Composite material, and manufacturing method and uses of same |
| JP2003007940A (en) * | 2001-06-25 | 2003-01-10 | Kyocera Corp | Heat radiation member and package for housing semiconductor element |
| JP4574071B2 (en) * | 2001-06-25 | 2010-11-04 | 京セラ株式会社 | Package for housing heat dissipation member and semiconductor element |
| JP2016216795A (en) * | 2015-05-25 | 2016-12-22 | 住友金属鉱山株式会社 | Alloy target for sputtering, and production method of alloy target for sputtering |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3426827B2 (en) | 2003-07-14 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP3426827B2 (en) | Semiconductor device | |
| JP3631638B2 (en) | Mounting structure of semiconductor device package | |
| JP2001338999A (en) | Semiconductor element storing package | |
| JP3297567B2 (en) | Package for housing semiconductor element and its mounting structure | |
| JPH09142880A (en) | Glass-ceramic sintered compact and wiring board using the same | |
| JP3347583B2 (en) | Wiring board mounting structure | |
| JP3323074B2 (en) | Wiring board, package for housing semiconductor element and its mounting structure | |
| JP3323043B2 (en) | Wiring board, semiconductor device storage package using the same, and mounting structure thereof | |
| JP3339999B2 (en) | Wiring board, semiconductor device storage package using the same, and mounting structure thereof | |
| JP3193275B2 (en) | Wiring board, semiconductor device storage package using the same, and mounting structure thereof | |
| JP3740225B2 (en) | Wiring board mounting structure | |
| JP3450167B2 (en) | Package for storing semiconductor elements | |
| JP3305579B2 (en) | Wiring board, semiconductor element storage package and mounting structure | |
| JP3210837B2 (en) | Wiring board, semiconductor device storage package using the same, and mounting structure thereof | |
| JP3502759B2 (en) | Semiconductor element mounting structure and wiring board mounting structure | |
| JP3420447B2 (en) | Wiring board mounting structure | |
| JP2001015649A (en) | Semiconductor element mounting wiring substrate and wiring substrate mounting structure | |
| JP3210844B2 (en) | Wiring board, semiconductor device storage package using the same, and mounting structure thereof | |
| JP3450998B2 (en) | Wiring board and its mounting structure | |
| JP3850312B2 (en) | Semiconductor element storage package and semiconductor device | |
| JP3677468B2 (en) | Package and its mounting structure | |
| JP2001102492A (en) | Wiring board and mounting structure thereof | |
| JPH1117344A (en) | Multilayer wiring board | |
| JPH10135370A (en) | Wiring board, package for semiconductor element and mounting structure thereof | |
| JPH08167674A (en) | Package for semiconductor element |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20090509 Year of fee payment: 6 |
|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20090509 Year of fee payment: 6 |
|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20100509 Year of fee payment: 7 |
|
| LAPS | Cancellation because of no payment of annual fees |