JPH09153470A - Film deposition for semiconductor device - Google Patents
Film deposition for semiconductor deviceInfo
- Publication number
- JPH09153470A JPH09153470A JP31389495A JP31389495A JPH09153470A JP H09153470 A JPH09153470 A JP H09153470A JP 31389495 A JP31389495 A JP 31389495A JP 31389495 A JP31389495 A JP 31389495A JP H09153470 A JPH09153470 A JP H09153470A
- Authority
- JP
- Japan
- Prior art keywords
- groove
- film
- aluminum
- base film
- deposited
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)
- Physical Vapour Deposition (AREA)
- ing And Chemical Polishing (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、半導体製造プロセ
スの薄膜形成工程において、微小な溝や穴のある段差基
板上に金属をスパッタ工程、或いはリフロー工程によっ
て埋め込み、平坦な膜を形成させる方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of forming a flat film by burying a metal on a stepped substrate having fine grooves and holes by a sputtering process or a reflow process in a thin film forming process of a semiconductor manufacturing process. .
【０００２】[0002]
【従来の技術】従来の微小段差埋め込み方法は、絶縁膜
の上に直接アルミニウムをスパッタ蒸着させて埋め込ん
でいたが、配線構造の微小化に伴いアルミニウムが底部
にまで到達しにくくなり、内部に空洞を形成したまま開
口部を塞いでしまうという問題があった。そこで、特開
昭63−166246号公報にあるように、溝の開口部に埋め込
む金属に対して濡れ性の良い材質の下地膜を開口部全体
にあらかじめ形成させた後、溶融金属槽の中に基板を浸
して溝を埋め込むという方法が提案されていた。2. Description of the Related Art In a conventional method of filling a minute step, aluminum is directly sputter-deposited on an insulating film to be buried, but with the miniaturization of the wiring structure, it becomes difficult for aluminum to reach the bottom, and a cavity is formed inside. There is a problem in that the opening is closed while the formation is made. Therefore, as disclosed in Japanese Patent Laid-Open No. 63-166246, a base film made of a material having good wettability with respect to the metal to be embedded in the opening of the groove is formed in advance over the entire opening and then placed in a molten metal bath. A method of immersing the substrate to fill the groove has been proposed.
【０００３】[0003]
【発明が解決しようとする課題】しかし、上記の従来技
術では装置が大がかりになる上に、基板に不要な溶融金
属が付着する恐れもあった。However, in the above-mentioned prior art, the size of the apparatus becomes large, and unnecessary molten metal may adhere to the substrate.
【０００４】本発明の目的は、比較的成膜を行いやすい
スパッタ装置を用い、溝内部に空洞を形成させないよう
に確実に金属を蒸着・リフローさせ、集積回路の歩留ま
り及び性能を向上することができる半導体装置の微小段
差部埋め込み方法を提供することにある。It is an object of the present invention to improve the yield and performance of an integrated circuit by using a sputtering apparatus which is relatively easy to form a film and by which metal is surely vapor-deposited and reflowed so as not to form a cavity inside the groove. Another object of the present invention is to provide a method of embedding a minute step in a semiconductor device that can be performed.
【０００５】[0005]
【課題を解決するための手段】上記の目的を達成するた
めに、段差表面に濡れ性の良い下地膜を形成し、溝近く
の基板上部の平面と溝入り口付近のみ下地膜を削り落と
す、或いは下地膜を変質させる、またはその部分に濡れ
性の悪い別の膜をかぶせることでスパッタ蒸着させた膜
を溝内部へ流し込み、半導体装置の微小段差部埋め込み
を可能にする。In order to achieve the above object, an undercoating film having good wettability is formed on the step surface, and the undercoating film is scraped off only on the flat surface of the substrate near the groove and near the groove entrance, or By changing the quality of the base film or by covering another part thereof with another film having poor wettability, the sputter-deposited film is poured into the inside of the groove, so that the semiconductor device can be filled with a minute step portion.
【０００６】[0006]
【発明の実施の形態】以下、本発明の第一の実施例を図
１から図３により説明する。ここでは、半導体製造プロ
セスの一つであるスパッタ工程にて、シリコン（Ｓｉ）
基板と層間絶縁膜（ここでは二酸化珪素ＳｉＯ2 ）で形
成された溝の上にアルミニウム(Ａｌ)をスパッタ蒸着さ
せることにより、溝内部にアルミニウムを埋め込む方法
について述べる。溝の深さは約１μｍであり、蒸着する
アルミニウムの膜厚も約１μｍである。スパッタ工程と
はシリコンウェハを真空装置に入れ、ウェハ表面にスパ
ッタされたアルミニウム粒子を降り積もらせることによ
り、シリコン基板にアルミ膜を形成するものである。そ
の際、基板表面に溝や穴のような段差がある場合、立体
角の大きい溝上部にアルミニウムが成長するため、溝内
部に空洞を作ったまま開口部に蓋をしてしまう（図
８）。溝の中に形成されるアルミニウム膜厚を大きくす
る目的で、アルミニウムの流動性を増すように、シリコ
ン基板の温度を高温（例えば４００℃）にしてスパッタ
蒸着させると、シリコンや層間絶縁膜に対するアルミニ
ウムの濡れ性の悪さが原因し、やはり溝３の中に乾き面
や空洞が生じてしまう。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A first embodiment of the present invention will be described below with reference to FIGS. Here, silicon (Si) is used in the sputtering process, which is one of the semiconductor manufacturing processes.
A method of burying aluminum in the groove by sputter-depositing aluminum (Al) on the groove formed by the substrate and the interlayer insulating film (here, silicon dioxide SiO 2 ) will be described. The depth of the groove is about 1 μm, and the film thickness of vapor-deposited aluminum is also about 1 μm. The sputtering step is to form an aluminum film on a silicon substrate by placing a silicon wafer in a vacuum device and depositing aluminum particles sputtered on the surface of the wafer. At that time, if there is a step such as a groove or a hole on the surface of the substrate, aluminum grows on the upper part of the groove having a large solid angle, so that the opening is covered while leaving a cavity inside the groove (FIG. 8). . In order to increase the film thickness of aluminum formed in the groove, when the temperature of the silicon substrate is set to a high temperature (for example, 400 ° C.) and sputter deposition is performed so as to increase the fluidity of aluminum, aluminum for the silicon and the interlayer insulating film is formed. Due to the poor wettability of the groove, a dry surface or a cavity is also formed in the groove 3.
【０００７】図１ないし図３は本発明の第一の実施例に
より、溝内部にアルミニウムを埋め込む方法を工程順に
示す断面図である。まず、図１のように、シリコン基板
１と層間絶縁膜２により構成された溝３があった場合、
その表面にアルミニウムに対して濡れ性の良い下地膜４
を形成させる。この下地膜としては、例えばチタン（Ｔ
ｉ）やタングステン（Ｗ）のような高融点金属が挙げら
れる。次に、溝付近の基板上部平面と溝側壁の上部５
を、スパッタエッチすることにより、下地膜を削り落と
し、図２のように層間絶縁膜が現れるようにする。エッ
チングの手段としては、例えばスパッタさせる金属粒子
に方向性を持たせ、斜めに基板に入射するようにする
と、図２のように下地膜が削られる。この際、溝上部の
肩が削り落とされ、テーパがついた状態になっても、半
導体の集積密度や電気的特性が変わらない範囲であれば
良い。ここに、蒸着金属であるアルミニウム６を高温
（例えば４００℃）のシリコン基板温度でスパッタ蒸着
させると、アルミニウム６は濡れ性の悪い溝上部の層間
絶縁膜から濡れ性の良い下地膜の方に引き込まれ、溝の
底部へ流動し、開口部を塞ぐことなく図３のように溝を
埋め込む。1 to 3 are cross-sectional views showing, in the order of steps, a method of embedding aluminum in a groove according to a first embodiment of the present invention. First, as shown in FIG. 1, when there is a groove 3 constituted by a silicon substrate 1 and an interlayer insulating film 2,
A base film 4 having good wettability to aluminum on its surface
Is formed. Examples of the base film include titanium (T
i) and refractory metals such as tungsten (W). Next, the upper surface of the substrate near the groove and the upper part 5 of the groove side wall
Is sputter-etched to scrape off the underlying film so that the interlayer insulating film appears as shown in FIG. As a means of etching, for example, when the metal particles to be sputtered have directionality and are obliquely incident on the substrate, the underlying film is scraped as shown in FIG. At this time, even if the shoulder of the upper part of the groove is scraped off and a taper is formed, it may be within a range in which the integration density and electrical characteristics of the semiconductor do not change. When aluminum 6 which is a vapor deposition metal is sputter-deposited at a high temperature (for example, 400 ° C.) of the silicon substrate, the aluminum 6 is drawn from the interlayer insulating film above the groove having poor wettability toward the base film having good wettability. Flow to the bottom of the groove and fill the groove as shown in FIG. 3 without blocking the opening.
【０００８】また、アルミニウムを室温程度の低いシリ
コン基板温度でスパッタ蒸着させ、その次に基板の温度
を上げてアルミニウムの流動性を増してリフローさせる
場合においても、本発明の効果は同様である。The effect of the present invention is the same when aluminum is sputter-deposited at a low silicon substrate temperature of about room temperature and then the temperature of the substrate is raised to increase the fluidity of the aluminum for reflow.
【０００９】本発明の第２の実施例を図４，図５により
説明する。図４，図５は製造工程順に示す断面図であ
る。まず、図４のようにシリコン基板１と層間絶縁膜２
により構成された溝３があり、その表面にアルミニウム
に対して濡れ性の良い下地膜４が形成されていた場合、
溝近くの基板上部平面と、溝側壁の上部５を変質させて
濡れ性の悪い膜７にする。例えば、アルミニウムは酸化
膜に対して濡れ性が悪いため、下地膜４の高融点金属を
酸化させて、酸化膜を形成する。ここに、アルミニウム
６を高温でスパッタ蒸着させると、溝の中はアルミニウ
ムで埋め込まれる。A second embodiment of the present invention will be described with reference to FIGS. 4 and 5 are cross-sectional views showing the order of manufacturing steps. First, as shown in FIG. 4, a silicon substrate 1 and an interlayer insulating film 2 are formed.
When the underlying film 4 having good wettability with respect to aluminum is formed on the surface of the groove 3 composed of
The upper surface of the substrate near the groove and the upper portion 5 of the side wall of the groove are altered to form a film 7 having poor wettability. For example, since aluminum has poor wettability with respect to an oxide film, the refractory metal of the base film 4 is oxidized to form an oxide film. When aluminum 6 is sputter-deposited at a high temperature here, the groove is filled with aluminum.
【００１０】本実施例によれば、溝形状を変えることな
く内部にアルミニウムを埋め込むことができ、半導体の
電気特性に与える影響が小さいという効果がある。According to the present embodiment, there is an effect that aluminum can be embedded inside the groove without changing the shape of the groove and the influence on the electrical characteristics of the semiconductor is small.
【００１１】本発明の第３の実施例を図６，図７により
説明する。図６，図７は製造工程順に示す断面図であ
る。まず、図６のようにシリコン基板１と層間絶縁膜２
により構成された溝３があり、その表面にアルミニウム
に対して濡れ性の良い下地膜４が形成されていた場合、
溝近くの基板上部平面と、溝側壁の上部５にアルミニウ
ムに対して濡れ性の悪い膜７、例えば二酸化珪素ＳｉＯ
2 や窒素酸化チタンTiONのような酸化膜を蒸着させる。
ここに、アルミニウム６を高温でスパッタ蒸着させる
と、溝の中はアルミニウムで埋め込まれる。A third embodiment of the present invention will be described with reference to FIGS. 6 and 7 are cross-sectional views showing the order of manufacturing steps. First, as shown in FIG. 6, a silicon substrate 1 and an interlayer insulating film 2 are formed.
When the underlying film 4 having good wettability with respect to aluminum is formed on the surface of the groove 3 composed of
A film 7 having poor wettability with respect to aluminum, for example, silicon dioxide SiO 2 is formed on the upper surface of the substrate near the groove and on the upper portion 5 of the groove side wall.
Evaporate an oxide film such as 2 or Nitrogen Titanium Oxide TiON.
When aluminum 6 is sputter-deposited at a high temperature here, the groove is filled with aluminum.
【００１２】本実施例は、成膜を積み重ねていく方式で
あるため、製造プロセスが複雑になることはなく、製造
コストの増加も少ない。Since the present embodiment is a method of stacking film formations, the manufacturing process does not become complicated and the manufacturing cost does not increase.
【００１３】[0013]
【発明の効果】本発明によれば、溝近くの基板上部の平
面と溝入り口付近を濡れ性の悪い下地膜にし、溝底部の
表面を濡れ性の良い下地膜にすると、スパッタ蒸着され
た金属膜が溝の入り口付近に留まることなく引き込ま
れ、底から順に埋まるために空洞を形成することがな
く、結果として信頼性の高い配線を形成する事ができ
る。それは、アルミニウム多層配線の微細化を推し進め
る事になり、超ＬＳＩの高集積化に寄与する。According to the present invention, when the base film near the groove on the upper surface of the substrate and the vicinity of the groove entrance are formed as a base film having poor wettability and the surface at the bottom of the groove is formed as a base film having good wettability, sputter-deposited metal Since the film is drawn in without remaining near the entrance of the groove and is filled in order from the bottom, a cavity is not formed, and as a result, a highly reliable wiring can be formed. This promotes miniaturization of aluminum multilayer wiring, which contributes to higher integration of VLSI.
【図１】本発明の第一の実施例である下地膜初期の断面
図。FIG. 1 is a cross-sectional view of an initial stage of a base film which is a first embodiment of the present invention.
【図２】本発明の第一の実施例による加工後の下地膜の
断面図。FIG. 2 is a cross-sectional view of a base film after processing according to the first embodiment of the present invention.
【図３】本発明の第一の実施例によるスパッタ工程後の
断面図。FIG. 3 is a sectional view after a sputtering step according to the first embodiment of the present invention.
【図４】本発明の第二の実施例による下地膜の断面図。FIG. 4 is a sectional view of a base film according to a second embodiment of the present invention.
【図５】本発明の第二の実施例によるスパッタ工程後の
断面図。FIG. 5 is a sectional view after a sputtering step according to a second embodiment of the present invention.
【図６】本発明の第三の実施例による下地膜の断面図。FIG. 6 is a sectional view of a base film according to a third embodiment of the present invention.
【図７】本発明の第三の実施例によるスパッタ工程後の
断面図。FIG. 7 is a cross-sectional view after a sputtering process according to the third embodiment of the present invention.
【図８】従来のスパッタ工程後の断面図。FIG. 8 is a cross-sectional view after a conventional sputtering process.
１…シリコン基板、２…層間絶縁膜、３…溝、４…アル
ミニウムに対して濡れ性の良い下地膜、５…溝側壁の上
部、６…アルミニウム配線、７…アルミニウムに対して
濡れ性の悪い下地膜。DESCRIPTION OF SYMBOLS 1 ... Silicon substrate, 2 ... Interlayer insulating film, 3 ... Trench, 4 ... Base film having good wettability to aluminum, 5 ... Top of sidewall of trench, 6 ... Aluminum wiring, 7 ... Poor wettability to aluminum Base film.
───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.6 識別記号 庁内整理番号 ＦＩ 技術表示箇所 Ｈ０１Ｌ 21/768 Ｈ０１Ｌ 21/90 Ｃ (72)発明者 根津 広樹 東京都青梅市今井2326番地 株式会社日立 製作所デバイス開発センタ内─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. 6 Identification number Internal reference number FI Technical indication location H01L 21/768 H01L 21/90 C (72) Inventor Hiroki Nezu 2326 Imai, Ome, Tokyo Hitachi Device Development Center
Claims (4)
着により膜を形成する方法において、上記膜に対し濡れ
性の良い材質の下地膜を形成し、その後、エッチングに
より溝近くの上記基板上部の平面と溝入り口付近のみ下
地膜を削り落としてから、膜を蒸着することを特徴とす
る半導体装置の成膜方法。1. A method for forming a film by sputtering deposition on a semiconductor substrate having minute grooves, wherein a base film made of a material having good wettability with respect to the film is formed, and then the upper portion of the substrate near the groove is etched. The method for depositing a semiconductor device, wherein the underlying film is scraped off only on the plane and the vicinity of the groove entrance, and then the film is vapor-deposited.
着により膜を形成する方法において、上記膜に対し濡れ
性の良い材質の下地膜を形成し、その後、溝近くの上記
基板上部の平面と溝入り口付近のみ下地膜を濡れ性の悪
い材質に変質させてから、膜を蒸着することを特徴とす
る半導体装置の成膜方法。2. A method of forming a film on a semiconductor substrate having a minute groove by sputter deposition, wherein a base film made of a material having good wettability with respect to the film is formed, and then a flat surface of the upper portion of the substrate near the groove. And a film forming method for a semiconductor device, characterized in that only the vicinity of the groove entrance is transformed into a material having poor wettability, and then the film is vapor-deposited.
着により膜を形成する方法において、上記膜に対し濡れ
性の良い材質の下地膜を形成し、その後、溝近くの上記
基板上部の平面と溝入り口付近にのみ濡れ性の悪い材質
の膜を覆いかぶせてから、膜を蒸着することを特徴とす
る半導体装置の成膜方法。3. A method of forming a film by sputtering deposition on a semiconductor substrate having a minute groove, wherein a base film made of a material having good wettability with respect to the film is formed, and then a flat surface of the upper portion of the substrate near the groove. And a film forming method for a semiconductor device, wherein a film made of a material having poor wettability is covered only around the groove entrance, and then the film is vapor-deposited.
着により膜を形成する方法において、溝中の底部にの
み、上記膜に対し濡れ性の良い材質の下地膜を形成した
半導体装置の成膜形状。4. A method for forming a film on a semiconductor substrate having minute grooves by sputtering deposition, which comprises forming a base film made of a material having good wettability with respect to the film only on the bottom of the groove. Membrane shape.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP31389495A JPH09153470A (en) | 1995-12-01 | 1995-12-01 | Film deposition for semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP31389495A JPH09153470A (en) | 1995-12-01 | 1995-12-01 | Film deposition for semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH09153470A true JPH09153470A (en) | 1997-06-10 |
Family
ID=18046799
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP31389495A Pending JPH09153470A (en) | 1995-12-01 | 1995-12-01 | Film deposition for semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH09153470A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006060235A (en) * | 2004-08-20 | 2006-03-02 | Samsung Electronics Co Ltd | Method of forming via structure and method of fabricating phase change memory element merged of such via structures |
| CN103579098A (en) * | 2012-07-30 | 2014-02-12 | 格罗方德半导体公司 | Method for reducing wettability of interconnect material at corner interface and device incorporating same |
-
1995
- 1995-12-01 JP JP31389495A patent/JPH09153470A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006060235A (en) * | 2004-08-20 | 2006-03-02 | Samsung Electronics Co Ltd | Method of forming via structure and method of fabricating phase change memory element merged of such via structures |
| CN103579098A (en) * | 2012-07-30 | 2014-02-12 | 格罗方德半导体公司 | Method for reducing wettability of interconnect material at corner interface and device incorporating same |
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