JPH09148174A - Structure of laminated ceramic capacitor - Google Patents
Structure of laminated ceramic capacitorInfo
- Publication number
- JPH09148174A JPH09148174A JP7305495A JP30549595A JPH09148174A JP H09148174 A JPH09148174 A JP H09148174A JP 7305495 A JP7305495 A JP 7305495A JP 30549595 A JP30549595 A JP 30549595A JP H09148174 A JPH09148174 A JP H09148174A
- Authority
- JP
- Japan
- Prior art keywords
- chip body
- ceramic capacitor
- ceramic sheet
- ceramic
- terminal electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/002—Details
- H01G4/228—Terminals
- H01G4/232—Terminals electrically connecting two or more layers of a stacked or rolled capacitor
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は、内部電極を備えた
セラミックシートの複数枚を積層して成る積層セラミッ
クコンデンサの構造に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to the structure of a laminated ceramic capacitor formed by laminating a plurality of ceramic sheets having internal electrodes.
【0002】[0002]
【従来の技術】従来、この種の積層セラミックコンデン
サは、例えば、特開平1−312817号公報等に記載
され、且つ、図5〜図8に示すように、長さ寸法Lを幅
寸法Wの約2倍程度に大きい長方形に形成したセラミッ
クシート1の表面に、内部電極2を、当該内部電極2が
セラミックシート1における四辺1a,1b,1c,1
dのうち一つの短辺1cにまで延びるように形成し、こ
のセラミックシート1の複数枚を、その一つの短辺1c
が交互に逆向きとなるように積層することにより、長さ
寸法がLで、幅寸法がWで、高さ寸法がHのチップ体3
に一体化したのち、このチップ体3における長手方向の
両端における両端面3a,3bの各々に、接続用の端子
電極膜4,5を、内部電極2に電気的に導通するように
形成すると言う構成にしている。2. Description of the Related Art Conventionally, this type of monolithic ceramic capacitor is disclosed in, for example, Japanese Patent Laid-Open No. 1-312817, and, as shown in FIGS. An internal electrode 2 is formed on the surface of a rectangular ceramic sheet 1 which is approximately twice as large, and the internal electrode 2 has four sides 1a, 1b, 1c, 1 in the ceramic sheet 1.
It is formed so as to extend to one short side 1c of d, and a plurality of this ceramic sheet 1 is formed into one short side 1c.
Are stacked in such a manner that they are alternately arranged in opposite directions, so that a chip body 3 having a length dimension L, a width dimension W, and a height dimension H
It is said that the terminal electrode films 4 and 5 for connection are formed on each of both end faces 3a and 3b at both ends in the longitudinal direction of the chip body 3 so as to be electrically connected to the internal electrode 2 after being integrated with each other. It is configured.
【0003】すなわち、従来における積層セラミックコ
ンデンサは、長さ寸法Lを幅寸法Wの約二倍にしたチッ
プ体3の内部に、内部電極2をチップ体3の長手方向に
延びるように形成する一方、前記チップ体3における長
手方向の両端面3a,3bに、前記各内部電極2に対す
る端子電極膜4,5を形成した構成にしている。That is, in the conventional monolithic ceramic capacitor, the internal electrode 2 is formed inside the chip body 3 having the length L approximately twice the width W so as to extend in the longitudinal direction of the chip body 3. The terminal electrode films 4 and 5 for the internal electrodes 2 are formed on both end surfaces 3a and 3b of the chip body 3 in the longitudinal direction.
【0004】[0004]
【発明が解決しようとする課題】しかし、積層セラミッ
クコンデンサを、従来のように、長さ寸法Lを幅寸法W
の約二倍にしたチップ体3の内部に、内部電極2をチッ
プ体3の長手方向に延びるように形成する一方、前記チ
ップ体3における長手方向の両端面3a,3bに、前記
各内部電極2に対する端子電極膜4,5を形成すると言
う構成にした場合には、内部電極2が、一方の端子電極
膜4から他方の端子電極膜5に向かって細長く延びる形
態になると共に、この各内部電極2における一方の端子
電極膜4から他方の端子電極膜5に向かう方向に沿って
の重なり長さが長いことにより、各内部電極2の相互間
にインダクタンス成分が大きくなるから、以下に述べる
ように、高周波域におけるインダクタンス及びインピー
ダンスが大きくなり、高周波域において低いインダクタ
ンス又はインピーダンスが要求される箇所には使用する
ことができないと言う問題があった。However, in the conventional monolithic ceramic capacitor, the length dimension L is changed to the width dimension W as in the conventional case.
The internal electrodes 2 are formed in the inside of the chip body 3 that is approximately double the length of the chip body 3 so as to extend in the longitudinal direction of the chip body 3, and the internal electrodes are formed on both end surfaces 3a and 3b in the longitudinal direction of the chip body 3. In the case where the terminal electrode films 4 and 5 for 2 are formed, the internal electrode 2 is elongated from one terminal electrode film 4 toward the other terminal electrode film 5 and each internal electrode 2 is formed. Since the overlapping length of the electrode 2 along the direction from the one terminal electrode film 4 to the other terminal electrode film 5 is long, the inductance component increases between the internal electrodes 2 as described below. In addition, the inductance and impedance in the high frequency range become large, and it cannot be used in locations where low inductance or impedance is required in the high frequency range. There was a cormorant problem.
【0005】本発明は、高周波域における低インダクタ
ンス及び低インピーダンス化を図るようにした積層セラ
ミックコンデンサの構造を提供することを技術的課題と
するものである。An object of the present invention is to provide a structure of a monolithic ceramic capacitor which has a low inductance and a low impedance in a high frequency range.
【0006】[0006]
【課題を解決するための手段】この技術的課題を達成す
るため本発明は、「長さ寸法が幅寸法よりも大きい長方
形に形成したセラミックシートの表面に、内部電極を、
当該内部電極がセラミックシートにおける四辺のうち一
つの長辺にまで延びるように形成し、このセラミックシ
ートの複数枚を、前記一つの長辺が交互に逆向きとなる
ように積層してチップ体に一体化し、このチップ体にお
ける長手方向に沿って左右両側の両側面の各々に、前記
各内部電極に対する接続用の端子電極膜を形成する。」
と言う構成にした。In order to achieve this technical object, the present invention provides: "Internal electrodes are formed on the surface of a rectangular ceramic sheet whose length dimension is larger than its width dimension.
The internal electrodes are formed so as to extend to one long side of the four sides of the ceramic sheet, and a plurality of the ceramic sheets are laminated so that the one long sides are alternately opposite to each other to form a chip body. The chip body is integrated, and terminal electrode films for connection to the internal electrodes are formed on both left and right side surfaces along the longitudinal direction of the chip body. "
It was configured to say.
【0007】[0007]
【発明の実施の形態】以下、本発明の実施の形態を、図
1〜図4の図面について説明する。この図において、符
号11は、長さ寸法Lを幅寸法Wの約二倍の長方形に形
成したセラミックシートを示し、このセラミックシート
11の表面に、内部電極12を、当該内部電極12がセ
ラミックシート11における四辺11a,11b,11
c,11dのうち一つの長辺11aにまで延びるように
形成し、このセラミックシート11の複数枚を、前記一
つの長辺11aが交互に逆向きとなるように積層するこ
とにより、長さ寸法がLで、幅寸法がWで、高さ寸法が
Hのチップ体13に一体化したのち、このチップ体13
における長手方向に沿って左右両側の両側面13a,1
3bの各々に、接続用の端子電極膜14,14を、前記
各内部電極12に電気的に導通するように形成すると言
う構成にする。DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described below with reference to FIGS. In this figure, reference numeral 11 denotes a ceramic sheet in which a length dimension L is formed into a rectangle approximately twice the width dimension W. An internal electrode 12 is provided on the surface of the ceramic sheet 11, and the internal electrode 12 is a ceramic sheet. Four sides 11a, 11b, 11 in 11
It is formed so as to extend up to one long side 11a of c and 11d, and a plurality of ceramic sheets 11 are laminated so that the one long side 11a is alternately turned in the opposite direction. Is L, the width dimension is W, and the height dimension is H.
13a, 1 on both left and right sides along the longitudinal direction of
The terminal electrode films 14 and 14 for connection are formed on each of 3b so as to be electrically connected to the internal electrodes 12.
【0008】このように構成することにより、各内部電
極12の相互間における重なり面積を、前記従来と同じ
にした状態のもとで、各内部電極12における一方の端
子電極膜14から他方の端子電極膜15に向かう方向の
長さが短くなり、ひいては、この各内部電極2における
一方の端子電極膜4から他方の端子電極膜5に向かう方
向に沿っての重なり長さが大幅に短くなるから、各内部
電極12の相互間に発生するインダクタンス成分を小さ
くすることができるのである。With this configuration, under the condition that the overlapping area between the internal electrodes 12 is the same as the conventional one, the internal electrode 12 has one terminal electrode film 14 to the other terminal. The length in the direction toward the electrode film 15 is shortened, and by extension, the overlapping length along the direction from the one terminal electrode film 4 to the other terminal electrode film 5 in each internal electrode 2 is significantly shortened. The inductance component generated between the internal electrodes 12 can be reduced.
【0009】次に、本発明者は、長さ寸法Lを3.2m
mに、幅寸法Wを1.6mmに、高さ寸法Hを0.7m
mにし、且つ、静電容量を1.5pFにした従来構造の
積層セラミックコンデンサと、長さ寸法Lを3.2mm
に、幅寸法Wを1.6mmに、高さ寸法Hを0.7mm
にし、且つ、静電容量を1.5pFにした本発明構造の
積層セラミックコンデンサとについて、定格50Vの電
圧を印加して、そのインダクタンス及びインピーダンス
を測定する実験を行ったところ、図8及び図9の結果を
得た。Next, the inventors of the present invention set the length dimension L to 3.2 m.
m, width dimension W to 1.6 mm, height dimension H to 0.7 m
m and the capacitance of 1.5 pF and the conventional structure of the monolithic ceramic capacitor, and the length dimension L is 3.2 mm.
The width dimension W is 1.6 mm and the height dimension H is 0.7 mm.
And a multilayer ceramic capacitor having a capacitance of 1.5 pF and a structure of the present invention was applied with a voltage of rated 50 V to measure its inductance and impedance. Got the result.
【0010】すなわち、従来の積層セラミックコンデン
サは、点線曲線の通りであったのに対し、本発明の積層
セラミックコンデンサは、実線曲線の通りで、積層セラ
ミックコンデンサを、前記した本発明の構造のように構
成することにより、外形寸法及び静電容量を同じにした
状態のもとで、高周波域におけるインダクタンス及びイ
ンピーダンスを、従来の構造のものよりも大幅に低減で
きるのであった。That is, while the conventional monolithic ceramic capacitor has a dotted line curve, the monolithic ceramic capacitor of the present invention has a solid line curve, and the monolithic ceramic capacitor has the above-described structure of the present invention. With this configuration, the inductance and impedance in the high frequency range can be significantly reduced as compared with the conventional structure under the condition that the external dimensions and the capacitance are the same.
【0011】[0011]
【発明の作用・効果】このように、本発明によると、積
層セラミックコンデンサの外形寸法及び静電容量を変更
することなく、高周波域における低インダクタンス化及
び低インピーダンス化を確実に達成することができるか
ら、積層セラミックコンデンサの適用範囲を、高周波域
において低いインダクタンス又はインピーダンスが要求
される場合にまで拡張できる効果を有する。As described above, according to the present invention, it is possible to surely achieve low inductance and low impedance in the high frequency range without changing the outer dimensions and the electrostatic capacitance of the multilayer ceramic capacitor. Therefore, there is an effect that the applicable range of the monolithic ceramic capacitor can be expanded to a case where low inductance or impedance is required in a high frequency range.
【図1】本発明の実施形態による積層セラミックコンデ
ンサの分解斜視図である。FIG. 1 is an exploded perspective view of a monolithic ceramic capacitor according to an embodiment of the present invention.
【図2】本発明の実施形態による積層セラミックコンデ
ンサの一部切欠斜視図である。FIG. 2 is a partially cutaway perspective view of a monolithic ceramic capacitor according to an embodiment of the present invention.
【図3】図2のIII −III 視断面図である。FIG. 3 is a sectional view taken along line III-III of FIG. 2;
【図4】図2のIV−IV視断面図である。FIG. 4 is a sectional view taken along line IV-IV of FIG. 2;
【図5】従来における積層セラミックコンデンサの分解
斜視図である。FIG. 5 is an exploded perspective view of a conventional monolithic ceramic capacitor.
【図6】従来における積層セラミックコンデンサの一部
切欠斜視図である。FIG. 6 is a partially cutaway perspective view of a conventional monolithic ceramic capacitor.
【図7】図2のVII −VII 視断面図である。7 is a sectional view taken along line VII-VII of FIG.
【図8】図2のVIII−VIII視断面図である。8 is a sectional view taken along line VIII-VIII of FIG.
【図9】インダクタンスの測定結果を示す図である。FIG. 9 is a diagram showing measurement results of inductance.
【図10】インピーダンスの測定結果を示す図である。FIG. 10 is a diagram showing measurement results of impedance.
11 セラミックシート 11a セラミックシートの一つの長
辺 12 内部電極 13 チップ体 13a,13b チップ体の側面 14,15 端子電極膜11 Ceramic Sheet 11a One Long Side of Ceramic Sheet 12 Internal Electrode 13 Chip Body 13a, 13b Side Surface of Chip Body 14, 15 Terminal Electrode Film
Claims (1)
成したセラミックシートの表面に、内部電極を、当該内
部電極がセラミックシートにおける四辺のうち一つの長
辺にまで延びるように形成し、このセラミックシートの
複数枚を、前記一つの長辺が交互に逆向きとなるように
積層してチップ体に一体化し、このチップ体における長
手方向に沿って左右両側の両側面の各々に、前記各内部
電極に対する接続用の端子電極膜を形成したことを特徴
とする積層セラミックコンデンサの構造。1. An internal electrode is formed on a surface of a rectangular ceramic sheet having a length dimension larger than a width dimension, so that the internal electrode extends to one long side of four sides of the ceramic sheet. A plurality of the ceramic sheets are laminated so that the one long side is alternately opposite to each other and integrated into a chip body, and on each of both left and right side surfaces along the longitudinal direction of the chip body, A structure of a monolithic ceramic capacitor in which a terminal electrode film for connection to each internal electrode is formed.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7305495A JPH09148174A (en) | 1995-11-24 | 1995-11-24 | Structure of laminated ceramic capacitor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7305495A JPH09148174A (en) | 1995-11-24 | 1995-11-24 | Structure of laminated ceramic capacitor |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH09148174A true JPH09148174A (en) | 1997-06-06 |
Family
ID=17945858
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7305495A Pending JPH09148174A (en) | 1995-11-24 | 1995-11-24 | Structure of laminated ceramic capacitor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH09148174A (en) |
Cited By (26)
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---|---|---|---|---|
EP1022751A2 (en) | 1998-12-28 | 2000-07-26 | Murata Manufacturing Co., Ltd. | Monolithic ceramic electronic component |
EP1024507A1 (en) * | 1999-01-29 | 2000-08-02 | Murata Manufacturing Co., Ltd. | Ceramic electronic part |
US6292351B1 (en) | 1999-11-17 | 2001-09-18 | Tdk Corporation | Multilayer ceramic capacitor for three-dimensional mounting |
EP1220246A1 (en) * | 2000-12-28 | 2002-07-03 | TDK Corporation | Multilayer ceramic capacitor for three-dimensional mounting |
JP2006173270A (en) * | 2004-12-14 | 2006-06-29 | Tdk Corp | Chip type electronic component |
US7369395B2 (en) | 2005-03-31 | 2008-05-06 | Tdk Corporation | Multilayer capacitor |
US7420795B2 (en) | 2006-09-28 | 2008-09-02 | Tdk Corporation | Multilayer capacitor |
US7457099B2 (en) | 2007-01-23 | 2008-11-25 | Tdk Corporation | Multilayer capacitor |
JP2009033101A (en) * | 2007-06-27 | 2009-02-12 | Murata Mfg Co Ltd | Monolithic ceramic capacitor |
US7495885B2 (en) | 2007-01-30 | 2009-02-24 | Tdi Corporation | Multilayer capacitor |
JP2009170873A (en) * | 2007-12-17 | 2009-07-30 | Murata Mfg Co Ltd | Multilayer capacitor |
US7663862B2 (en) | 2006-05-24 | 2010-02-16 | Tdk Corporation | Multilayer capacitor |
US7706123B2 (en) | 2007-02-02 | 2010-04-27 | Tdk Corporation | Multilayer capacitor |
US7808770B2 (en) | 2007-06-27 | 2010-10-05 | Murata Manufacturing Co., Ltd. | Monolithic ceramic capacitor |
US7995325B2 (en) | 2007-08-23 | 2011-08-09 | Tdk Corporation | Multilayer capacitor |
US8031460B2 (en) | 2008-02-14 | 2011-10-04 | Tdk Corporation | Multilayer capacitor |
US8315033B2 (en) | 2008-11-26 | 2012-11-20 | Murata Manufacturing Co., Ltd. | Multilayer capacitor having low ESL and easily controllable ESR |
US8649156B2 (en) | 2007-12-17 | 2014-02-11 | Murata Manufacturing Co., Ltd. | Multilayer capacitor having low equivalent series inductance and controlled equivalent series resistance |
US20140185184A1 (en) * | 2013-01-02 | 2014-07-03 | Samsung Electro-Mechanics Co., Ltd. | Multilayer ceramic capacitor and mounting board therefor |
JP2015516112A (en) * | 2012-05-08 | 2015-06-04 | エプコス アクチエンゲゼルシャフトEpcos Ag | Ceramic multilayer capacitor |
JP2016136561A (en) * | 2015-01-23 | 2016-07-28 | Tdk株式会社 | Multilayer capacitor |
JP2017195392A (en) * | 2013-07-11 | 2017-10-26 | サムソン エレクトロ−メカニックス カンパニーリミテッド. | Multilayer ceramic capacitor |
US20180137982A1 (en) * | 2016-11-15 | 2018-05-17 | Murata Manufacturing Co., Ltd. | Multilayer ceramic electronic component |
JP2018207119A (en) * | 2013-03-07 | 2018-12-27 | エプコス アクチエンゲゼルシャフトEpcos Ag | Capacitor structure |
US20190066925A1 (en) * | 2017-08-31 | 2019-02-28 | Tdk Corporation | Electronic component |
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-
1995
- 1995-11-24 JP JP7305495A patent/JPH09148174A/en active Pending
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US6473292B1 (en) | 1998-12-28 | 2002-10-29 | Murata Manufacturing Co., Ltd. | Monolithic ceramic electronic component |
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EP1022751A2 (en) | 1998-12-28 | 2000-07-26 | Murata Manufacturing Co., Ltd. | Monolithic ceramic electronic component |
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US6518632B1 (en) | 1999-01-29 | 2003-02-11 | Murata Manufacturing Co., Ltd. | Ceramic electronic part |
US6292351B1 (en) | 1999-11-17 | 2001-09-18 | Tdk Corporation | Multilayer ceramic capacitor for three-dimensional mounting |
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EP1605477A1 (en) * | 2000-12-28 | 2005-12-14 | TDK Corporation | Multilayer ceramic capacitor for three-dimensional mounting |
EP1605478A2 (en) * | 2000-12-28 | 2005-12-14 | TDK Corporation | Multilayer ceramic capacitor for three-dimensional mounting |
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JP2006173270A (en) * | 2004-12-14 | 2006-06-29 | Tdk Corp | Chip type electronic component |
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US7369395B2 (en) | 2005-03-31 | 2008-05-06 | Tdk Corporation | Multilayer capacitor |
US7663862B2 (en) | 2006-05-24 | 2010-02-16 | Tdk Corporation | Multilayer capacitor |
US7420795B2 (en) | 2006-09-28 | 2008-09-02 | Tdk Corporation | Multilayer capacitor |
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US7457099B2 (en) | 2007-01-23 | 2008-11-25 | Tdk Corporation | Multilayer capacitor |
US7495885B2 (en) | 2007-01-30 | 2009-02-24 | Tdi Corporation | Multilayer capacitor |
US7706123B2 (en) | 2007-02-02 | 2010-04-27 | Tdk Corporation | Multilayer capacitor |
JP2009033101A (en) * | 2007-06-27 | 2009-02-12 | Murata Mfg Co Ltd | Monolithic ceramic capacitor |
US7808770B2 (en) | 2007-06-27 | 2010-10-05 | Murata Manufacturing Co., Ltd. | Monolithic ceramic capacitor |
JP4591530B2 (en) * | 2007-06-27 | 2010-12-01 | 株式会社村田製作所 | Multilayer ceramic capacitor |
US7995325B2 (en) | 2007-08-23 | 2011-08-09 | Tdk Corporation | Multilayer capacitor |
US8649156B2 (en) | 2007-12-17 | 2014-02-11 | Murata Manufacturing Co., Ltd. | Multilayer capacitor having low equivalent series inductance and controlled equivalent series resistance |
JP2009170873A (en) * | 2007-12-17 | 2009-07-30 | Murata Mfg Co Ltd | Multilayer capacitor |
US8031460B2 (en) | 2008-02-14 | 2011-10-04 | Tdk Corporation | Multilayer capacitor |
US8315033B2 (en) | 2008-11-26 | 2012-11-20 | Murata Manufacturing Co., Ltd. | Multilayer capacitor having low ESL and easily controllable ESR |
JP2015516112A (en) * | 2012-05-08 | 2015-06-04 | エプコス アクチエンゲゼルシャフトEpcos Ag | Ceramic multilayer capacitor |
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