JPH04105311A - Multilayered capacitor - Google Patents
Multilayered capacitorInfo
- Publication number
- JPH04105311A JPH04105311A JP2223057A JP22305790A JPH04105311A JP H04105311 A JPH04105311 A JP H04105311A JP 2223057 A JP2223057 A JP 2223057A JP 22305790 A JP22305790 A JP 22305790A JP H04105311 A JPH04105311 A JP H04105311A
- Authority
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- Prior art keywords
- capacitor
- multilayered
- multilayer capacitor
- parts
- capacitor parts
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000003990 capacitor Substances 0.000 title claims abstract description 130
- 238000003475 lamination Methods 0.000 claims abstract 5
- 230000008878 coupling Effects 0.000 abstract description 7
- 238000010168 coupling process Methods 0.000 abstract description 7
- 238000005859 coupling reaction Methods 0.000 abstract description 7
- 230000000694 effects Effects 0.000 abstract description 3
- 238000000034 method Methods 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 8
- 239000003989 dielectric material Substances 0.000 description 3
- 230000012447 hatching Effects 0.000 description 3
- 238000010030 laminating Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 1
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- Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
Abstract
Description
【発明の詳細な説明】
産業上■五■圀団
本発明は、対向するコンデンサ電極間でコンデンサ容量
を形成する積層コンデンサに関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a multilayer capacitor that forms a capacitance between opposing capacitor electrodes.
炙来■肢止
従来の積層コンデンサとして、第６図に示す構成のもの
が知られている。このコンデンサは、例えば誘電率の低
い誘電体などからなるシート５１が８枚積層され、各シ
ート５１間の境界面の５箇所に、第７図に破線で示すコ
ンデンサ電極５２と、同図に一点鎖線で示すコンデンサ
電極５３とが、交互に形成されており、このようになし
た積層体の側面の２箇所に形成した外部電極５４．５４
を介して、コンデンサ電極５２と５３に導電が行われる
ように構成されている。この場合、積層方向に隣合う各
コンデンサ電極間で夫々コンデンサ容量Ｃが形成されて
いるが、２つの外部電極５４゜５４間においては、１つ
に合成されたコンデンサ容量として見做すことができる
。よって、かかる積層コンデンサの等価回路は、第８図
に示される如く、コンデンサＣの両側に、第６図のよう
に外部電極５４に接続させるために形成してあり、コン
デンサ容量として寄与しないコンデンサ電極部分５２ａ
、５３ａにて生しる等価直列抵抗ＲとインダクタＬが、
直列接続された状態となる。As a conventional multilayer capacitor, one having the structure shown in FIG. 6 is known. This capacitor is constructed by laminating eight sheets 51 made of, for example, a dielectric material with a low permittivity, and capacitor electrodes 52 shown in broken lines in FIG. Capacitor electrodes 53 indicated by chain lines are alternately formed, and external electrodes 54 and 54 are formed at two locations on the side surface of the thus formed laminate.
The capacitor electrodes 52 and 53 are electrically conductive through the capacitor electrodes 52 and 53. In this case, a capacitor capacitance C is formed between each capacitor electrode adjacent to each other in the stacking direction, but between the two external electrodes 54 and 54, it can be regarded as one combined capacitor capacitance. . Therefore, the equivalent circuit of such a multilayer capacitor, as shown in FIG. 8, is formed on both sides of the capacitor C to be connected to the external electrode 54 as shown in FIG. 6, and the capacitor electrodes that do not contribute to the capacitance are Part 52a
, 53a, the equivalent series resistance R and the inductor L are
They are connected in series.
＜７′ しよ゛ るｉ
ところで、上述した積層コンデンサのインピーダンス−
周波数特性は、一般に、第９図に示す如く１つの共振点
Ａをもつようになる。したがって、従来の積層コンデン
サを用いてノイズをバイパスさせる回路を作成した場合
、従来品では共振点Ａが生じる周波数ｒ。近傍でのみ低
インピーダンスとなり、その周波数帯のノイズしかバイ
パスさせることができないという不都合がある。<7' By the way, the impedance of the multilayer capacitor mentioned above -
The frequency characteristics generally have one resonance point A as shown in FIG. Therefore, when creating a circuit that bypasses noise using a conventional multilayer capacitor, the frequency r at which resonance point A occurs in the conventional product. There is a disadvantage that the impedance is low only in the vicinity, and only noise in that frequency band can be bypassed.
そこで、本発明は低インピーダンスとなる周波数領域を
広げることができ、その結果として高周波ノイズのバイ
パス効果を向上させ得る積層コンデンサを提供すること
を目的とする。SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a multilayer capacitor that can widen the frequency range in which the impedance is low and, as a result, improve the high-frequency noise bypass effect.
ｉ ° るための
本発明に係る積層コンデンサは、容量を異ならせた２以
上の積層コンデンサ部が、積層コンデンサ部の積層方向
と同一方向に積層され、かつ、積層方向に隣合う積層コ
ンデンサ部の間に非コンデンサ部が設けられ、各積層コ
ンデンサ部が外部電極で結合されていることを特徴とす
る。In the multilayer capacitor according to the present invention, two or more multilayer capacitor parts having different capacities are stacked in the same direction as the stacking direction of the multilayer capacitor parts, and the multilayer capacitor parts adjacent to each other in the stacking direction are It is characterized in that a non-capacitor part is provided in between, and each multilayer capacitor part is coupled by an external electrode.
昨−Ｕ
本発明にあっては、積層方向に隣合う積層コンデンサ部
の間にインダクタ成分として働く非コンデンサ部が設け
られているので、隣合う積層コンデンサ部間の静電結合
が小さくなる。また、その状態で各積層コンデンサ部が
外部電極で結合されており、しかも積層コンデンサ部が
容量を異ならせであるので、各積層コンデンサ部にて形
成される共振点の周波数がずれることとなる。In the present invention, since the non-capacitor portion that acts as an inductor component is provided between the laminated capacitor portions adjacent in the stacking direction, the electrostatic coupling between the adjacent laminated capacitor portions is reduced. Further, in this state, each multilayer capacitor section is coupled by an external electrode, and since the multilayer capacitor sections have different capacitances, the frequencies of the resonance points formed in each multilayer capacitor section will be shifted.
夫−一施−−炎
第１図は本発明に係る積層コンデンサを示す継断面図で
ある。このコンデンサは、３つの積層コンデンサ部１，
２．３と、積層コンデンサ部１２の間及び積層コンデン
サ部２．３の間に夫々設けた非コンデンサ部４，５と、
積層コンデンサ部１及び積層コンデンサ部３の外側に設
けた保護部６７とを有する。FIG. 1 is a cross-sectional view showing a multilayer capacitor according to the present invention. This capacitor consists of three multilayer capacitor parts 1,
2.3, and non-capacitor parts 4 and 5 provided between the multilayer capacitor part 12 and the multilayer capacitor part 2.3, respectively;
It has a multilayer capacitor section 1 and a protection section 67 provided on the outside of the multilayer capacitor section 3.
積層コンデンサ部１は、第２図に示すように、比較的誘
電率の低い誘電体などからなるシート１０の片面にＴ字
状をしたコンデンサ電極１１ （−点鎖線）を形成した
シート１２と、同一のシート１０の片面に、上記シート
１２とは逆向きのＴ字状をしたコンデンサ電極１３（破
線）を形成したシート１４とを、各コンデンサ電極１１
．１３を上にして積層した構成である。コンデンサ電極
１１と１３とは、第２図にハツチングにて示す部分で対
向させてあり、その対向部分でコンデンサ容量が形成さ
れる。なお、コンデンサ電極１１及び１３の２つの端部
１１ａ、ｌｌｂ及び１３ａ、１３ｂは、夫々のシート１
０の端面とほぼ面一に形成している。これら端部１１ａ
等以外の端部は、シート１０の端面よりも内側に配しで
ある。As shown in FIG. 2, the multilayer capacitor section 1 includes a sheet 12 having a T-shaped capacitor electrode 11 (-dashed line) formed on one side of a sheet 10 made of a dielectric material having a relatively low dielectric constant, and A sheet 14 having a T-shaped capacitor electrode 13 (broken line) formed in the opposite direction to the sheet 12 on one side of the same sheet 10 is attached to each capacitor electrode 11.
．． It has a laminated structure with No. 13 facing upward. The capacitor electrodes 11 and 13 are opposed to each other at a portion indicated by hatching in FIG. 2, and a capacitor capacitance is formed at the opposing portion. Note that the two ends 11a, llb and 13a, 13b of the capacitor electrodes 11 and 13 are connected to the respective sheets 1.
It is formed almost flush with the end face of 0. These ends 11a
The other end portions are arranged inside the end surface of the sheet 10.
積層コンデンサｓ２は、前記シート１２と同一のシート
２１，２３．２５と、前記シート１４と同一のシート２
２．２４とを、コンデンサ電極１１１３を上側にした状
態で各シー）２１，２２゜２３．２４．２５を、この順
に上側から下側に向けて積層した構成である。この場合
も、３つのコンデンサ電極１１と、２つのコンデンサ電
極１３とは、第２図にハツチングにて示す部分で対向さ
せてあり、その対向部分でコンデンサ容量が形成される
。The multilayer capacitor s2 includes sheets 21, 23, 25, which are the same as the sheet 12, and a sheet 2, which is the same as the sheet 14.
2, 24, 21, 22, 23, 24, and 25 are stacked in this order from the top to the bottom with the capacitor electrode 1113 facing upward. In this case as well, the three capacitor electrodes 11 and the two capacitor electrodes 13 are opposed to each other at the hatched portions in FIG. 2, and a capacitor capacitance is formed at the opposing portions.
積層コンデンサ部３は、前記シート１２と同一のシート
３１．３３と、前記シート１４と同一のシート３２とを
、コンデンサ電極１１．１３を上側にして各ソート３１
．３２．３３を、この順に上側から下側に向けて積層し
た構成である。この場合モ、２つのコンデンサ電極１１
と、１つのコンデンサ電極１３とは、第２図にハツチン
グにて示す部分で対向させてあり、その対向部分でコン
デンサ容量が形成される。The multilayer capacitor section 3 includes a sheet 31.33 that is the same as the sheet 12, and a sheet 32 that is the same as the sheet 14, with the capacitor electrode 11.13 on the upper side of each sort 31.
．． 32 and 33 are stacked in this order from the top to the bottom. In this case, two capacitor electrodes 11
and one capacitor electrode 13 are opposed to each other at a portion shown by hatching in FIG. 2, and a capacitor capacitance is formed at the opposing portion.
前記非コンデンサ部４．５は、夫々コンデンサ電極の形
成のない前記シート１０を複数積層したものであり、積
層枚数はこの図示例においては、例えば非コンデンサ部
４では４枚、非コンデンサ部５では３枚としている。ま
た、創外側の保護部６．７も、夫々コンデンサ電極の形
成のない前記シート１０を複数枚積層したものからなり
、積層枚数はこの図示例においては、保護部６では３枚
、保護部７では２枚としている。The non-capacitor section 4.5 is made by laminating a plurality of sheets 10 each having no capacitor electrode formed thereon. In this illustrated example, the number of laminated sheets is, for example, four for the non-capacitor section 4 and four for the non-capacitor section 5. There are 3 pieces. Further, the protection part 6.7 on the outside of the wound is also made of a plurality of laminated sheets 10 each having no capacitor electrode formed thereon, and in this illustrated example, the number of laminated sheets is three in the protection part 6 and So let's say there are two.
このように各部が構成された積層体の対向する２側面と
その近傍には、外部電極４１．４２が形成されている。External electrodes 41 and 42 are formed on two opposing sides of the laminate having each part configured in this manner and in the vicinity thereof.
この外部電極４１．４２は、Ｔ字状をしたコンデンサ電
極１１及び１３の夫々２つの端部１１ａ、ｌｌｂ、１３
ａ、１３ｂが、積層体の側面に露出している箇所をも覆
うように回り込ませてあり、外部電極４１は端部１１ａ
、１１ｂと接続され、外部電極４２は端部１３ａ、１３
ｂと接続されている。よって、この外部電極４１゜４２
を介して、各積層コンデンサ部１，２．３が結合される
。また、このような結合状態にあるとき、積層コンデン
サ部１と２の間は、非コンデンサ部４にて離隔され磁気
的な影響を相互に受けに＜＜シであるので、静電結合が
起こりにくい。積層コンデンサ部２と３の間においても
、非コンデンサ部５にて離隔されていて、静電結合が起
こりにくい。即ち、積層コンデンサ部１，２．３は、相
互に静電結合が生じにくく、並列接続された状態となる
。なお、非コンデンサ部４，５の厚みは、上述した静電
結合の抑制を考慮すると、可及的に厚い方が好ましい。These external electrodes 41, 42 are connected to two ends 11a, llb, 13 of T-shaped capacitor electrodes 11 and 13, respectively.
a and 13b are wrapped around so as to cover the parts exposed on the side surfaces of the laminate, and the external electrode 41 is connected to the end part 11a.
, 11b, and the external electrode 42 is connected to the ends 13a, 13b.
connected to b. Therefore, this external electrode 41°42
The multilayer capacitor sections 1, 2.3 are coupled via the multilayer capacitor sections 1, 2.3. In addition, when in such a coupled state, the multilayer capacitor parts 1 and 2 are separated by the non-capacitor part 4 and mutually receive magnetic influences, so that capacitive coupling occurs. Hateful. Even between the multilayer capacitor parts 2 and 3, they are separated by the non-capacitor part 5, making it difficult for electrostatic coupling to occur. That is, the multilayer capacitor sections 1, 2.3 are not likely to be electrostatically coupled to each other, and are connected in parallel. Note that the thickness of the non-capacitor parts 4 and 5 is preferably as thick as possible in consideration of suppressing the above-mentioned electrostatic coupling.
第３図は、上述のように構成された本発明に係る積層コ
ンデンサの等価回路を示す。上述した如く各積層コンデ
ンサ部１，２．３が外部電極４１等にて並列接続されて
いるので、本発明コンデンサは、第７図に示した等価回
路と同一回路Ｘ、 ＹＺが３個並列に設けられたもの
となる。図中、回路ｘ、ｙ、ｚ間のインダクタし。は、
外部電極４１．４２に基づくものである。なお、Ｒで示
す等個直列抵抗は、積層コンデンサ部１，２．３間での
並列共振によるインピーダンス増加を避けるべく、例え
ば１０Ω以下の微小抵抗となるようにしておくとよい。FIG. 3 shows an equivalent circuit of a multilayer capacitor according to the present invention configured as described above. As mentioned above, since the multilayer capacitor sections 1, 2.3 are connected in parallel through the external electrodes 41, etc., the capacitor of the present invention has three circuits X and YZ, which are the same as the equivalent circuit shown in FIG. 7, connected in parallel. It will be established. In the figure, there is an inductor between circuits x, y, and z. teeth,
It is based on external electrodes 41, 42. Note that it is preferable that the equal series resistors indicated by R be minute resistances of, for example, 10Ω or less in order to avoid an increase in impedance due to parallel resonance between the multilayer capacitor sections 1 and 2.3.
ところで、上述した如く３つの積層コンデンサ部１，２
．３において、コンデンサ電極１１．１３の積層数を異
ならせている。即ち、積層コンデンサ部１．２．３にて
形成されるコンデンサ容量Ｃは、夫々異なっている。例
えば、積層コンデンサ部１では１０ｐＦ、積層コンデン
サ部２では１０００ｐＦ、積層コンデンサ部３では１０
０ｐＦとしている。したがって、第１図に示す積層コン
デンサにおける各積層コンデンサ部での周波数特性は、
第４図の（ａ）に示すように、異なる周波数の箇所で共
振点Ａ＋ 、Ａｚ 、Ａ３が生ずるようになり、よって
、積層コンデンサ全体における周波数特性は、第４図の
（ｂ）に示すように低インピーダンスとなる範囲Ｗを広
くできる。この結果として、本発明コンデンサを用いて
ノイズをバイパスする回路を作成した場合、高周波ノイ
ズをバイパスできる周波数帯域を拡大することかできる
。By the way, as mentioned above, the three multilayer capacitor sections 1 and 2
．． In No. 3, the number of stacked layers of capacitor electrodes 11 and 13 is varied. That is, the capacitor capacitances C formed in the multilayer capacitor sections 1, 2, and 3 are different from each other. For example, the multilayer capacitor section 1 is 10 pF, the multilayer capacitor section 2 is 1000 pF, and the multilayer capacitor section 3 is 10 pF.
It is set to 0 pF. Therefore, the frequency characteristics of each multilayer capacitor section in the multilayer capacitor shown in Fig. 1 are as follows:
As shown in Figure 4 (a), resonance points A+, Az, and A3 occur at different frequency locations, and the frequency characteristics of the entire multilayer capacitor are therefore as shown in Figure 4 (b). The range W in which the impedance is low can be widened. As a result, when a circuit for bypassing noise is created using the capacitor of the present invention, the frequency band in which high frequency noise can be bypassed can be expanded.
また、積層コンデンサ部１，２．３の容量組み合わせ、
インダクタの値を変えることで所望の周波数特性を得る
ことができる。In addition, the capacitance combination of the multilayer capacitor sections 1 and 2.3,
Desired frequency characteristics can be obtained by changing the value of the inductor.
なお、各積層コンデンサ部１．２．３のコンデンサ電ｉ
１１．１３の積層数は、この例では夫々２個、５個、３
個としたが、これに限るものではなく、相互にコンデン
サ容量を異ならすことができれば、どのような個数とし
てもよい。In addition, the capacitor voltage i of each multilayer capacitor section 1.2.3
In this example, the number of stacked layers of 11.13 is 2, 5, and 3, respectively.
However, the number is not limited to this, and any number may be used as long as the capacitances of the capacitors can be different from each other.
また、コンデンサ電極１１．１３の大きさを変えて、第
２図にハツチングで示した対向部の面積を変化させる場
合には、各積層コンデンサ部１゜２３におけるコンデン
サ電極を同じ個数としてもよい。Furthermore, when changing the size of the capacitor electrodes 11, 13 to change the area of the opposing portions shown by hatching in FIG. 2, the number of capacitor electrodes in each multilayer capacitor section 1.23 may be the same.
更に、各非コンデンサ部４．５におけるシート１０の積
層枚数についても、積層コンデンサ部１゜２．３間にお
いて静電結合を所望の程度防止できれば、どのような枚
数としてもよい。Furthermore, the number of laminated sheets 10 in each non-capacitor section 4.5 may be any number as long as electrostatic coupling can be prevented to a desired degree between the laminated capacitor sections 1.2.3.
また、各積層コンデンサ部１，２．３に使用する誘電体
の材質としては、例えば誘電率を異ならせたものなどを
使用してもよい。Further, as the dielectric material used for each multilayer capacitor section 1, 2.3, materials having different dielectric constants may be used, for example.
光凱■盈来
以上詳述した如く本発明による場合には、積層方向に隣
合う積層コンデンサ部の間に非コンデンサ部が設けられ
ているので、隣合う積層コンデンサ部間の静電結合を小
さくでき、並列共振とすることが可能となる。また、そ
の状態で各積層コンデンサ部が外部電極で結合されてお
り、しかも積層コンデンサ部が容量を異ならせであるの
で、各積層コンデンサ部にて形成される共振点の周波数
をずらせることが可能となり、１例として第５図に示す
ように従来品（破線）より、本発明品（実線）の方が低
インピーダンスとなる周波数帯域を広くすることができ
、よって広い周波数帯域にわたってノイズ成分をバイパ
スできるという優れた効果を奏する。As described in detail above, in the case of the present invention, since the non-capacitor part is provided between the laminated capacitor parts adjacent to each other in the stacking direction, the electrostatic coupling between the adjacent laminated capacitor parts can be reduced. This makes it possible to achieve parallel resonance. In addition, in this state, each multilayer capacitor section is connected by an external electrode, and since the multilayer capacitor sections have different capacitances, it is possible to shift the frequency of the resonance point formed by each multilayer capacitor section. As an example, as shown in Figure 5, the product of the present invention (solid line) can have a wider frequency band with lower impedance than the conventional product (dashed line), thereby bypassing noise components over a wide frequency band. It has excellent effects.
４、4,
第１図は本発明に係る積層コンデンサを示す縦断面図、
第２図はコンデンサ電極部分を示す平面図、第３図は第
１図に示す積層コンデンサの等価回路図、第４図の（ａ
）は第１図に示す積層コンデンサを構成する各積層コン
デンサ部の周波数特性図、第４図の（ｂ）は第１図に示
す積層コンデンサの周波数特性図、第５図は本発明品の
周波数特性と従来品の周波数特性を対比して示す周波数
特性図、第６図は従来の積層コンデンサを示す縦断面図
、第７図はその積層コンデンサのコンデンサ電極部分を
示す平面図、第８図は第６図の積層コンデンサの等価回
路図、第９図は第６図の積層コンデンサの周波数特性図
である。
１．２．３・・・積層コンデンサ部、４．５・・・非コ
ンデンサ部、４１．４２・・・外部電極。FIG. 1 is a longitudinal cross-sectional view showing a multilayer capacitor according to the present invention;
Figure 2 is a plan view showing the capacitor electrode part, Figure 3 is an equivalent circuit diagram of the multilayer capacitor shown in Figure 1, and Figure 4 (a).
) is a frequency characteristic diagram of each multilayer capacitor section that constitutes the multilayer capacitor shown in Fig. 1, (b) of Fig. 4 is a frequency characteristic diagram of the multilayer capacitor shown in Fig. 1, and Fig. 5 is a frequency characteristic diagram of the multilayer capacitor section shown in Fig. 1. A frequency characteristic diagram showing a comparison between the characteristics and the frequency characteristics of a conventional product, Fig. 6 is a longitudinal cross-sectional view showing a conventional multilayer capacitor, Fig. 7 is a plan view showing the capacitor electrode part of the multilayer capacitor, and Fig. 8 is a diagram showing the frequency characteristics of a conventional product. FIG. 6 is an equivalent circuit diagram of the multilayer capacitor shown in FIG. 6, and FIG. 9 is a frequency characteristic diagram of the multilayer capacitor shown in FIG. 1.2.3... Multilayer capacitor section, 4.5... Non-capacitor section, 41.42... External electrode.
Claims (1)
積層コンデンサ部の積層方向と同一方向に積層され、か
つ、積層方向に隣合う積層コンデンサ部の間に非コンデ
ンサ部が設けられ、各積層コンデンサ部が外部電極で結
合されていることを特徴とする積層コンデンサ。(1) Two or more multilayer capacitor sections with different capacities,
The multilayer capacitor parts are laminated in the same direction as the lamination direction of the multilayer capacitor parts, a non-capacitor part is provided between adjacent multilayer capacitor parts in the lamination direction, and each multilayer capacitor part is connected by an external electrode. Multilayer capacitor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2223057A JPH04105311A (en) | 1990-08-24 | 1990-08-24 | Multilayered capacitor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2223057A JPH04105311A (en) | 1990-08-24 | 1990-08-24 | Multilayered capacitor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH04105311A true JPH04105311A (en) | 1992-04-07 |
Family
ID=16792161
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2223057A Pending JPH04105311A (en) | 1990-08-24 | 1990-08-24 | Multilayered capacitor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH04105311A (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5583738A (en) * | 1993-03-29 | 1996-12-10 | Murata Manufacturing Co., Ltd. | Capacitor array |
| WO2006067939A1 (en) * | 2004-12-24 | 2006-06-29 | Murata Manufacturing Co., Ltd. | Multilayer capacitor and mounting structure of same |
| JP2006203258A (en) * | 2004-12-24 | 2006-08-03 | Murata Mfg Co Ltd | Laminated capacitor and packaging structure thereof |
| JP2009135416A (en) * | 2007-11-30 | 2009-06-18 | Samsung Electro-Mechanics Co Ltd | Lamination type chip capacitor and circuit board apparatus having the same |
| WO2017204338A1 (en) * | 2016-05-27 | 2017-11-30 | 京セラ株式会社 | Stacked capacitor |
| JP2020096074A (en) * | 2018-12-12 | 2020-06-18 | 太陽誘電株式会社 | Ceramic electronic component and wiring board |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5776824A (en) * | 1980-10-31 | 1982-05-14 | Nippon Electric Co | Laminated ceramic condenser |
| JPS60244097A (en) * | 1984-05-18 | 1985-12-03 | ティーディーケイ株式会社 | Hybrid electronic circuit |
| JPS6376313A (en) * | 1986-09-18 | 1988-04-06 | ティーディーケイ株式会社 | Laminated lc filter component |
-
1990
- 1990-08-24 JP JP2223057A patent/JPH04105311A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5776824A (en) * | 1980-10-31 | 1982-05-14 | Nippon Electric Co | Laminated ceramic condenser |
| JPS60244097A (en) * | 1984-05-18 | 1985-12-03 | ティーディーケイ株式会社 | Hybrid electronic circuit |
| JPS6376313A (en) * | 1986-09-18 | 1988-04-06 | ティーディーケイ株式会社 | Laminated lc filter component |
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5583738A (en) * | 1993-03-29 | 1996-12-10 | Murata Manufacturing Co., Ltd. | Capacitor array |
| WO2006067939A1 (en) * | 2004-12-24 | 2006-06-29 | Murata Manufacturing Co., Ltd. | Multilayer capacitor and mounting structure of same |
| JP2006203258A (en) * | 2004-12-24 | 2006-08-03 | Murata Mfg Co Ltd | Laminated capacitor and packaging structure thereof |
| US7310217B2 (en) | 2004-12-24 | 2007-12-18 | Murata Manufacturing Co., Ltd. | Monolithic capacitor and mounting structure thereof |
| JP2009135416A (en) * | 2007-11-30 | 2009-06-18 | Samsung Electro-Mechanics Co Ltd | Lamination type chip capacitor and circuit board apparatus having the same |
| US8050012B2 (en) | 2007-11-30 | 2011-11-01 | Samsung Electro-Mechanics Co., Ltd. | Multilayer chip capacitor and circuit board device including the same |
| WO2017204338A1 (en) * | 2016-05-27 | 2017-11-30 | 京セラ株式会社 | Stacked capacitor |
| JPWO2017204338A1 (en) * | 2016-05-27 | 2019-03-14 | 京セラ株式会社 | Multilayer capacitor |
| JP2020096074A (en) * | 2018-12-12 | 2020-06-18 | 太陽誘電株式会社 | Ceramic electronic component and wiring board |
| US11521798B2 (en) | 2018-12-12 | 2022-12-06 | Taiyo Yuden Co., Ltd. | Ceramic electronic device and wiring substrate |
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