JPH08279444A - Microstructure and manufacturing method thereof - Google Patents
Microstructure and manufacturing method thereofInfo
- Publication number
- JPH08279444A JPH08279444A JP7082884A JP8288495A JPH08279444A JP H08279444 A JPH08279444 A JP H08279444A JP 7082884 A JP7082884 A JP 7082884A JP 8288495 A JP8288495 A JP 8288495A JP H08279444 A JPH08279444 A JP H08279444A
- Authority
- JP
- Japan
- Prior art keywords
- electrode
- glass
- substrate
- ground
- silicon
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明はシリコンとガラスよりな
る微小構造体の構造および製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a structure and a manufacturing method of a microstructure composed of silicon and glass.
【０００２】[0002]
【従来の技術】図７に従来のシリコンガラス構造体を示
した。ここに示した構造体は容量型加速度センサに利用
されるものである。構造体の周辺にはガラスとシリコン
を接合するための領域が設けてあり、その内側に設けら
れたギャップ２内に、容量を測定するための電極３およ
びパッド６、配線４等が設けられている。2. Description of the Related Art FIG. 7 shows a conventional silicon glass structure. The structure shown here is used for a capacitive acceleration sensor. A region for joining glass and silicon is provided around the structure, and an electrode 3 for measuring capacitance, a pad 6, a wiring 4 and the like are provided in a gap 2 provided inside thereof. There is.
【０００３】陽極接合は以下のように行われる。第１に
ガラス基板１とシリコンを目合わせする。ついで、ヒー
タの上に乗せ４００度程度に加熱する。次に、ガラスに
マイナス電圧を加えるためのバイアス電極を立て、プラ
スの電圧を加えるためにシリコン基板にプレート状の電
極を接触させる。この状態にて４００ボルトの電圧を両
電極の間に加える。Anodic bonding is performed as follows. First, the glass substrate 1 and silicon are aligned. Then, it is placed on the heater and heated to about 400 degrees. Next, a bias electrode for applying a negative voltage to the glass is set up, and a plate-shaped electrode is brought into contact with the silicon substrate to apply a positive voltage. In this state, a voltage of 400 V is applied between both electrodes.
【０００４】温度と電圧によってガラス中のナトリウム
イオンがマイナスにバイアスされた電極の方向に移動し
酸素イオンがガラスとシリコン基板の界面に残される。
この酸素イオンは大変活性が高いので、シリコン基板と
反応して酸化シリコンを形成する。以上の結果ガラスと
シリコン基板の間に酸素結合が生じ、両者は接合され
る。The temperature and voltage cause sodium ions in the glass to move toward the negatively biased electrode, leaving oxygen ions at the interface between the glass and the silicon substrate.
Since this oxygen ion is very active, it reacts with the silicon substrate to form silicon oxide. As a result of the above, oxygen bond is generated between the glass and the silicon substrate, and both are bonded.
【０００５】[0005]
【発明が解決しようとする課題】従来の方法で加速度セ
ンサ等可動部のあるデバイスを接合すると、可動部が陽
極接合のために加えられる高電圧によって移動し、スト
ッパであるガラス基板上に設けられた容量電極と接触す
るため、可動電極および容量電極が融着したり損傷する
といった課題があった。また、高電圧を加えられると変
質する材料があると、その材料にダメージが生じるとい
った課題があった。そこで、一般には電極が直接接触す
るのを防ぐため、絶縁性の膜を電極上に設けるとか、突
起を設けるとかの方法を取っていたが、プロセスが複雑
になったりデバイスの歩留りが低下するという課題があ
った。When a device having a movable part such as an acceleration sensor is bonded by a conventional method, the movable part is moved by a high voltage applied for anodic bonding and is provided on a glass substrate which is a stopper. Further, there is a problem that the movable electrode and the capacitance electrode are fused or damaged because they come into contact with the capacitance electrode. In addition, if there is a material that deteriorates when a high voltage is applied, there is a problem that the material is damaged. Therefore, in general, in order to prevent the electrodes from directly contacting each other, a method of providing an insulating film on the electrodes or providing a protrusion has been used, but the process is complicated and the device yield is lowered. There were challenges.
【０００６】[0006]
【課題を解決するための手段】本発明はシリコンとガラ
ス等を直接接合する陽極接合法において、陽極接合する
ためのバイアス電圧を加えるための電極とは別にガラス
基板上にアース電極あるいはアース配線を設け、そのア
ース電極および配線の電位を制御しながら陽極接合を行
うことを特徴とする陽極接合法。According to the present invention, in an anodic bonding method for directly bonding silicon and glass or the like, a ground electrode or a ground wire is provided on a glass substrate separately from an electrode for applying a bias voltage for anodic bonding. An anodic bonding method, characterized in that the anodic bonding is performed while controlling the potentials of the ground electrode and the wiring.
【０００７】シリコンとガラスの直接接合を行った構造
体において、ガラスあるいはシリコン基板上にアース電
極の電位を制御するためのアース配線を有したことを特
徴とするシリコン、ガラス構造体。In a structure in which silicon and glass are directly bonded, a silicon or glass structure characterized by having ground wiring for controlling the potential of a ground electrode on the glass or silicon substrate.
【０００８】デバイスの周辺領域にアース配線が配置さ
れていることを特徴とする請求項２の構造体。3. The structure according to claim 2, wherein a ground wiring is arranged in the peripheral region of the device.
【０００９】デバイス周辺部に溝を掘り、その中にアー
ス配線を設けたことを特徴とする請求項３の構造体。A structure according to claim 3, wherein a groove is formed in the peripheral portion of the device, and a ground wiring is provided therein.
【００１０】容量電極あるいはアース電極を可動部を持
つ基板とショートするための配線およびコンタクト領域
を有することを特徴とするシリコンガラス構造体。A silicon glass structure having a wiring and a contact region for short-circuiting a capacitance electrode or a ground electrode with a substrate having a movable portion.
【００１１】ダイシングにより、アース配線を切断する
工程を有することを特徴とするシリコンガラス構造体の
製造方法である。A method of manufacturing a silicon glass structure, which comprises a step of cutting the ground wiring by dicing.
【００１２】[0012]
【作用】陽極接合に必要なバイアス電極とは別にガラス
基板上に設けられた容量電極をアースするため、シリコ
ン可動部の電位と容量電極の電位を同じにすることが出
来る。静電引力は電位差の無いところには働かないので
可動部は接合中に移動することがない。The capacitance electrode provided on the glass substrate separately from the bias electrode required for anodic bonding is grounded, so that the potential of the movable silicon portion and the potential of the capacitance electrode can be the same. Since the electrostatic attraction does not work where there is no potential difference, the movable part does not move during joining.
【００１３】したがって、可動部と容量電極は接触を起
こさないため両者にダメージが入らない。また、何らか
の原因で両者が接触しても両者が同じ電位に保たれてい
るので、ショートによる融着等が起こらない。Therefore, since the movable portion and the capacitance electrode do not come into contact with each other, neither is damaged. Further, even if the two come into contact with each other for some reason, they are kept at the same potential, so that fusion due to a short circuit does not occur.
【００１４】[0014]
（実施例１）図１に、本発明の第１の実施例を示す。 (Embodiment 1) FIG. 1 shows a first embodiment of the present invention.
【００１５】実施例は可動部を持つ代表的ガラスシリコ
ン構造体である加速度センサを例にとって説明する。加
速度センサはシリコン基板に設けられた可動電極とガラ
ス基板１上に設けられた容量電極３の間に生じる容量を
検出することによって行われる。容量電極３はガラス基
板１にエッチングによって形成されたギャップ２の中に
形成されている。容量電極にはパッド６が接続されてお
り通常はこのパッドよりセンサ信号が外部とやり取りさ
れる。本実施例ではこの容量電極はアースを行うための
電極を兼ねている。従って、パッドの先にアース配線７
が設けられている。ガラス基板面からアース配線が飛び
出していると接合を行うのにすき間ができて不都合であ
る。それを回避するには図１に示したようにアース配線
はチップ周辺部に設けた溝５の中に設けると効果的であ
る。The embodiment will be described by taking an acceleration sensor, which is a typical glass silicon structure having a movable portion, as an example. The acceleration sensor is performed by detecting the capacitance generated between the movable electrode provided on the silicon substrate and the capacitance electrode 3 provided on the glass substrate 1. The capacitance electrode 3 is formed in the gap 2 formed by etching the glass substrate 1. A pad 6 is connected to the capacitance electrode, and normally a sensor signal is exchanged with the outside through this pad. In this embodiment, this capacitance electrode also serves as an electrode for grounding. Therefore, connect the ground wire 7 to the end of the pad.
Is provided. If the ground wire is protruding from the glass substrate surface, there is a gap in joining, which is inconvenient. To avoid this, it is effective to provide the ground wiring in the groove 5 provided in the peripheral portion of the chip as shown in FIG.
【００１６】図２にそれぞれのアース配線の接続状態と
ウエハー全体の様子を示した。図に見るようにアース配
線７はチップ周辺部に設けられており電気的に接続され
てアース用パッド８に接続される。陽極接合は、このア
ース用パッドをシリコン基板の電位と等しくして行われ
る。FIG. 2 shows the connection state of each ground wiring and the state of the entire wafer. As shown in the figure, the ground wiring 7 is provided in the peripheral portion of the chip and is electrically connected to the ground pad 8. The anodic bonding is performed by making the ground pad equal to the potential of the silicon substrate.
【００１７】（実施例２）図３に第２の実施例を示す。
この例は複数の容量電極を持つ場合の例について示して
いる。この場合も第１の実施例と同じように、それぞれ
の容量電極３からパッドに配線４が行われそのパッドか
らアース配線７に結ばれている。この場合それぞれの容
量電極は接合状態でショートしてしまっているが、最終
的にチップをダイシングして切断する際にそのショート
は解除される。(Second Embodiment) FIG. 3 shows a second embodiment.
This example shows an example in the case of having a plurality of capacitance electrodes. Also in this case, as in the first embodiment, the wiring 4 is formed from each capacitive electrode 3 to the pad, and the pad is connected to the ground wiring 7. In this case, each capacitance electrode is short-circuited in the joined state, but the short-circuit is released when the chip is finally diced and cut.
【００１８】（実施例３）図４に貫通穴を持つデバイス
に適用した第３の実施例を示した。この例では、ガラス
基板裏面のギャップの中に設けられた容量電極４５は貫
通穴４３を通してガラス基板表面のパッド４２に電気的
に接続されている。この先にアース配線４１を設ける。
この配線は図２、図３で示したウエハー全体図と同様に
繋がれている。(Embodiment 3) FIG. 4 shows a third embodiment applied to a device having a through hole. In this example, the capacitance electrode 45 provided in the gap on the back surface of the glass substrate is electrically connected to the pad 42 on the front surface of the glass substrate through the through hole 43. The ground wiring 41 is provided ahead of this.
This wiring is connected in the same manner as in the whole wafer view shown in FIGS.
【００１９】（実施例４）図５に本発明の第４の実施例
を示した。本実施例ではアース配線を用いてシリコンウ
エハー全体としてアースする代わりにそれぞれのチップ
の部分でシリコン基板に対してショート配線５１を行
い、コンタクト電極５２を介して可動部分を持つシリコ
ン基板に電気的に接触される。このようにすると陽極接
合時に自動的に容量電極３がシリコン基板と同電位に保
たれるので外部アースをする必要が無い。(Embodiment 4) FIG. 5 shows a fourth embodiment of the present invention. In this embodiment, instead of grounding the silicon wafer as a whole by using the ground wiring, short wiring 51 is made to the silicon substrate at each chip portion and electrically connected to the silicon substrate having the movable portion through the contact electrode 52. Contacted. In this way, the capacitive electrode 3 is automatically kept at the same potential as the silicon substrate at the time of anodic bonding, so that it is not necessary to make an external ground.
【００２０】（実施例５）図６に本発明の第５の実施例
を示した。本実施例はガラス基板と接合するものの特に
容量電極を必要としない場合に有効な方法を示した。そ
の場合には図に示したようにアース電極９をガラス基板
表面に設ける。この場合電極は測定等に使用しないので
パッドが無い。(Embodiment 5) FIG. 6 shows a fifth embodiment of the present invention. This example shows an effective method in the case of joining to a glass substrate but not particularly requiring a capacitive electrode. In that case, as shown in the figure, the ground electrode 9 is provided on the surface of the glass substrate. In this case, the electrode is not used for measurement or the like, so that there is no pad.
【００２１】この電極をシリコン基板と同電位あるいは
特定の電位にして陽極接合を行う。Anodic bonding is performed by setting this electrode to the same potential as the silicon substrate or a specific potential.
【００２２】[0022]
【発明の効果】本発明を利用すると、陽極接合時に可動
部と容量電極の間に静電引力が生じないので、互いに接
触を起こさず、両電極が融着したり損傷したりする事が
ないと言った効果がある。そのため、従来の可動部を持
つ構造体において行われていた、酸化膜あるいは窒化膜
等の接着防止層を設ける必要が無い。また、重り表面に
突起部を設けるなどの措置が行われてきたがその必要が
無い。その他、高電圧が加えられると困るデバイスの構
造あるいは製造方法として利用できる。アース配線は溝
の中にあるため、陽極接合の接合状態に悪影響を与える
ことが無い。According to the present invention, since electrostatic attraction is not generated between the movable part and the capacitive electrode during anodic bonding, they do not come into contact with each other and neither electrode is fused nor damaged. There is an effect that said. Therefore, it is not necessary to provide an adhesion prevention layer such as an oxide film or a nitride film, which has been performed in the conventional structure having a movable portion. Also, measures such as providing protrusions on the weight surface have been taken, but this is not necessary. In addition, it can be used as a device structure or a manufacturing method which is troubled when a high voltage is applied. Since the ground wire is in the groove, it does not adversely affect the anodic bonding state.
【図１】本発明の第１の実施例の詳細を示す図である。FIG. 1 is a diagram showing details of a first embodiment of the present invention.
【図２】本発明の第１の実施例の全体を示す図である。FIG. 2 is a diagram showing an entire first embodiment of the present invention.
【図３】本発明の第２の実施例の全体を示す図である。FIG. 3 is a diagram showing an entire second embodiment of the present invention.
【図４】本発明の第３の実施例の詳細を示す図である。FIG. 4 is a diagram showing details of a third embodiment of the present invention.
【図５】本発明の第４の実施例の詳細を示す図である。FIG. 5 is a diagram showing details of the fourth embodiment of the present invention.
【図６】本発明の第５の実施例の詳細を示す図である。FIG. 6 is a diagram showing details of a fifth embodiment of the present invention.
【図７】従来発明を示す図である。FIG. 7 is a diagram showing a conventional invention.
１ ガラス基板 ２ ギャップ ３ 容量電極 ４ 配線 ５ 溝 ６ パッド ７ アース配線 ８ アース用パッド ９ アース電極 ４１ アース配線 ４２ パッド ４３ 貫通穴 ４４ ガラス基板 ４５ 容量電極 ５１ ショート電極 ５２ コンタクト電極 1 Glass Substrate 2 Gap 3 Capacitance Electrode 4 Wiring 5 Groove 6 Pad 7 Ground Wiring 8 Ground Pad 9 Ground Electrode 41 Ground Wiring 42 Pad 43 Through Hole 44 Glass Substrate 45 Capacitance Electrode 51 Short Electrode 52 Contact Electrode
Claims (6)
れる構造体において、ガラスあるいはシリコン基板上に
容量電極あるいはアース電極の電位を制御するためのア
ース配線を有したことを特徴とする微小構造体。1. A structure formed by direct bonding of silicon and glass, comprising a glass or silicon substrate and a ground wiring for controlling the potential of a capacitance electrode or a ground electrode. .
れていることを特徴とする請求項１記載の微小構造体。2. The microstructure according to claim 1, wherein ground wiring is arranged in a peripheral region of the device.
ス配線を設けたことを特徴とする請求項２記載の微小構
造体。3. The microstructure according to claim 2, wherein a groove is formed in the peripheral portion of the device, and a ground wiring is provided in the groove.
つ基板とショートするための配線およびコンタクト領域
を有することを特徴とするシリコンとガラスよりなる微
小構造体。4. A microstructure made of silicon and glass, which has a wiring and a contact region for short-circuiting a capacitance electrode or a ground electrode with a substrate having a movable portion.
工程を有することを特徴とするシリコンガラスよりなる
微小構造体の製造方法。5. A method of manufacturing a microstructure made of silicon glass, which comprises a step of cutting the ground wiring by dicing.
ための電極とは別にガラス基板上にアース電極あるいは
アース配線を設け、そのアース電極および配線の電位を
制御しながらシリコンとガラス等を直接接合する陽極接
合を行うことを特徴とする微小構造体の製造方法。6. A ground electrode or ground wiring is provided on a glass substrate separately from an electrode for applying a bias voltage for anodic bonding, and silicon and glass are directly bonded while controlling the potential of the ground electrode and the wiring. A method for manufacturing a microstructure, which comprises performing anodic bonding.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7082884A JPH08279444A (en) | 1995-04-07 | 1995-04-07 | Microstructure and manufacturing method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7082884A JPH08279444A (en) | 1995-04-07 | 1995-04-07 | Microstructure and manufacturing method thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH08279444A true JPH08279444A (en) | 1996-10-22 |
Family
ID=13786707
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7082884A Pending JPH08279444A (en) | 1995-04-07 | 1995-04-07 | Microstructure and manufacturing method thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH08279444A (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0943923A1 (en) * | 1998-03-16 | 1999-09-22 | Akebono Brake Industry Co., Ltd. | Semiconductor acceleration sensor and manufacturing method thereof |
| KR100446624B1 (en) * | 2002-02-27 | 2004-09-04 | 삼성전자주식회사 | Anodic bonding structure and fabricating method thereof |
| CN100358094C (en) * | 2004-09-10 | 2007-12-26 | 北京工业大学 | Static bonding process with suspending movable sensitive structure |
| JP2010054210A (en) * | 2008-08-26 | 2010-03-11 | Panasonic Electric Works Co Ltd | Method of manufacturing capacitance type semiconductor physical quantity sensor and capacitance-type semiconductor physical quantity sensor |
| JP2010145264A (en) * | 2008-12-19 | 2010-07-01 | Pioneer Electronic Corp | Method for manufacturing mems device, mems device and junction mother board |
| JP2013124933A (en) * | 2011-12-14 | 2013-06-24 | Seiko Epson Corp | Physical quantity sensor, method for manufacturing the same, and electronic apparatus |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0387029A (en) * | 1989-08-30 | 1991-04-11 | Nec Corp | Semiconductor integrated circuit |
| JPH04299267A (en) * | 1991-03-27 | 1992-10-22 | Toyoda Mach Works Ltd | Capacity type acceleration sensor |
| JPH0555327A (en) * | 1991-08-26 | 1993-03-05 | Toshiba Corp | Screening method of semiconductor element |
| JPH0685158A (en) * | 1992-09-07 | 1994-03-25 | Matsushita Electric Ind Co Ltd | Electric transmission line and manufacture thereof |
-
1995
- 1995-04-07 JP JP7082884A patent/JPH08279444A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0387029A (en) * | 1989-08-30 | 1991-04-11 | Nec Corp | Semiconductor integrated circuit |
| JPH04299267A (en) * | 1991-03-27 | 1992-10-22 | Toyoda Mach Works Ltd | Capacity type acceleration sensor |
| JPH0555327A (en) * | 1991-08-26 | 1993-03-05 | Toshiba Corp | Screening method of semiconductor element |
| JPH0685158A (en) * | 1992-09-07 | 1994-03-25 | Matsushita Electric Ind Co Ltd | Electric transmission line and manufacture thereof |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0943923A1 (en) * | 1998-03-16 | 1999-09-22 | Akebono Brake Industry Co., Ltd. | Semiconductor acceleration sensor and manufacturing method thereof |
| US6153917A (en) * | 1998-03-16 | 2000-11-28 | Akebono Brake Industry Co., Ltd. | Semiconductor acceleration sensor and manufacturing method thereof |
| KR100446624B1 (en) * | 2002-02-27 | 2004-09-04 | 삼성전자주식회사 | Anodic bonding structure and fabricating method thereof |
| CN100358094C (en) * | 2004-09-10 | 2007-12-26 | 北京工业大学 | Static bonding process with suspending movable sensitive structure |
| JP2010054210A (en) * | 2008-08-26 | 2010-03-11 | Panasonic Electric Works Co Ltd | Method of manufacturing capacitance type semiconductor physical quantity sensor and capacitance-type semiconductor physical quantity sensor |
| JP2010145264A (en) * | 2008-12-19 | 2010-07-01 | Pioneer Electronic Corp | Method for manufacturing mems device, mems device and junction mother board |
| JP2013124933A (en) * | 2011-12-14 | 2013-06-24 | Seiko Epson Corp | Physical quantity sensor, method for manufacturing the same, and electronic apparatus |
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