JPH08236939A - Manufacture of multilayered printed wiring board - Google Patents
Manufacture of multilayered printed wiring boardInfo
- Publication number
- JPH08236939A JPH08236939A JP3980795A JP3980795A JPH08236939A JP H08236939 A JPH08236939 A JP H08236939A JP 3980795 A JP3980795 A JP 3980795A JP 3980795 A JP3980795 A JP 3980795A JP H08236939 A JPH08236939 A JP H08236939A
- Authority
- JP
- Japan
- Prior art keywords
- copper foil
- printed wiring
- wiring board
- etching
- inner layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
- H05K3/061—Etching masks
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
- H05K3/382—Improvement of the adhesion between the insulating substrate and the metal by special treatment of the metal
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
Landscapes
- Manufacturing Of Printed Circuit Boards (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、多層プリント配線板の
製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a multilayer printed wiring board.
【０００２】[0002]
【従来の技術】従来、多層プリント配線板の製造方法に
用いられる銅張積層板は、絶縁基板の片面又は両面に、
導電層である銅箔を貼着することによって得られる。こ
の銅箔としては、例えば、電解銅箔等が用いられる。銅
箔の断面構造は、通常、片面が平滑なシャイニー面（光
沢面）、もう一方の面が粗面化したマット面（粗化面）
からなっている片面粗化銅箔〔ＳＴ（シングルトリート
メント）箔〕である。シャイニー面は、電解で製造する
際に使用するチタン等で作られる鏡面のドラム電極に接
する面で、マット面は、電解液側の面である。2. Description of the Related Art Conventionally, a copper clad laminate used in a method for producing a multilayer printed wiring board has a
It is obtained by sticking a copper foil which is a conductive layer. As this copper foil, for example, electrolytic copper foil or the like is used. The cross-sectional structure of the copper foil is usually a shiny surface with one side smooth (glossy surface) and a matte surface with the other surface roughened (roughened surface).
It is a one-sided roughened copper foil [ST (single treatment) foil]. The shiny surface is a surface that is in contact with a drum electrode that is a mirror surface made of titanium or the like that is used when manufacturing by electrolysis, and the matt surface is the surface on the electrolyte solution side.
【０００３】銅張積層板とするときに、アンカー効果に
より、銅箔と絶縁基板の樹脂との接着強度を高め、銅箔
の引き剥がし強度を大きくするために銅箔を粗化するも
のである。すなわち、従来、銅張積層板では、接着強度
や処理の容易等から銅箔のマット面で絶縁基板との接着
が行われてきた。ところが、多層プリント配線板におい
て、厚みが７０μｍ以上、特に、内層銅箔の厚みが１０
５μｍ以上の場合には、マット面の表面粗度（Ｒｚ）が
大きく、２０μｍ程度もあるので、エッチング、パター
ニングした場合、銅箔のマット面が絶縁基板の中に多く
食い込んでいるので、エッチング液でエッチングし難
く、エッチングスプレー圧等を調整しても対応仕切れ
ず、エッチング精度のばらつきが大きくなり、配線パタ
ーンの精度が悪くなるといった問題があった。When a copper-clad laminate is used, the adhesive effect between the copper foil and the resin of the insulating substrate is increased by the anchor effect, and the copper foil is roughened in order to increase the peeling strength of the copper foil. . That is, conventionally, in the copper-clad laminate, the matte surface of the copper foil has been bonded to the insulating substrate due to the bonding strength and the ease of processing. However, in a multilayer printed wiring board, the thickness is 70 μm or more, and particularly, the inner layer copper foil has a thickness of 10 μm.
When the thickness is 5 μm or more, the surface roughness (Rz) of the matte surface is large, and is as large as about 20 μm. Therefore, when etching or patterning, the matte surface of the copper foil largely digs into the insulating substrate. Therefore, there is a problem that it is difficult to perform etching, and even if the etching spray pressure is adjusted, it cannot be dealt with, the variation in etching accuracy becomes large, and the accuracy of the wiring pattern deteriorates.
【０００４】[0004]
【発明が解決しようとする課題】本発明は前記の事実に
鑑みてなされたもので、その目的とするところは、内層
銅箔の厚みが７０μｍ以上の場合でも、エッチングばら
つきが低減され、配線パターンの精度が良好な多層プリ
ント配線板の製造方法を提供することにある。SUMMARY OF THE INVENTION The present invention has been made in view of the above facts, and an object of the present invention is to reduce an etching variation even when the inner copper foil has a thickness of 70 μm or more and to form a wiring pattern. To provide a method for manufacturing a multilayer printed wiring board with good accuracy.
【０００５】[0005]
【課題を解決するための手段】本発明の請求項１に係る
多層プリント配線板の製造方法は、絶縁性を有する内層
の基材２の表面に厚み７０μｍ以上の銅箔１を接着し、
この銅箔１の表面に感光性を有するレジストを形成する
とともに、露光用マスクを介して光を照射し、レジスト
を露光、現像してエッチングレジストを形成し、露出し
た銅箔１をエッチングした後、エッチングレジストを剥
離して内層回路１ｐを形成するプリント配線板の製造方
法において、前記銅箔１が一方の面に表面粗度が３〜６
μｍのシャイニー側粗化面１ｓを有し、他方の面に前記
シャイニー側粗化面１ｓの表面粗度より大きいマット側
粗化面１ｍを有する両面粗化銅箔であり、この両面粗化
銅箔をシャイニー側粗化面１ｓで前記基材２の表面に接
着することを特徴とする。A method for manufacturing a multilayer printed wiring board according to claim 1 of the present invention comprises: adhering a copper foil 1 having a thickness of 70 μm or more to a surface of a base material 2 having an insulating inner layer,
After forming a photosensitive resist on the surface of the copper foil 1 and irradiating light through an exposure mask, exposing and developing the resist to form an etching resist, and etching the exposed copper foil 1. In the method for manufacturing a printed wiring board in which the etching resist is peeled off to form the inner layer circuit 1p, the copper foil 1 has a surface roughness of 3 to 6 on one surface.
A double-sided roughened copper foil having a shiny side roughened surface 1 s of μm and a mat side roughened surface 1 m larger than the surface roughness of the shiny side roughened surface 1 s on the other surface. It is characterized in that the foil is bonded to the surface of the base material 2 with the shiny side roughened surface 1s.
【０００６】本発明の請求項２に係る多層プリント配線
板の製造方法は、前記感光性を有するレジストが、厚み
５０〜６０μｍのドライフィルムであることを特徴とす
る。A method for manufacturing a multilayer printed wiring board according to a second aspect of the present invention is characterized in that the photosensitive resist is a dry film having a thickness of 50 to 60 μm.
【０００７】本発明の請求項３に係る多層プリント配線
板の製造方法は、前記露光用マスクに、所定のパターン
幅に比べて１００〜１５０μｍ広いパターン幅を形成す
ることを特徴とする。A method for manufacturing a multilayer printed wiring board according to a third aspect of the present invention is characterized in that a pattern width wider than a predetermined pattern width by 100 to 150 μm is formed on the exposure mask.
【０００８】以下、本発明を詳細に説明する。図１
（ａ）に示すように、例えば、プリプレグを一枚または
複数枚重ねて絶縁性を有する内層の基材２が得られる。
この基材２としては、ガラス・エポキシ樹脂基材、紙・
フェノール基材、ポリイミド樹脂基材、ポリエステル樹
脂基材又はポリフェニレンエーテル樹脂基材等が用いら
れ、特に限定されない。この基材２の上下の両面又は片
面に例えば、銅箔１等の金属箔を重ねたものを加熱加圧
成形、あるいは接着剤により接着することにより、積層
一体化された両面金属箔張り又は片面金属箔張り積層板
の内層材を作製することができる。この金属箔は、例え
ば、銅箔１で、一方の面に表面粗度の小さい方のシャイ
ニー側粗化面１ｓを有し、他方の面に表面粗度の大きい
方のマット側粗化面１ｍを有する両面粗化銅箔（以下Ｄ
Ｔ箔と称する）であり、このＤＴ箔をシャイニー側粗化
面１ｓで前記基材２の表面に接着することが必須であ
る。例えば、表面粗度（Ｒｚ）は、シャイニー側粗化面
１ｓが３〜６μｍで、マット側粗化面１ｍが１０〜２０
μｍ程度である。すなわち、表面粗度の小さい方のシャ
イニー側粗化面１ｓを基材２の表面に接着することによ
り、エッチング、パターニングした場合、銅箔のシャイ
ニー側粗化面１ｓが絶縁基板の中への食い込みが少な
く、エッチング液でエッチングし易いので、エッチング
ばらつきが低減され、配線パターンの精度が良好な多層
プリント配線板が得られる。シャイニー側粗化面１ｓの
表面粗度（Ｒｚ）が３μｍ未満の場合には、基材２との
密着強度が低くなり、６μｍを越える場合には、エッチ
ング、パターニングした場合、銅箔のマット面が絶縁基
板の中に多く食い込んむので、エッチング液でエッチン
グし難く、エッチング精度のばらつきが大きくなり、配
線パターンの精度が悪くなる傾向にある。The present invention will be described in detail below. FIG.
As shown in (a), for example, one or a plurality of prepregs are stacked to obtain an insulating inner layer base material 2.
As the base material 2, glass / epoxy resin base material, paper /
A phenol base material, a polyimide resin base material, a polyester resin base material, a polyphenylene ether resin base material, or the like is used and is not particularly limited. Double-sided metal foil laminated or single-sided by laminating and stacking metal foil such as copper foil 1 on both upper and lower sides or one side of this base material 2 by heat-pressing or bonding with an adhesive The inner layer material of the metal foil-clad laminate can be produced. This metal foil is, for example, a copper foil 1 having one surface having a smaller surface roughness on the shiny side 1s and the other surface having a larger surface roughness on the mat side 1m. Double-sided roughened copper foil (hereinafter D
It is essential to adhere this DT foil to the surface of the base material 2 with the shiny side roughened surface 1s. For example, regarding the surface roughness (Rz), the shiny side roughened surface 1s is 3 to 6 μm, and the mat side roughened surface 1 m is 10 to 20.
It is about μm. That is, when the shiny side roughened surface 1s having a smaller surface roughness is adhered to the surface of the base material 2 to perform etching and patterning, the shiny side roughened surface 1s of the copper foil penetrates into the insulating substrate. In addition, since it is less likely to be etched and is easily etched with an etching solution, it is possible to obtain a multilayer printed wiring board with reduced etching variation and good wiring pattern accuracy. When the surface roughness (Rz) of the shiny side roughened surface 1s is less than 3 μm, the adhesion strength with the base material 2 is low, and when it exceeds 6 μm, the matte surface of the copper foil is etched or patterned. Since a large amount of silicon dioxide penetrates into the insulating substrate, it is difficult to perform etching with an etching solution, variations in etching accuracy increase, and the accuracy of the wiring pattern tends to deteriorate.
【０００９】基材２の表面に接着されたＤＴ箔のマット
側粗化面１ｍに感光性を有するドライフィルム等のレジ
ストを形成する。この感光性を有するレジストが、厚み
５０〜６０μｍのドライフィルムであることが好まし
い。すなわち、ドライフィルムの厚みを５０〜６０μｍ
程度にすることにより、表面粗度の大きい方のマット側
粗化面１ｍとの密着性が良好になり、ラミネート時の密
着不良が防止できる。A resist such as a dry film having photosensitivity is formed on the mat-side roughened surface 1 m of the DT foil adhered to the surface of the substrate 2. This photosensitive resist is preferably a dry film having a thickness of 50 to 60 μm. That is, the thickness of the dry film is 50 to 60 μm.
By adjusting the amount to about 1, the adhesion to the mat-side roughened surface 1 m, which has a larger surface roughness, becomes good, and the adhesion failure at the time of lamination can be prevented.
【００１０】次いで、露光用マスクを介して光を照射
し、レジストを露光、現像してエッチングレジストを形
成する。この露光用マスクに、所定のパターン幅に比べ
て１００〜１５０μｍ広いパターン幅を形成することが
好ましい。すなわち、所定のパターン幅に比べて１００
〜１５０μｍ広いパターン幅を形成した露光用マスクを
用いてオーバーエッチングに仕上げることにより、図１
（ｂ）に示す内層回路１ｐの基底面１ｋの幅と上面１ｊ
の幅との差が小さくなり内層回路１ｐの精度が良くな
る。つまり、上面１ｊの幅を設計値までエッチングする
場合に、所定のパターン幅の露光用マスクを用いて形成
したエッチングレジストのときには、上面１ｊが設定値
になるまでの時間が短いので、基底面１ｋがエッチング
不足で基底面１ｋの幅が大きくなり、内層回路１ｐの基
底面１ｋの幅と上面１ｊの幅との差が大きくなり内層回
路１ｐの精度が悪くなる。所定のパターン幅に比べて１
００〜１５０μｍ広いパターン幅を形成した露光用マス
クを用いて形成したエッチングレジストのときには、上
面１ｊが設定値になるまでの時間が長いので、基底面１
ｋが十分エッチングされ、基底面１ｋの幅が小さくな
り、内層回路１ｐの基底面１ｋの幅と上面１ｊの幅との
差が小さくなり内層回路１ｐの精度が良くなる。Next, light is irradiated through the exposure mask to expose and develop the resist to form an etching resist. It is preferable to form a pattern width of 100 to 150 μm wider than the predetermined pattern width on the exposure mask. That is, 100 compared with the predetermined pattern width.
By over-etching using an exposure mask having a wide pattern width of up to 150 μm, as shown in FIG.
The width of the base surface 1k and the top surface 1j of the inner layer circuit 1p shown in (b).
And the accuracy of the inner layer circuit 1p is improved. That is, when etching the width of the upper surface 1j to the design value, the time required for the upper surface 1j to reach the set value is short in the case of an etching resist formed using an exposure mask having a predetermined pattern width. However, due to insufficient etching, the width of the base surface 1k becomes large, the difference between the width of the base surface 1k of the inner layer circuit 1p and the width of the top surface 1j becomes large, and the accuracy of the inner layer circuit 1p deteriorates. 1 compared to the given pattern width
In the case of an etching resist formed by using an exposure mask having a wide pattern width of 0 to 150 μm, it takes a long time for the upper surface 1j to reach a set value.
k is sufficiently etched, the width of the base surface 1k is reduced, the difference between the width of the base surface 1k of the inner layer circuit 1p and the width of the upper surface 1j is reduced, and the accuracy of the inner layer circuit 1p is improved.
【００１１】次いで、露出した銅箔１をエッチングした
後、ドライフィルムを例えば、アルカリ液で剥離するこ
とにより、図１（ｂ）に示すように、内層回路１ｐを形
成して内層用プリント配線板が得られる。前記ドライフ
ィルムを例えば、２ｍｍ／分以下の速度で剥離して、マ
ット側粗化面１ｍの凹部にドライフィルムが残存しない
ようにする。Next, after the exposed copper foil 1 is etched, the dry film is peeled off with, for example, an alkaline solution to form an inner layer circuit 1p as shown in FIG. 1 (b) to form an inner layer printed wiring board. Is obtained. The dry film is peeled off at a rate of, for example, 2 mm / min or less so that the dry film does not remain in the concave portion of the mat-side roughened surface 1 m.
【００１２】この内層用プリント配線板をプリプレグを
間に介して複数枚重ねると共に、その最外層に金属箔を
重ねたものを加熱加圧成形することによって、多層プリ
ント配線板を作製することができる。A multilayer printed wiring board can be produced by stacking a plurality of the printed wiring boards for inner layers with a prepreg interposed therebetween and heating and pressurizing an outermost layer on which a metal foil is stacked. .
【００１３】[0013]
【作用】本発明の請求項１に係る多層プリント配線板の
製造方法では、銅箔１が一方の面に表面粗度が３〜６μ
ｍのシャイニー側粗化面１ｓを有し、他方の面に前記シ
ャイニー側粗化面１ｓの表面粗度より大きいマット側粗
化面１ｍを有する両面粗化銅箔であり、この両面粗化銅
箔をシャイニー側粗化面１ｓで前記基材２の表面に接着
するので、エッチング、パターニングした場合、銅箔の
シャイニー側粗化面１ｓが絶縁基板の中への食い込みが
少なく、エッチング液でエッチングし易いので、エッチ
ングばらつきが低減される。In the method for manufacturing a multilayer printed wiring board according to the first aspect of the present invention, the copper foil 1 has a surface roughness of 3 to 6 .mu.
It is a double-sided roughened copper foil having m shiny side roughened surfaces 1s and a matte side roughened surface 1m larger than the surface roughness of the shiny side roughened surfaces 1s on the other surface. Since the foil is adhered to the surface of the base material 2 with the roughened surface 1s on the shiny side, when the etching and patterning are performed, the roughened surface 1s on the shiny side of the copper foil does not bite into the insulating substrate and is etched with an etching solution. Since it is easy to perform, variations in etching are reduced.
【００１４】本発明の請求項２に係る多層プリント配線
板の製造方法では、感光性を有するレジストが、厚み５
０〜６０μｍのドライフィルムであるので、表面粗度の
大きい方のマット側粗化面１ｍとの密着性が良好にな
り、ドライフィルムのラミネート時に空気が入り難い。In the method for manufacturing a multilayer printed wiring board according to the second aspect of the present invention, the photosensitive resist has a thickness of 5
Since it is a dry film having a thickness of 0 to 60 μm, the adhesion to the mat side roughened surface 1 m, which has a larger surface roughness, becomes good, and it is difficult for air to enter during lamination of the dry film.
【００１５】本発明の請求項３に係る多層プリント配線
板の製造方法では、露光用マスクに、所定のパターン幅
に比べて１００〜１５０μｍ広いパターン幅を形成する
ので、形成したエッチングレジストが大きくなるため、
上面１ｊが設定値になるまでの時間が長くかかり、基底
面１ｋが十分エッチングされ、基底面１ｋの幅が小さく
なるので、内層回路１ｐの基底面１ｋの幅と上面１ｊの
幅との差が小さくなり、内層回路１ｐの精度が良くな
る。In the method for manufacturing a multilayer printed wiring board according to the third aspect of the present invention, since the pattern width of 100 to 150 μm wider than the predetermined pattern width is formed on the exposure mask, the formed etching resist becomes large. For,
It takes a long time for the top surface 1j to reach the set value, the base surface 1k is sufficiently etched, and the width of the base surface 1k becomes small. Therefore, the difference between the width of the base surface 1k of the inner layer circuit 1p and the width of the top surface 1j is reduced. The size of the inner layer circuit 1p is reduced and the accuracy of the inner layer circuit 1p is improved.
【００１６】[0016]
【実施例】以下、本発明を実施例によって、具体的に説
明する。EXAMPLES The present invention will be specifically described below with reference to examples.
【００１７】（実施例１）図１（ａ）に示すように、厚
み１０５μｍの両面粗化銅箔（以下ＤＴ箔と称する）で
ある銅箔１（古河サーキットフォイル株式会社製：商品
名ＤＴＧＬ）をシャイニー側粗化面１ｓで、エポキシ樹
脂を含浸したガラスの基材２であるプリプレグの上下の
両面に積層し、加熱、加圧して接着した。前記ＤＴ箔の
表面粗度（Ｒｚ）は、シャイニー側粗化面１ｓが４．０
μｍで、マット側粗化面１ｍが１５μｍであった。基材
２の表面に接着されたＤＴ箔のマット側粗化面１ｍに感
光性を有する厚み５０μｍのドライフィルムを形成し
た。次いで、露光用マスクを介して光を照射し、レジス
トを露光、現像してエッチングレジストを形成した。こ
こで、所定のパターン幅（信号設計値）１．２ｍｍに比
べて５０μｍ広い１．２５ｍｍのパターン幅を形成した
露光用マスクを用いた。次いで、露出した銅箔１を図１
（ｂ）に示す内層回路１ｐの上面１ｊが略１．２ｍｍに
なるまでエッチングした後、ドライフィルムを１．７ｍ
ｍ／分の速度で剥離することにより、図１（ｂ）に示す
ように、内層回路１ｐを形成して５００×３００ｍｍの
内層用プリント配線板を得た。Example 1 As shown in FIG. 1 (a), a copper foil 1 (made by Furukawa Circuit Foil Co., Ltd .: trade name DTGL) which is a double-sided roughened copper foil (hereinafter referred to as DT foil) having a thickness of 105 μm. Was laminated on the shiny side roughened surface 1s on both upper and lower surfaces of a prepreg which is a glass base material 2 impregnated with an epoxy resin, and was heated and pressed to bond them. The surface roughness (Rz) of the DT foil was 4.0 for the shiny side roughened surface 1s.
The thickness was 1 μm, and the matt side roughened surface 1 m was 15 μm. A dry dry film having a thickness of 50 μm and having a photosensitivity was formed on the mat side roughened surface 1 m of the DT foil bonded to the surface of the substrate 2. Next, light was irradiated through the exposure mask to expose and develop the resist to form an etching resist. Here, an exposure mask having a pattern width of 1.25 mm wider by 50 μm than a predetermined pattern width (signal design value) of 1.2 mm was used. Then, the exposed copper foil 1 is shown in FIG.
After etching the upper surface 1j of the inner layer circuit 1p shown in (b) to about 1.2 mm, a dry film of 1.7 m is formed.
By peeling at a speed of m / min, an inner layer circuit 1p was formed as shown in FIG. 1 (b) to obtain a 500 × 300 mm inner layer printed wiring board.
【００１８】エッチング精度及び配線パターンの精度
（信号仕上がり精度）を測定し、表１に示した。The etching accuracy and the wiring pattern accuracy (signal finish accuracy) were measured and shown in Table 1.
【００１９】（実施例２）実施例１において、所定のパ
ターン幅（信号設計値）１．２ｍｍに比べて１５０μｍ
広い１．３５ｍｍのパターン幅を形成した露光用マスク
を用いた以外は、実施例１と同様にして、内層用プリン
ト配線板を得た。(Embodiment 2) In Embodiment 1, compared with a predetermined pattern width (signal design value) of 1.2 mm, 150 μm.
An inner layer printed wiring board was obtained in the same manner as in Example 1 except that an exposure mask having a wide pattern width of 1.35 mm was used.
【００２０】エッチング精度及び配線パターンの精度
（信号仕上がり精度）を測定し、表１に示した。The etching accuracy and the wiring pattern accuracy (signal finish accuracy) were measured and shown in Table 1.
【００２１】（実施例３）実施例１において、露光用マ
スクとして、所定のパターン幅（信号設計値）１．２ｍ
ｍに比べて表面の中央部が、１２０μｍ広い１．３２ｍ
ｍのパターン幅、表面の端部が、１５０μｍ広い１．３
５ｍｍのパターン幅及び裏面の全面が、１２０μｍ広い
１．３２ｍｍのパターン幅を形成して用いたこと以外
は、実施例１と同様にして、内層用プリント配線板を得
た。(Embodiment 3) In Embodiment 1, a predetermined pattern width (signal design value) of 1.2 m is used as an exposure mask.
1.32m where the center of the surface is 120μm wider than m
m pattern width, the edge of the surface is 150 μm wider 1.3
An inner layer printed wiring board was obtained in the same manner as in Example 1 except that a pattern width of 5 mm and a pattern width of 1.32 mm, which was 120 μm wide on the entire back surface, were used.
【００２２】エッチング精度及び配線パターンの精度
（信号仕上がり精度）を測定し、表１に示した。The etching accuracy and wiring pattern accuracy (signal finish accuracy) were measured and are shown in Table 1.
【００２３】なお、ドライフィルムのラミネート密着不
良率に関しては、ドライフィルムのラミネート時に空気
が入ったものを不良とし、厚み５０μｍのドライフィル
ムを用いた場合には、１００枚中不良がなく、不良率０
％であり、厚み４０μｍのドライフィルムを用いた場合
には、１００枚中２枚が不良であり、不良率２％であっ
た。剥離後のドライフィルムの残存の有無については、
銅箔凹面を電子顕微鏡でドライフィルムの残存の有無を
観察して評価し、露出した銅箔１をエッチングした後、
アルカリ溶液でドライフィルムを１．７ｍｍ／分の速度
で剥離した場合には、ドライフィルムの残存が無く良好
であり、ドライフィルムを２．３ｍｍ／分の速度で剥離
した場合には、ドライフィルムの残存があった。Regarding the defective adhesion of the dry film to the laminate, the defective air-containing film during the lamination of the dry film is regarded as defective, and when a dry film having a thickness of 50 μm is used, there is no defect in 100 sheets, and the defective ratio. 0
%, And when a dry film having a thickness of 40 μm was used, 2 out of 100 sheets were defective and the defective rate was 2%. For the presence or absence of the dry film remaining after peeling,
The concave surface of the copper foil was evaluated by observing the presence or absence of the remaining dry film with an electron microscope, and after etching the exposed copper foil 1,
When the dry film was peeled off with the alkaline solution at a rate of 1.7 mm / min, the dry film did not remain and was good. When the dry film was peeled off at a rate of 2.3 mm / min, the dry film was peeled off. There was a residual.
【００２４】（比較例１）実施例１において、ＤＴ箔の
に代えて、シャイニー面の表面粗度（Ｒｚ）が２．８μ
ｍで、マット側粗化面が１８．８μｍの片面粗化銅箔
（以下ＳＴ箔と称する）である銅箔１をシャイニー面
で、ガラス・エポキシ樹脂の基材２の上下の両面に接着
したこと以外は、実施例１と同様にして、内層用プリン
ト配線板を得た。(Comparative Example 1) In Example 1, instead of the DT foil, the surface roughness (Rz) of the shiny surface was 2.8μ.
The copper foil 1 which is a single-sided roughened copper foil (hereinafter referred to as ST foil) having a m-side roughened surface of 18.8 μm was adhered to the upper and lower surfaces of the glass / epoxy resin base material 2 with the shiny surface. An inner layer printed wiring board was obtained in the same manner as in Example 1 except for the above.
【００２５】エッチング精度及び配線パターンの精度
（信号仕上がり精度）を測定し、表１に示した。The etching accuracy and the wiring pattern accuracy (signal finish accuracy) were measured and shown in Table 1.
【００２６】[0026]
【表１】 [Table 1]
【００２７】なお、前記測定は、下記の方法で行った。 （エッチング精度）：サンプル数１０で両面すなわち、
ｎ＝２０で、面内での上面１ｊの所定（設計値）の信号
幅と得られた内層回路１ｐの上面１ｊの信号幅との差で
あるエッチングのばらつきを測定し、平均値、最大値、
最小値及び不偏分散の平方根を算出した。 （配線パターンの精度）：上面１ｊの所定（設計値）の
信号幅と得られた内層回路１ｐの上面１ｊの信号幅との
差を求め、面内の内層回路１ｐの配線パターンのばらつ
きの最大値、表裏面の配線パターンのばらつきの最大値
を測定した。また、内層回路１ｐの基底面１ｋの幅と上
面１ｊの幅との差の最大値を測定した。The above measurement was carried out by the following method. (Etching accuracy): 10 samples on both sides, that is,
When n = 20, the etching variation, which is the difference between the predetermined (designed value) signal width of the upper surface 1j in the plane and the obtained signal width of the upper surface 1j of the inner layer circuit 1p, is measured, and the average value and the maximum value are measured. ,
The minimum value and the square root of the unbiased variance were calculated. (Accuracy of wiring pattern): The difference between the predetermined (designed value) signal width of the upper surface 1j and the obtained signal width of the upper surface 1j of the inner layer circuit 1p is calculated to find the maximum variation in the wiring pattern of the inner layer circuit 1p in the surface. The maximum value of the variation in the wiring pattern on the front and back surfaces was measured. Further, the maximum value of the difference between the width of the base surface 1k and the width of the upper surface 1j of the inner layer circuit 1p was measured.
【００２８】表１から、実施例は比較例に比べて、エッ
チングばらつきが低減され、配線パターンの精度が良好
な多層プリント配線板が得られることが分かった。It can be seen from Table 1 that the embodiment can provide a multilayer printed wiring board in which the etching variation is reduced and the wiring pattern accuracy is good as compared with the comparative example.
【００２９】[0029]
【発明の効果】本発明の請求項１に係る多層プリント配
線板の製造方法によると、両面粗化銅箔をシャイニー側
粗化面で基材の表面に接着するので、エッチング、パタ
ーニングした場合、銅箔のシャイニー側粗化面が絶縁基
板の中への食い込みが少なく、エッチング液でエッチン
グし易いので、エッチングばらつきが低減されため、配
線パターンの精度が良好な多層プリント配線板が得られ
る。According to the method for manufacturing a multilayer printed wiring board according to the first aspect of the present invention, since the double-sided roughened copper foil is bonded to the surface of the substrate at the shiny side roughened surface, when etching or patterning is performed, Since the shiny side roughened surface of the copper foil does not bite into the insulating substrate easily and is easily etched by the etching solution, the variation in etching is reduced, so that a multilayer printed wiring board having a good wiring pattern accuracy can be obtained.
【００３０】本発明の請求項２に係る多層プリント配線
板の製造方法では、感光性を有するレジストが、厚み５
０〜６０μｍのドライフィルムであるので、表面粗度の
大きい方のマット側粗化面との密着性が良好になるた
め、ドライフィルムのラミネート時に空気が入り難いの
で、エッチングばらつきが低減され、配線パターンの精
度が良好な多層プリント配線板が得られる。In the method for manufacturing a multilayer printed wiring board according to claim 2 of the present invention, the photosensitive resist has a thickness of 5
Since it is a dry film of 0 to 60 μm, it has good adhesion to the roughened surface on the mat side, which has a larger surface roughness, and it is difficult for air to enter when laminating the dry film, so etching variation is reduced and wiring is reduced. A multilayer printed wiring board with good pattern accuracy can be obtained.
【００３１】本発明の請求項３に係る多層プリント配線
板の製造方法では、露光用マスクに、所定のパターン幅
に比べて１００〜１５０μｍ広いパターン幅を形成する
ので、形成したエッチングレジストが大きくなるため、
上面が設定値になるまでの時間が長くかかり、基底面が
十分エッチングされ、基底面の幅が小さくなるので、内
層回路の基底面の幅と上面の幅との差が小さくなり、内
層回路の精度が良くなるため、配線パターンの精度が良
好な多層プリント配線板が得られる。In the method for manufacturing a multilayer printed wiring board according to the third aspect of the present invention, since the pattern width of 100 to 150 μm wider than the predetermined pattern width is formed on the exposure mask, the formed etching resist becomes large. For,
It takes a long time for the top surface to reach the set value, the base surface is sufficiently etched, and the width of the base surface becomes small.Therefore, the difference between the width of the base surface of the inner layer circuit and the width of the top surface becomes small, and Since the accuracy is improved, a multilayer printed wiring board having a good wiring pattern accuracy can be obtained.
【図１】本発明に係るプリント配線板の製造方法の第１
実施例を示す断面図である。FIG. 1 is a first method of manufacturing a printed wiring board according to the present invention.
It is sectional drawing which shows an Example.
１ 銅箔 １ｍ マット側粗化面 １ｓ シャイニー側粗化面 １ｐ 内層回路 ２ 基材 1 Copper foil 1m Matte roughened surface 1s Shiny side roughened surface 1p Inner layer circuit 2 Base material
Claims (3)
に厚み７０μｍ以上の銅箔（１）を接着し、この銅箔
（１）の表面に感光性を有するレジストを形成するとと
もに、露光用マスクを介して光を照射し、レジストを露
光、現像してエッチングレジストを形成し、露出した銅
箔（１）をエッチングした後、エッチングレジストを剥
離して内層回路（１ｐ）を形成するプリント配線板の製
造方法において、前記銅箔（１）が一方の面に表面粗度
が３〜６μｍのシャイニー側粗化面（１ｓ）を有し、他
方の面に前記シャイニー側粗化面（１ｓ）の表面粗度よ
り大きいマット側粗化面（１ｍ）を有する両面粗化銅箔
であり、この両面粗化銅箔をシャイニー側粗化面（１
ｓ）で前記基材（２）の表面に接着することを特徴とす
る多層プリント配線板の製造方法。1. A copper foil (1) having a thickness of 70 μm or more is adhered to the surface of a base material (2) having an insulating inner layer, and a resist having photosensitivity is formed on the surface of the copper foil (1). After irradiating light through the exposure mask, the resist is exposed and developed to form an etching resist, the exposed copper foil (1) is etched, and then the etching resist is peeled off to form an inner layer circuit (1p). In the method for producing a printed wiring board according to claim 1, the copper foil (1) has a shiny side roughened surface (1s) having a surface roughness of 3 to 6 μm on one surface and the shiny side roughened surface on the other side. A double-sided roughened copper foil having a matte-side roughened surface (1 m) larger than the surface roughness of (1 s).
The method for producing a multilayer printed wiring board, comprising adhering to the surface of the base material (2) in step s).
０〜６０μｍのドライフィルムであることを特徴とする
請求項１記載の多層プリント配線板の製造方法。2. The photosensitive resist has a thickness of 5
The method for producing a multilayer printed wiring board according to claim 1, which is a dry film having a thickness of 0 to 60 μm.
に比べて１００〜１５０μｍ広いパターン幅を形成する
ことを特徴とする請求項１又は請求項２記載の多層プリ
ント配線板の製造方法。3. The method for manufacturing a multilayer printed wiring board according to claim 1, wherein a pattern width wider than the predetermined pattern width by 100 to 150 μm is formed on the exposure mask.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3980795A JPH08236939A (en) | 1995-02-28 | 1995-02-28 | Manufacture of multilayered printed wiring board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3980795A JPH08236939A (en) | 1995-02-28 | 1995-02-28 | Manufacture of multilayered printed wiring board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH08236939A true JPH08236939A (en) | 1996-09-13 |
Family
ID=12563240
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3980795A Pending JPH08236939A (en) | 1995-02-28 | 1995-02-28 | Manufacture of multilayered printed wiring board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH08236939A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2010067941A (en) * | 2008-09-08 | 2010-03-25 | Samsung Electro-Mechanics Co Ltd | Printed-circuit board and method of manufacturing the same |
| JP2010135734A (en) * | 2008-12-03 | 2010-06-17 | Samsung Electro-Mechanics Co Ltd | Method of manufacturing printed-circuit board |
| KR101314712B1 (en) * | 2012-03-21 | 2013-10-07 | 주식회사 심텍 | Thin PCB substrate having via layer and method of manufacturing the same |
-
1995
- 1995-02-28 JP JP3980795A patent/JPH08236939A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2010067941A (en) * | 2008-09-08 | 2010-03-25 | Samsung Electro-Mechanics Co Ltd | Printed-circuit board and method of manufacturing the same |
| JP2010135734A (en) * | 2008-12-03 | 2010-06-17 | Samsung Electro-Mechanics Co Ltd | Method of manufacturing printed-circuit board |
| KR101314712B1 (en) * | 2012-03-21 | 2013-10-07 | 주식회사 심텍 | Thin PCB substrate having via layer and method of manufacturing the same |
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