JPH077243A - Bonding pad for printed wiring board and electroless gold plating method for conductor pattern - Google Patents

Bonding pad for printed wiring board and electroless gold plating method for conductor pattern

Info

Publication number
JPH077243A
JPH077243A JP5214316A JP21431693A JPH077243A JP H077243 A JPH077243 A JP H077243A JP 5214316 A JP5214316 A JP 5214316A JP 21431693 A JP21431693 A JP 21431693A JP H077243 A JPH077243 A JP H077243A
Authority
JP
Japan
Prior art keywords
plating
gold
electroless
film
gold plating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5214316A
Other languages
Japanese (ja)
Other versions
JP3353960B2 (en
Inventor
Yasuhiro Okuda
泰啓 奥田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ibiden Co Ltd
Original Assignee
Ibiden Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibiden Co Ltd filed Critical Ibiden Co Ltd
Priority to JP21431693A priority Critical patent/JP3353960B2/en
Publication of JPH077243A publication Critical patent/JPH077243A/en
Application granted granted Critical
Publication of JP3353960B2 publication Critical patent/JP3353960B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01004—Beryllium [Be]
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    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01015—Phosphorus [P]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01019—Potassium [K]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01028—Nickel [Ni]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1515—Shape
    • H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/15165—Monolayer substrate
    • H—ELECTRICITY
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/156—Material
    • H01L2924/157—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2924/15738—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950 C and less than 1550 C
    • H01L2924/15747—Copper [Cu] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/156—Material
    • H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/09—Use of materials for the conductive, e.g. metallic pattern
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/24—Reinforcing the conductive pattern
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3452—Solder masks
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4007—Surface contacts, e.g. bumps

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Chemically Coating (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE:To provide a bonding pad for a printed wiring board and a method for forming a gold conductor pattern by electroless plating which has excellent bondability of a gold wire and a low manufacturing cost. CONSTITUTION:An area unnecessary for gold plating of a conductor pattern 4 formed on a surface of a board 2 is coated with a solder resist 6. An amorphous first electroless nickel film 7 is formed on the pattern 4 not coated with the resist 6 by electroless nickel plating. Then, a crystalline second electroless nickel film 8 containing 3-8% of phosphorus content is formed on a surface of the film 7 by electroless nickel plating. Thereafter, an electroless gold plating film 9 is formed on a surface of the film 8 by electroless gold plating in which substitution reaction is the main reaction.

Description

【発明の詳細な説明】Detailed Description of the Invention

【０００１】[0001]

【産業上の利用分野】本発明はプリント配線板のボンデ
ィングパッド及び導体パターンの無電解金メッキ方法に
関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for electroless gold plating on a bonding pad and a conductor pattern of a printed wiring board.

【０００２】[0002]

【従来の技術】プリント配線板においてはエッジコネク
タ、パッド、ボンディングパッド及びスルーホール等を
構成する導体パターンには接触抵抗を減らしたり、ボン
ディングの接続性を高めるために金メッキが施される。
金メッキの方法として、一般には電解メッキによる方法
が行われている。金メッキは銅の導体パターンの上に直
接行われるのではなく、まずニッケルメッキが施され、
ニッケルメッキ膜の上に金メッキが施される。具体的に
は、ワット浴又はスルファミン酸ニッケル浴を使用して
銅の導体パターン上にニッケルの電解メッキを行った
後、ニッケルメッキ膜上に電解メッキにより９９．９％
以上の純度の金を析出させる。2. Description of the Related Art In a printed wiring board, a conductor pattern forming an edge connector, a pad, a bonding pad, a through hole and the like is plated with gold in order to reduce contact resistance and improve bonding connectivity.
As a gold plating method, an electrolytic plating method is generally used. Gold plating is not done directly on the copper conductor pattern, but first nickel plated,
Gold plating is applied on the nickel plating film. Specifically, a watt bath or a nickel sulfamate bath is used to perform electrolytic plating of nickel on the copper conductor pattern, and then 99.9% by electrolytic plating on the nickel plated film.
Gold of the above purity is deposited.

【０００３】電解メッキ法ではメッキが必要なパターン
には電流を供給するため、メッキリード用パターンが接
続されていなければならない。しかし、近年、電子機
器、コンピュータ部品等の軽薄短小化に伴い、プリント
配線板も高密度実装化、ファインパターン化が進み、メ
ッキリード用パターンを設けるスペースを確保すること
が困難となってきた。又、電解メッキ（特にニッケル）
の厚みのバラツキが大きく、ファインパターン部のメッ
キが厚くなった場合、隣接するパターンとショートする
可能性がある。又、特に通信分野で使用されるプリント
配線板では、メッキリードがノイズ発生源となって、ト
ラブルを引き起こす場合がある。In the electroplating method, since a current is supplied to a pattern that requires plating, a plating lead pattern must be connected. However, in recent years, as electronic devices, computer parts, and the like have become lighter, thinner, and smaller, the printed wiring boards have also been highly densely mounted and have fine patterns, and it has become difficult to secure a space for providing a plating lead pattern. Also, electrolytic plating (especially nickel)
If the thickness of the fine pattern is large and the fine pattern part is thickly plated, there is a possibility of short-circuiting with the adjacent pattern. Further, in the case of a printed wiring board used especially in the field of communication, the plating lead may become a noise source and cause a trouble.

【０００４】そこで、メッキリード用パターンが不要
で、形成される皮膜の厚みの均一性に優れた無電解メッ
キ法が注目され、実施されている。金の無電解メッキ浴
には「置換型」と「還元型」とがあるが、従来、厚付け
（膜厚０．３μｍ以上）可能な無電解金メッキは「還元
型」である。この方法では、次亜りん酸ナトリウム等を
還元剤とした無電解ニッケルメッキにより、８〜１２％
のリンを含有するニッケル皮膜を形成し、その皮膜上に
無電解金メッキを施す。無電解金メッキは、まずニッケ
ル皮膜上に置換反応によって厚さ０．０５μｍ程度の薄
付け金メッキを施し、さらにその上に有機化ホウ素（ジ
メチルアミノボラン）等の還元剤を使用した強アルカリ
性（ｐＨ１２以上）のメッキ浴にて厚さ０．３〜０．５
μｍ以上の金メッキ膜を形成する。Therefore, an electroless plating method, which does not require a plating lead pattern and is excellent in the uniformity of the thickness of the film to be formed, has been attracting attention and implemented. There are two types of gold electroless plating baths, "replacement type" and "reduction type". Conventionally, electroless gold plating that can be thickened (thickness 0.3 μm or more) is "reduction type". In this method, 8-12% is obtained by electroless nickel plating using sodium hypophosphite as a reducing agent.
Forming a nickel coating containing phosphorus and electroless gold plating on the coating. In electroless gold plating, a nickel film is first applied with a thin gold plating with a thickness of about 0.05 μm by a substitution reaction, and then a strong alkaline (pH 12 or more) using a reducing agent such as organic boron (dimethylaminoborane). ) Plating bath thickness 0.3-0.5
A gold plating film with a thickness of μm or more is formed.

【０００５】[0005]

【発明が解決しようとする課題】プリント配線板には溶
融半田が不要箇所に付着するのを防止するため、あるい
は導体パターンの絶縁性を確保するためにソルダーレジ
ストが施される。そして、電解金メッキの場合はソルダ
ーレジスト膜がメッキレジストの役割を果たすことがで
きるため、電解金メッキの前にプリント配線板の表面に
ソルダーレジスト膜が形成される。しかし、従来のソル
ダーレジストは前記無電解還元型の金メッキに使用され
る強アルカリ性のメッキ浴に対してはもたない。従っ
て、無電解金メッキを行う場合、導体パターン形成後の
工程順は、無電解ニッケルメッキ→無電解置換型薄付け
金メッキ→無電解還元型厚付け金メッキ→ソルダーレジ
スト膜形成であった。The printed wiring board is provided with a solder resist in order to prevent the molten solder from adhering to unnecessary portions or to ensure the insulation of the conductor pattern. In the case of electrolytic gold plating, the solder resist film can play the role of a plating resist, so that the solder resist film is formed on the surface of the printed wiring board before the electrolytic gold plating. However, the conventional solder resist is not suitable for the strongly alkaline plating bath used for the electroless reduction type gold plating. Therefore, when electroless gold plating is performed, the order of steps after the formation of the conductor pattern is electroless nickel plating → electroless substitution type thin gold plating → electroless reduction type thick gold plating → solder resist film formation.

【０００６】ところが、このプロセスでは金メッキが不
要な導体パターン上にも全て金メッキが施され、製造コ
ストが高くなるという問題がある。ソルダーレジストに
は熱硬化型のものと、光硬化型（感光性ソルダーレジス
ト）のものとがある。そして、ファインパターンが形成
されたプリント配線板の場合は、ソルダーレジストとし
て感光性ソルダーレジストが好ましい。この場合、ソル
ダーレジストは導体パターン全面を覆った状態で露光・
現像が行われて、所定の箇所にソルダーレジスト膜が形
成される。その結果、最終的にソルダーレジスト膜で覆
われないボンディングパッドの金表面にソルダーレジス
ト成分が残り、ボンディング性が悪くなるという問題も
ある。However, in this process, there is a problem in that the gold is entirely plated on the conductor pattern which does not require gold plating, and the manufacturing cost becomes high. The solder resist includes a thermosetting type and a photocuring type (photosensitive solder resist). In the case of a printed wiring board having a fine pattern formed thereon, a photosensitive solder resist is preferable as the solder resist. In this case, the solder resist is exposed with the conductor pattern covering the entire surface.
Development is performed to form a solder resist film at a predetermined position. As a result, there is also a problem that the solder resist component remains on the gold surface of the bonding pad that is not finally covered with the solder resist film, and the bondability deteriorates.

【０００７】これらの問題点を解決する方法として中性
型の無電解厚付け金メッキを利用することが考えられ
る。このメッキ浴の場合はソルダーレジストの耐メッキ
性が問題とならず、メッキ工程前にソルダーレジスト膜
を形成することが可能となる。従って、不要な箇所にも
金メッキが施された場合と比較すると、金の使用量が１
／３〜１／５に減少する。又、ボンディングパッドの金
表面が清浄となり、ボンディング性が向上する。As a method for solving these problems, it is possible to use neutral type electroless thick gold plating. In the case of this plating bath, the plating resistance of the solder resist does not pose a problem, and the solder resist film can be formed before the plating process. Therefore, the amount of gold used is 1 compared to the case where unnecessary parts are also plated with gold.
It decreases to / 3 to 1/5. Further, the gold surface of the bonding pad becomes clean, and the bondability is improved.

【０００８】ところが、この中性型無電解金メッキの金
の析出機構は、下地のニッケルとの置換反応を主反応と
しており、下地ニッケル皮膜中のリン含有率により置換
反応の起こり易さが異なる。そして、下地ニッケル皮膜
のリン含有率が８〜１２％で非常に耐蝕性の良好な非結
晶質（無定形質）の皮膜の場合は、置換反応が起こり難
く、通常の製造工程で行われるメッキ時間では金メッキ
膜の厚さが０．２〜０．３μｍ程度しか得られない。Ｉ
Ｃチップに金ワイヤを介して電気的に接続されるボンデ
ィングパッドと金ワイヤとを確実に接続するためには、
金メッキ膜の厚さが少なくとも０．３μｍ以上必要であ
る。従って、金メッキ膜の厚さが０．２〜０．３μｍ程
度しか得られない非結晶質の下地ニッケル皮膜に中性型
無電解金メッキを施したものはワイヤボンディングに支
障を来す。However, the mechanism of gold deposition in the neutral electroless gold plating is mainly the substitution reaction with the underlying nickel, and the easiness of the substitution reaction varies depending on the phosphorus content in the underlying nickel film. Then, in the case of a non-crystalline (amorphous trait) film having a phosphorus content of 8 to 12% of the underlying nickel film and having very good corrosion resistance, the substitution reaction is unlikely to occur, and plating performed in a normal manufacturing process is performed. With time, the thickness of the gold plating film can only be about 0.2 to 0.3 μm. I
In order to securely connect the gold wire and the bonding pad electrically connected to the C chip via the gold wire,
The thickness of the gold plating film must be at least 0.3 μm or more. Therefore, a non-crystalline underlayer nickel film having a thickness of the gold plating film of only about 0.2 to 0.3 μm, which is subjected to neutral electroless gold plating, interferes with wire bonding.

【０００９】一方、ニッケル皮膜のリン含有率を下げる
ことによって置換反応の起き易い結晶質のニッケル皮膜
を得ることができ、この皮膜を下地とした場合は、通常
の製造工程で行われるメッキ時間で厚さが０．５μｍ以
上の金メッキ膜を得ることができる。しかし、ニッケル
皮膜の耐蝕性はリン含有率によって決まるといってもよ
く、それを下げることによって形成された結晶質のニッ
ケル皮膜は結晶質のためピンホールが多い。そして、そ
のピンホールが銅素地まで及んでいる場合は、金メッキ
浴を銅イオンによって汚染したり、そのピンホール部の
金が剥がれて、ボンディングに悪影響を及ぼす危険性が
ある。On the other hand, by lowering the phosphorus content of the nickel film, a crystalline nickel film which is likely to undergo a substitution reaction can be obtained. When this film is used as a base, the plating time required in the usual manufacturing process is used. A gold plating film having a thickness of 0.5 μm or more can be obtained. However, it can be said that the corrosion resistance of the nickel film is determined by the phosphorus content, and the crystalline nickel film formed by lowering it has many pinholes because it is crystalline. When the pinhole extends to the copper base, there is a risk that the gold plating bath may be contaminated with copper ions or the gold in the pinhole portion may be peeled off, which may adversely affect the bonding.

【００１０】本発明は前記の問題点に鑑みてなされたも
のであって、その目的は無電解メッキによる金メッキが
施されるとともに、金ワイヤによるボンディング性にす
ぐれ、かつ製造コストを低くすることができるプリント
配線板のボンディングパッド及び導体パターンの無電解
金メッキ方法を提供することにある。The present invention has been made in view of the above problems, and an object thereof is to perform gold plating by electroless plating, to have excellent bondability with a gold wire, and to reduce the manufacturing cost. (EN) Provided is a method for electroless gold plating of a bonding pad and a conductor pattern of a printed wiring board.

【００１１】[0011]

【課題を解決するための手段】前記の目的を達成するた
め、請求項１に記載の発明では、パッド本体上に非結晶
質の第１の無電解ニッケル皮膜が形成され、その上に結
晶質の第２の無電解ニッケル皮膜が形成され、さらにそ
の上に置換反応を主反応とする無電解金メッキ膜が形成
されている。In order to achieve the above-mentioned object, according to the invention of claim 1, an amorphous first electroless nickel film is formed on a pad body, and a crystalline material is formed thereon. Second electroless nickel film is further formed thereon, and an electroless gold plating film having a substitution reaction as a main reaction is further formed thereon.

【００１２】前記第２の無電解ニッケル皮膜のリン含有
率は３〜７％が好ましい。又、請求項３に記載の発明で
は、プリント配線板表面に形成された導体パターンの金
メッキが不要な箇所をソルダーレジストで被覆した後、
無電解ニッケルメッキにより非結晶質の第１の無電解ニ
ッケル皮膜を形成し、次に無電解ニッケルメッキにより
前記第１の無電解ニッケル皮膜の表面に結晶質の第２の
無電解ニッケル皮膜を形成した後、置換反応を主反応と
する無電解金メッキにより前記第２の無電解ニッケル皮
膜の表面に無電解金メッキ膜を形成するようにした。The phosphorus content of the second electroless nickel coating is preferably 3 to 7%. Further, in the invention according to claim 3, after coating a portion of the conductor pattern formed on the surface of the printed wiring board where gold plating is unnecessary, with a solder resist,
An amorphous first electroless nickel coating is formed by electroless nickel plating, and then a crystalline second electroless nickel coating is formed on the surface of the first electroless nickel coating by electroless nickel plating. After that, an electroless gold plating film was formed on the surface of the second electroless nickel film by electroless gold plating with a substitution reaction as a main reaction.

【００１３】[0013]

【作用】金メッキ下地の無電解ニッケル皮膜は次亜リン
酸を還元剤とした無電解メッキで形成され、皮膜中には
数％のリンが共析する。このリンの含有率がニッケル皮
膜の結晶構造を左右し、リンの含有率がほぼ８％を境に
してそれより少ない場合は結晶質となり、多い場合は非
結晶質（無定形質）となる。結晶質の状態をより詳しく
分けると、リンの含有率がほぼ５％を境にしてそれより
少ない場合は結晶質、５〜８％では微結晶質となる。し
かし、以下、本発明では微結晶質をも含めて結晶質と表
現する。Function: The electroless nickel coating on the gold-plating base is formed by electroless plating using hypophosphorous acid as a reducing agent, and several percent of phosphorus is codeposited in the coating. The phosphorus content affects the crystal structure of the nickel film, and when the phosphorus content is less than about 8%, it becomes crystalline, and when it is large, it becomes amorphous (amorphous trait). When the crystalline state is divided in more detail, when the phosphorus content is about 5% as a boundary, it becomes crystalline when it is less than 5%, and when it is 5-8%, it becomes microcrystalline. However, hereinafter, in the present invention, it is expressed as crystalline including microcrystalline.

【００１４】本発明で用いる無電解金メッキ浴は置換反
応を主反応としており、その析出機構は下地ニッケルを
溶出させてイオン化したニッケルと置き換わることによ
り金が析出するものである。よって、ニッケルの溶出の
し易さがそのまま金の析出厚みに影響し、下地ニッケル
は結晶質であることが必要である。The electroless gold plating bath used in the present invention has a substitution reaction as a main reaction, and its deposition mechanism is that gold is deposited by leaching the nickel underlayer and replacing it with ionized nickel. Therefore, the easiness of nickel elution directly affects the gold deposition thickness, and the underlying nickel needs to be crystalline.

【００１５】導体パターン上に形成された第１の無電解
ニッケル皮膜は、非結晶質のためピンホールが非常に少
ない。その上に形成された第２の無電解ニッケル皮膜は
結晶質のため置換型無電解金メッキの際に金との置換反
応が起こり易い。無電解金メッキは第２の無電解ニッケ
ル皮膜に対して行われるため、置換反応が起こり易く、
厚さ０．５μｍ以上の金メッキ膜が形成される。第２の
無電解ニッケル皮膜は結晶質のため第１の無電解ニッケ
ル皮膜に比較してピンホールが多い。従って、第２の無
電解ニッケル皮膜のみが下地メッキとして導体パターン
に形成され状態で金メッキを行うと、導体パターンまで
至るピンホールを介して銅が金メッキ浴中に溶出する。
その結果、金メッキ浴が汚染されて浴寿命が短くなるだ
けでなく、ピンホールと対応する部分のニッケルと金と
の密着性が阻害される。Since the first electroless nickel film formed on the conductor pattern is amorphous, it has very few pinholes. Since the second electroless nickel film formed thereon is crystalline, a substitution reaction with gold is likely to occur during substitution type electroless gold plating. Since the electroless gold plating is performed on the second electroless nickel film, the substitution reaction easily occurs,
A gold-plated film having a thickness of 0.5 μm or more is formed. Since the second electroless nickel coating is crystalline, it has more pinholes than the first electroless nickel coating. Therefore, when gold plating is performed with only the second electroless nickel coating formed on the conductor pattern as the base plating, copper is eluted into the gold plating bath through the pinhole reaching the conductor pattern.
As a result, not only the gold plating bath is contaminated and the life of the bath is shortened, but also the adhesion between nickel and gold in the portion corresponding to the pinhole is hindered.

【００１６】しかし、導体パターンと第２の無電解ニッ
ケル皮膜との間に、ピンホールが非常に少ない非結晶質
の第１の無電解ニッケル皮膜が存在するため、その皮膜
が銅の溶出を抑制するバリア層としての役割を果たす。
従って、浴寿命が短くなることが防止されるとともに、
第２の無電解ニッケル皮膜の上に電解金メッキと同等の
良好なボンディング特性を有する金メッキ膜が形成され
る。However, since the amorphous first electroless nickel film having very few pinholes exists between the conductor pattern and the second electroless nickel film, the film suppresses the elution of copper. Plays a role as a barrier layer.
Therefore, while shortening the bath life is prevented,
On the second electroless nickel coating, a gold plating film having good bonding characteristics equivalent to electrolytic gold plating is formed.

【００１７】ニッケル皮膜はリン含有率が高い程、耐腐
食性が優れ、ピンホールも少ない。一方、あまりリン含
有率が低すぎると、厚付け金メッキ時の置換反応が強す
ぎて密着不良を起こす。無電解金メッキの下地となる第
２の無電解ニッケル皮膜のリン含有率を３〜７％とする
と、ピンホールが比較的少なく、厚付け金メッキ時のの
置換反応が適度の早さで進行し、金メッキとニッケル下
地との密着性が良好となる。The higher the phosphorus content of the nickel coating, the better the corrosion resistance and the fewer pinholes. On the other hand, if the phosphorus content is too low, the substitution reaction at the time of thick gold plating is too strong, resulting in poor adhesion. When the phosphorus content of the second electroless nickel film, which is the base of electroless gold plating, is 3 to 7%, the number of pinholes is relatively small, and the substitution reaction at the time of thick gold plating proceeds at an appropriate speed. Good adhesion between the gold plating and the nickel underlayer.

【００１８】置換反応を主反応とする無電解金メッキに
使用するメッキ浴は強アルカリ性ではないため、メッキ
工程の前にプリント配線板にソルダーレジスト膜が形成
され、必要箇所にのみ金メッキが施される。Since the plating bath used for electroless gold plating whose main reaction is the substitution reaction is not strongly alkaline, a solder resist film is formed on the printed wiring board before the plating step, and gold plating is applied only to the necessary portions. .

【００１９】[0019]

【実施例】以下、本発明を具体化した一実施例を図面に
従って説明する。図２に示すように、プリント配線板１
の基板２上にはＩＣチップ（図示せず）を搭載するため
の電子部品実装凹部３が形成されている。導体パターン
４はその先端に形成されたボンディングパッド５が電子
部品実装凹部３の周囲に所定間隔で配置された状態に形
成されている。ボンディングパッド５はＩＣチップと金
線を介して電気的に接続される。基板２の表面は電子部
品実装凹部３及びボンディングパッド５が露出する状態
で、ソルダーレジスト６により被覆されている。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT An embodiment of the present invention will be described below with reference to the drawings. As shown in FIG. 2, the printed wiring board 1
An electronic component mounting recess 3 for mounting an IC chip (not shown) is formed on the substrate 2. The conductor pattern 4 is formed such that the bonding pads 5 formed at the tip thereof are arranged around the electronic component mounting recess 3 at a predetermined interval. The bonding pad 5 is electrically connected to the IC chip via a gold wire. The surface of the substrate 2 is covered with a solder resist 6 in a state where the electronic component mounting recess 3 and the bonding pad 5 are exposed.

【００２０】図１に示すように、ボンディングパッド５
のパッド本体５ａは導体パターン４と一体に銅で形成さ
れ、その表面に非結晶質の第１の無電解ニッケル皮膜７
が形成されている。第１の無電解ニッケル皮膜７の上に
は結晶質の第２の無電解ニッケル皮膜８が形成され、そ
の上に置換反応を主反応とする無電解金メッキ膜９が形
成されている。第１の無電解ニッケル皮膜７のリン含有
率は８〜１２％で、第２の無電解ニッケル皮膜８のリン
含有率は３〜７％となっている。パッド本体５ａの厚さ
は２０〜３０μｍ、第１の無電解ニッケル皮膜７の厚さ
は２〜５μｍ、第２の無電解ニッケル皮膜８の厚さは１
〜４μｍ、無電解金メッキ膜９の厚さは０．５μｍ以上
となっている。As shown in FIG. 1, the bonding pad 5
The pad main body 5a is formed of copper integrally with the conductor pattern 4, and has a non-crystalline first electroless nickel coating 7 on its surface.
Are formed. A crystalline second electroless nickel film 8 is formed on the first electroless nickel film 7, and an electroless gold plating film 9 whose substitution reaction is the main reaction is formed on the second electroless nickel film 8. The phosphorus content of the first electroless nickel coating 7 is 8 to 12%, and the phosphorus content of the second electroless nickel coating 8 is 3 to 7%. The thickness of the pad body 5a is 20 to 30 μm, the thickness of the first electroless nickel coating 7 is 2 to 5 μm, and the thickness of the second electroless nickel coating 8 is 1
˜4 μm, and the thickness of the electroless gold plating film 9 is 0.5 μm or more.

【００２１】このプリント配線板１は電子部品実装凹部
３にＩＣチップが実装され、ワイヤボンディングにより
ＩＣチップとボンディングパッド５とが金ワイヤで電気
的に接続される。無電解金メッキ膜９の厚さが０．５μ
ｍ以上あるため、ワイヤボンディングが確実に行われ
る。In this printed wiring board 1, an IC chip is mounted in the electronic component mounting recess 3, and the IC chip and the bonding pad 5 are electrically connected by a gold wire by wire bonding. The thickness of electroless gold plating film 9 is 0.5μ
Since it is m or more, wire bonding is reliably performed.

【００２２】次に前記プリント配線板１の製造方法を説
明する。基板２上にサブトラクティブ法により導体パタ
ーン４を形成する。次にアルカリ現像型の感光性ソルダ
ーレジストを使用して、ニッケル・金メッキが必要なパ
ッド本体５ａ以外のエリアにソルダーレジスト膜を形成
する。次にソルダーレジスト６で被覆されていない導体
パターン４に脱脂、ソフトエッチング、触媒処理などの
前処理を施す。その後、析出ニッケル皮膜中のリン含有
率が８％以上となる条件で無電解ニッケルメッキを行
い、導体パターン４上に２〜５μｍの厚さにニッケル皮
膜を析出させる。この処理により導体パターン４上に非
結晶質の第１の無電解ニッケル皮膜７が形成される。次
に析出ニッケル皮膜中のリン含有率が３〜７％となる条
件で無電解ニッケルメッキを行い、第１の無電解ニッケ
ル皮膜７上に１〜４μｍの厚さにニッケル皮膜を析出さ
せる。この処理により結晶質の第２の無電解ニッケル皮
膜８が形成される。メッキ浴には次亜リン酸塩還元浴を
使用した。Next, a method of manufacturing the printed wiring board 1 will be described. The conductor pattern 4 is formed on the substrate 2 by the subtractive method. Next, an alkali developing type photosensitive solder resist is used to form a solder resist film on the areas other than the pad body 5a where nickel / gold plating is required. Next, the conductor pattern 4 not covered with the solder resist 6 is subjected to pretreatments such as degreasing, soft etching and catalytic treatment. Then, electroless nickel plating is performed under the condition that the phosphorus content in the deposited nickel film is 8% or more, and the nickel film is deposited on the conductor pattern 4 to a thickness of 2 to 5 μm. By this treatment, the amorphous first electroless nickel coating 7 is formed on the conductor pattern 4. Next, electroless nickel plating is performed under the condition that the phosphorus content in the deposited nickel film is 3 to 7%, and a nickel film is deposited on the first electroless nickel film 7 to a thickness of 1 to 4 μm. By this treatment, the crystalline second electroless nickel film 8 is formed. A hypophosphite reducing bath was used as the plating bath.

【００２３】次に無電解置換型薄付け（フラッシュ）金
メッキで厚さ０．０５μｍ程度の金メッキ膜を第２の無
電解ニッケル皮膜８上に形成し、その上に無電解置換型
厚付け金メッキで厚さ０．５μｍ以上の無電解金メッキ
膜９を形成する。無電解置換型金メッキのメッキ浴は中
性に近く、ソルダーレジストがメッキ浴中に浸漬されて
もメッキ浴に侵されない。Next, a gold plating film having a thickness of about 0.05 μm is formed on the second electroless nickel coating 8 by electroless displacement type thinning (flash) gold plating, and electroless displacement type thickening gold plating is formed thereon. An electroless gold plating film 9 having a thickness of 0.5 μm or more is formed. The plating bath of electroless displacement type gold plating is close to neutrality, and even if the solder resist is immersed in the plating bath, it is not attacked by the plating bath.

【００２４】無電解金メッキは置換反応が起き易い結晶
質の第２の無電解ニッケル皮膜８上に施されるため、
０．５μｍ以上の厚さの無電解金メッキ膜９が得られ
る。結晶質の第２の無電解ニッケル皮膜８は第１の無電
解ニッケル皮膜７に比較してピンホールが多く、下地が
結晶質の第２の無電解ニッケル皮膜８だけの場合は、ピ
ンホールを介して金メッキ浴中に導体パターン４の銅が
溶出する。無電解厚付け金メッキ浴は銅イオンの汚染に
敏感で、数十ｐｐｍ混入するとメッキ浴が不安定となり
分解してしまう。しかし、第２の無電解ニッケル皮膜８
の下に存在する非結晶質の第１の無電解ニッケル皮膜７
がバリア層として働き、導体パターン４から金メッキ浴
中への銅イオンの溶出が抑制される。従って、金メッキ
浴の寿命が伸び、２倍以上にすることができた。Since the electroless gold plating is applied on the crystalline second electroless nickel film 8 where the substitution reaction easily occurs,
An electroless gold plating film 9 having a thickness of 0.5 μm or more can be obtained. The crystalline second electroless nickel film 8 has more pinholes than the first electroless nickel film 7. When the ground is only the crystalline second electroless nickel film 8, pinholes are formed. The copper of the conductor pattern 4 elutes in the gold plating bath through. The electroless thick gold plating bath is sensitive to copper ion contamination, and if tens of ppm is mixed, the plating bath becomes unstable and decomposes. However, the second electroless nickel coating 8
Amorphous first electroless nickel coating 7 present underneath
Acts as a barrier layer, and the elution of copper ions from the conductor pattern 4 into the gold plating bath is suppressed. Therefore, the life of the gold plating bath was extended and could be more than doubled.

【００２５】無電解金メッキ浴はシアン化金カリウムを
ベースとした中性浴である。置換型厚付け金メッキ浴
は、シアン化金カリウムをベースとした中性浴に還元型
金メッキに使用する若干の還元剤を添加したものであ
る。The electroless gold plating bath is a neutral bath based on potassium gold cyanide. The displacement type thickening gold plating bath is a neutral bath based on potassium gold cyanide to which a small amount of a reducing agent used for reducing gold plating is added.

【００２６】又、ピンホールに浸透したメッキ浴中に導
体パターン４の銅が溶出すると、その部分のニッケルと
金の密着性が阻害され、ワイヤボンディング時の接合部
にあたった場合は、ワイヤ剥がれを引き起こす。しか
し、ピンホールが非常に少ない非結晶質の第１の無電解
ニッケル皮膜７の存在により、そのようなことがなくな
りニッケルと金との良好な密着性を得ることができた。Further, when the copper of the conductor pattern 4 elutes in the plating bath which has penetrated into the pinhole, the adhesion between nickel and gold in the portion is impeded, and the wire is peeled off when it hits the joint portion during wire bonding. cause. However, due to the presence of the amorphous first electroless nickel coating 7 having very few pinholes, such a situation was eliminated, and good adhesion between nickel and gold could be obtained.

【００２７】そして、次の各条件で形成したボンディン
グパッド５に直径２５μｍの金ワイヤを使用してワイヤ
ボンディングを行い、図３に示すようにその金ワイヤ１
０に矢印方向の引っ張り力を加える破断試験を行った。Then, wire bonding was performed on the bonding pad 5 formed under the following conditions using a gold wire having a diameter of 25 μm, and the gold wire 1 was formed as shown in FIG.
A rupture test in which a tensile force in the direction of the arrow is applied to 0 was performed.

【００２８】 第１の無電解ニッケル皮膜 メッキ浴温度：８５℃、ｐＨ：４．５、メッキ時間：２
０分 メッキ厚：４μｍ、リン含有率：９％ 第２の無電解ニッケル皮膜 メッキ浴温度：８５℃、ｐＨ：５．５、メッキ時間：１
５分 メッキ厚：３μｍ、リン含有率：５％ 置換型薄付け金メッキ メッキ浴温度：９０℃、ｐＨ：６．５、メッキ時間：１
０分 メッキ厚：０．０５μｍ 置換型厚付け金メッキ メッキ浴温度：９０℃、ｐＨ：６．０、メッキ時間：３
０分 メッキ厚：０．７μｍ １００本の金ワイヤについて試験を行った結果、平均引
っ張り強度は８．３１ｇ、最大引っ張り強度は１０．２
０ｇ、最低引っ張り強度は５．６５ｇであった。そし
て、破断状況を観察した結果、破断はいずれも金ワイヤ
１０の部分で発生し、金ワイヤとボンディングパッド５
との接着面及び金ワイヤとＩＣチップ１１のパッドとの
接着面からの剥離はなかった。又、置換型厚付け金メッ
キでメッキ厚を０．３μｍ（メッキ時間２０分）とした
場合についても同様の試験を行ったが、メッキ厚０．７
μｍの場合と同等の特性が得られた。First electroless nickel coating plating bath temperature: 85 ° C., pH: 4.5, plating time: 2
0 minutes Plating thickness: 4 μm, phosphorus content: 9% Second electroless nickel coating Plating bath temperature: 85 ° C., pH: 5.5, Plating time: 1
5 minutes Plating thickness: 3 μm, Phosphorus content: 5% Substitution type thin gold plating Plating bath temperature: 90 ° C., pH: 6.5, Plating time: 1
0 minutes Plating thickness: 0.05 μm Substitution type thick gold plating Plating bath temperature: 90 ° C., pH: 6.0, Plating time: 3
0 minutes Plating thickness: 0.7 μm As a result of testing 100 gold wires, the average tensile strength was 8.31 g and the maximum tensile strength was 10.2.
The tensile strength was 0 g and the minimum tensile strength was 5.65 g. Then, as a result of observing the fracture state, the fractures occurred in the gold wire 10 portion, and the gold wire and the bonding pad 5
There was no peeling from the bonding surface of the gold wire and the bonding surface of the gold wire and the pad of the IC chip 11. Further, the same test was conducted when the plating thickness was 0.3 μm (plating time was 20 minutes) by the substitution type thick gold plating.
The same characteristics as in the case of μm were obtained.

【００２９】又、次の各条件で形成したボンディングパ
ッドについて、オージエ分析機により元素分析を行っ
た。その結果、表層において金以外の元素は認められ
ず、析出した金は純金であることが確認された。The bonding pads formed under the following conditions were subjected to elemental analysis by an Auger analyzer. As a result, no element other than gold was observed in the surface layer, and it was confirmed that the precipitated gold was pure gold.

【００３０】 第１の無電解ニッケル皮膜 メッキ浴温度：８５℃、ｐＨ：４．５、メッキ時間：１
５分 メッキ厚：３μｍ、リン含有率：９％ 第２の無電解ニッケル皮膜 メッキ浴温度：９０℃、ｐＨ：５．０、メッキ時間：１
０分 メッキ厚：３μｍ、リン含有率：５％ 置換型薄付け金メッキ メッキ浴温度：９０℃、ｐＨ：６．５、メッキ時間：１
０分 メッキ厚：０．０５μｍ 置換型厚付け金メッキ メッキ浴温度：９０℃、ｐＨ：６．０、メッキ時間：３
０分 メッキ厚：０．７μｍ 又、第２の無電解ニッケル皮膜のリン含有率を変えて、
置換型厚付け金メッキのメッキ時間と析出した金の厚み
との関係を求めた。結果を図４に示す。なお、置換型厚
付け金メッキの条件は、メッキ浴温度：９０℃、ｐＨ：
６．０で行った。First electroless nickel coating plating bath temperature: 85 ° C., pH: 4.5, plating time: 1
5 minutes Plating thickness: 3 μm, Phosphorus content: 9% Second electroless nickel coating Plating bath temperature: 90 ° C., pH: 5.0, Plating time: 1
0 minutes Plating thickness: 3 μm, Phosphorus content: 5% Substitution type thin gold plating Plating bath temperature: 90 ° C., pH: 6.5, Plating time: 1
0 minutes Plating thickness: 0.05 μm Substitution type thick gold plating Plating bath temperature: 90 ° C., pH: 6.0, Plating time: 3
0 minutes Plating thickness: 0.7 μm Also, by changing the phosphorus content of the second electroless nickel coating,
The relationship between the plating time of the displacement-type thick gold plating and the thickness of the deposited gold was determined. The results are shown in Fig. 4. The conditions of the displacement type thick gold plating are as follows: plating bath temperature: 90 ° C., pH:
It was done at 6.0.

【００３１】図４から析出する金の厚みはメッキ時間に
比例するのではなく、時間の経過に伴って増加の割合が
小さくなる。そして、リン含有率が高い程メッキの速度
は小さく、リン含有率８％では金の厚みがほぼ０．４μ
ｍが上限となり、リン含有率５％では金の厚みがほぼ
０．８μｍ強が上限となった。又、リン含有率２％では
１０分以内で金の厚みがほぼ０．５μｍに達した。The thickness of gold deposited from FIG. 4 is not proportional to the plating time, but the rate of increase becomes smaller with the passage of time. The higher the phosphorus content, the lower the plating rate, and with a phosphorus content of 8%, the gold thickness is approximately 0.4 μm.
m was the upper limit, and when the phosphorus content was 5%, the upper limit was about 0.8 μm in gold thickness. When the phosphorus content was 2%, the gold thickness reached about 0.5 μm within 10 minutes.

【００３２】ボンディングパッドと金ワイヤとを確実に
接続するためには、金メッキ膜の厚さが少なくとも０．
３μｍ以上必要であり、リン含有率８％でも時間をかけ
ればこれを満たすことができる。しかし、金メッキを行
う場合、安全性を見込んで膜厚が０．５μｍ程度となる
条件で行うのが好ましい。リン含有率８％の場合は、こ
の条件を満たすことはできない。In order to securely connect the bonding pad and the gold wire, the thickness of the gold plating film should be at least 0.
It is required to be 3 μm or more, and even if the phosphorus content is 8%, this can be satisfied with time. However, when gold plating is performed, it is preferable that the film thickness be about 0.5 μm in consideration of safety. This condition cannot be satisfied when the phosphorus content is 8%.

【００３３】一方、リン含有率が低ければ、金メッキ膜
の厚さは必要量確保できるが、リン含有率が低すぎる
と、厚付け金メッキ時の置換反応が強すぎて、析出した
金メッキ皮膜と下地のニッケルとの密着不良を起こす。
以上のことから金メッキとの密着性が良好で、しかも所
望の厚さの金メッキ皮膜を得るには、第２の無電解ニッ
ケル皮膜のリン含有率を３〜７％とするのが好ましい。On the other hand, if the phosphorus content is low, the required thickness of the gold plating film can be secured, but if the phosphorus content is too low, the substitution reaction at the time of thick gold plating is too strong, and the deposited gold plating film and the substrate Causes poor adhesion with nickel.
From the above, it is preferable that the second electroless nickel coating has a phosphorus content of 3 to 7% in order to obtain good adhesion to gold plating and to obtain a gold plating coating having a desired thickness.

【００３４】又、置換型厚付け金メッキのメッキ温度を
変えて、メッキ温度と析出した金の厚みとの関係を求め
た。結果を図５に示す。なお、置換型厚付け金メッキの
条件は、メッキ時間：３０分、ｐＨ：６．０で行った。
金メッキの厚みは試験を行ったメッキ温度が７０〜９０
°Ｃ付近の範囲では、温度の上昇に伴って直線的に増加
することが判明した。従って、メッキ浴の温度を１００
°Ｃにすれば、リン含有率８％の場合にも０．５μｍ程
度の厚さの金メッキを得ることが可能となるが、製造工
程でメッキ浴の温度を１００°Ｃに保つのは非常に困難
で、エネルギー消費も増大するため好ましくない。Further, the relationship between the plating temperature and the thickness of the deposited gold was determined by changing the plating temperature of the displacement-type thick gold plating. Results are shown in FIG. The substitution type thick gold plating was carried out at a plating time of 30 minutes and a pH of 6.0.
The thickness of gold plating is 70-90 when the plating temperature is tested.
It was found that in the range around ° C, the temperature increased linearly with increasing temperature. Therefore, the temperature of the plating bath should be 100
If the temperature is set to ° C, it is possible to obtain a gold plating having a thickness of about 0.5 µm even when the phosphorus content is 8%, but it is extremely difficult to keep the temperature of the plating bath at 100 ° C in the manufacturing process. It is difficult and energy consumption increases, which is not preferable.

【００３５】又、第２の無電解ニッケル皮膜のメッキ浴
のｐＨと析出するニッケル皮膜のリン含有率との関係を
求めた。リン含有率はメッキ浴のｐＨにより変化し、メ
ッキ浴のｐＨが大きくなる程、すなわち中性に近づく程
リン含有率が低下する。又、リン含有率はメッキ浴の温
度によっても変化し、同じｐＨの場合は温度が低いほう
がリン含有率が高くなった。Further, the relationship between the pH of the plating bath for the second electroless nickel coating and the phosphorus content of the deposited nickel coating was determined. The phosphorus content varies depending on the pH of the plating bath, and the phosphorus content decreases as the pH of the plating bath increases, that is, as it approaches neutrality. Further, the phosphorus content also changed depending on the temperature of the plating bath, and at the same pH, the lower the temperature, the higher the phosphorus content.

【００３６】なお、本発明は前記実施例に限定されるも
のではなく、無電解ニッケルメッキを弱酸性のメッキ浴
に代えて、弱アルカリ性（ｐＨ：８〜９）のメッキ浴で
行ってもよい。又、ボンディングパッドに限らず、エッ
ジコネクタやスルーホールあるいはチップ部品を搭載す
るパッドの金メッキに適用してもよい。又、導体パター
ン４の形成はサブトラクティブ法に限らずアディティブ
法で行ってもよく、プリント配線板の基板はセラミック
基板であってもよい。The present invention is not limited to the above-mentioned embodiment, and electroless nickel plating may be carried out by a weak alkaline (pH: 8 to 9) plating bath instead of the weakly acidic plating bath. . Further, the invention is not limited to the bonding pad, and may be applied to gold plating of an edge connector, a through hole, or a pad for mounting a chip component. The formation of the conductor pattern 4 is not limited to the subtractive method and may be performed by the additive method, and the substrate of the printed wiring board may be a ceramic substrate.

【００３７】[0037]

【発明の効果】以上詳述したように本発明によれば、公
知のソルダーレジストを使用しても、ソルダーレジスト
がメッキ浴に侵されず、メッキ工程の前にソルダーレジ
ストを施すことにより必要な箇所にのみ金メッキ膜を形
成できる。従って、ソルダーレジスト残渣がボンディン
グパッド上に生じることがなく、ボンディング性が向上
する。又、製造コストを低くすることができる。As described in detail above, according to the present invention, even if a known solder resist is used, the solder resist is not attacked by the plating bath, and it is necessary to apply the solder resist before the plating process. The gold plating film can be formed only on the spot. Therefore, the solder resist residue is not generated on the bonding pad, and the bondability is improved. Further, the manufacturing cost can be reduced.

【００３８】又、第２の無電解ニッケル皮膜のリン含有
率を３〜７％とした場合は、ボンディング性に悪影響を
及ぼさない厚さに金メッキ膜を容易に形成できる。When the phosphorus content of the second electroless nickel coating is 3 to 7%, the gold plating film can be easily formed to a thickness that does not adversely affect the bondability.

【図面の簡単な説明】[Brief description of drawings]

【図１】プリント配線板をボンディングパッドの長手方
向に切断した模式部分断面図である。FIG. 1 is a schematic partial sectional view of a printed wiring board cut in the longitudinal direction of a bonding pad.

【図２】プリント配線板の部分平面図である。FIG. 2 is a partial plan view of a printed wiring board.

【図３】金ワイヤの引っ張り強度試験の状態を示す概略
図である。FIG. 3 is a schematic view showing a state of a tensile strength test of a gold wire.

【図４】置換型厚付け金メッキの金メッキ皮膜の厚み
と、メッキ時間及びニッケル皮膜のリン含有率との関係
を示すグラフである。FIG. 4 is a graph showing the relationship between the thickness of the gold plating film of the displacement-type thick gold plating, the plating time, and the phosphorus content of the nickel film.

【図５】置換型厚付け金メッキの金メッキ皮膜の厚みと
メッキ浴の温度との関係を示すグラフである。FIG. 5 is a graph showing the relationship between the thickness of the gold plating film of the displacement-type thick gold plating and the temperature of the plating bath.

【図６】第２のニッケル皮膜のメッキ浴のｐＨと析出皮
膜のリン含有率との関係を示すグラフである。FIG. 6 is a graph showing the relationship between the pH of the plating bath for the second nickel coating and the phosphorus content of the deposited coating.

【符号の説明】[Explanation of symbols]

１…プリント配線板、２…基板、４…導体パターン、５
…ボンディングパッド、５ａ…パッド本体、６…ソルダ
ーレジスト、７…第１の無電解ニッケル皮膜、８…第２
の無電解ニッケル皮膜、９…無電解金メッキ膜。1 ... Printed wiring board, 2 ... Board, 4 ... Conductor pattern, 5
... bonding pad, 5a ... pad body, 6 ... solder resist, 7 ... first electroless nickel film, 8 ... second
Electroless nickel film, 9 ... Electroless gold plating film.

Claims (3)

【特許請求の範囲】[Claims] 【請求項１】 パッド本体上に非結晶質の第１の無電解
ニッケル皮膜が形成され、その上に結晶質の第２の無電
解ニッケル皮膜が形成され、さらにその上に置換反応を
主反応とする無電解金メッキ膜が形成されたプリント配
線板のボンディングパッド。1. A non-crystalline first electroless nickel coating is formed on a pad body, a crystalline second electroless nickel coating is formed thereon, and a substitution reaction as a main reaction is further formed thereon. A bonding pad for a printed wiring board on which an electroless gold plating film is formed. 【請求項２】 前記第２の無電解ニッケル皮膜のリン含
有率は３〜７％である請求項１に記載のプリント配線板
のボンディングパッド。2. The bonding pad for a printed wiring board according to claim 1, wherein the second electroless nickel coating has a phosphorus content of 3 to 7%. 【請求項３】 プリント配線板表面に形成された導体パ
ターンの金メッキが不要な箇所をソルダーレジストで被
覆した後、無電解ニッケルメッキにより非結晶質の第１
の無電解ニッケル皮膜を形成し、次に無電解ニッケルメ
ッキにより前記第１の無電解ニッケル皮膜の表面に結晶
質の第２の無電解ニッケル皮膜を形成した後、置換反応
を主反応とする無電解金メッキにより前記第２の無電解
ニッケル皮膜の表面に無電解金メッキ膜を形成する導体
パターンの無電解金メッキ方法。3. A non-crystalline first conductive pattern formed on the surface of a printed wiring board is coated with a solder resist on a portion where gold plating is unnecessary, and then electroless nickel plating is performed.
Forming an electroless nickel film, and then forming a crystalline second electroless nickel film on the surface of the first electroless nickel film by electroless nickel plating, and then using a substitution reaction as a main reaction. An electroless gold plating method for a conductor pattern, wherein an electroless gold plating film is formed on the surface of the second electroless nickel coating by electrolytic gold plating.
JP21431693A 1993-04-23 1993-08-30 Electroless gold plating method for bonding pads and conductive patterns on printed wiring boards Expired - Lifetime JP3353960B2 (en)

Priority Applications (1)

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Application Number Priority Date Filing Date Title
JP9818193 1993-04-23
JP5-98181 1993-04-23
JP21431693A JP3353960B2 (en) 1993-04-23 1993-08-30 Electroless gold plating method for bonding pads and conductive patterns on printed wiring boards

Publications (2)

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JPH077243A true JPH077243A (en) 1995-01-10
JP3353960B2 JP3353960B2 (en) 2002-12-09

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DE19639174C5 (en) * 1995-10-23 2009-11-05 C. Uyemura & Co., Ltd. Process for electroless nickel plating
US6358630B1 (en) 1997-06-04 2002-03-19 Ibiden Co., Ltd. Soldering member for printed wiring boards
WO1998056217A1 (en) * 1997-06-04 1998-12-10 Ibiden Co., Ltd. Soldering member for printed wiring boards
US6259161B1 (en) 1999-06-18 2001-07-10 Mitsubishi Denki Kabushiki Kaisha Circuit electrode connected to a pattern formed on an organic substrate and method of forming the same
EP1080823A3 (en) * 1999-09-03 2004-01-21 Nec Corporation High-strength solder joint
US6919137B2 (en) 1999-09-03 2005-07-19 Nec Corporation High-strength solder joint
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JP2005317596A (en) * 2004-04-27 2005-11-10 Kyocera Corp Light emitting device storage package, manufacturing method therefor, light emitting apparatus, and lighting equipment
JP2006206985A (en) * 2005-01-31 2006-08-10 C Uyemura & Co Ltd Electroless nickel-phosphorus plated coating and electroless nickel-phosphorus plating bath
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