JPH07161769A - Method of connecting terminal of chip part - Google Patents
Method of connecting terminal of chip partInfo
- Publication number
- JPH07161769A JPH07161769A JP30842093A JP30842093A JPH07161769A JP H07161769 A JPH07161769 A JP H07161769A JP 30842093 A JP30842093 A JP 30842093A JP 30842093 A JP30842093 A JP 30842093A JP H07161769 A JPH07161769 A JP H07161769A
- Authority
- JP
- Japan
- Prior art keywords
- bumps
- resin
- circuit board
- semiconductor chip
- pads
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
Landscapes
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Wire Bonding (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明はチップ部品特に半導体チ
ップの回路基板への端子接続方法に関する。大量の情報
を迅速に処理する必要から電子部品は小形化が推進され
ており、抵抗器やコンデンサを始めとし、プリント配線
基板に搭載される殆どの部品はチップ化されたものが使
用されているが、特に半導体部品については顕著であ
る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for connecting terminals of a chip component, particularly a semiconductor chip, to a circuit board. Due to the need to process a large amount of information quickly, miniaturization of electronic parts is being promoted, and most parts mounted on printed wiring boards, including resistors and capacitors, are in chip form. However, it is particularly remarkable for semiconductor parts.
【０００２】すなわち、半導体集積回路は単位素子の小
形化による大容量化が行なわれてＬＳＩやＶＬＳＩが実
用化され、更に大容量化が進んでＵＬＳＩが実用化され
つゝあるが、集積回路が形成されている半導体チップの
大きさは最大でも10数mm角とさほど変わっていない。That is, in a semiconductor integrated circuit, the capacity is increased by miniaturizing the unit element to make the LSI or VLSI practical, and further the capacity is further advanced to make the ULSI practical. The size of the semiconductor chip that is formed has not changed so much, even at a maximum of 10's of square mm.
【０００３】一方、半導体装置の外装方法は半導体チッ
プのパッシベーション技術の進歩と共に改良され、ハー
メチックシール構造より樹脂モールドへと変化してお
り、また、セラミック多層回路基板の上に半導体チップ
のまゝで複数個を装着し、このセラミック多層回路基板
を取替え単位としてプリント配線基板などに装着する実
装方法が採られている。On the other hand, the packaging method for semiconductor devices has improved with the progress of semiconductor chip passivation technology, and has changed from a hermetically sealed structure to a resin mold. Moreover, a semiconductor chip is mounted on a ceramic multilayer circuit board. A mounting method has been adopted in which a plurality of ceramic multi-layer circuit boards are mounted and mounted on a printed wiring board or the like as a replacement unit.
【０００４】この場合、半導体チップよりの端子取り出
し法としては半導体チップの周辺に“はんだボール”を
備えた多数のバンプを設けるか、或いは薄膜形成技術と
写真蝕刻技術（フォトリソグラフィ）を用いて金属より
なるバンプを設け、これを回路基板上に予めパターン形
成してあるボンディング・パッドに位置合わせして接合
するフリップチップ接合方法が採られている。In this case, as a method of taking out terminals from the semiconductor chip, a large number of bumps provided with "solder balls" are provided around the semiconductor chip, or a metal is formed by using a thin film forming technique and a photolithography technique (photolithography). A flip-chip bonding method is employed in which bumps made of a metal are provided, and the bumps are aligned and bonded to bonding pads that are pre-patterned on the circuit board.
【０００５】[0005]
【従来の技術】先に記したように半導体チップの回路基
板への装着方法としてはフリップチップ接合方法が用い
られており、“はんだボール”よりなるバンプを回路基
板にパターン形成してあるパッドに位置合わせして接合
し、融着させる方法が一般化しているが、最近では半導
体チップの集積度が向上してバンプ間の繰り返しピッチ
が更に短くなってゆくことゝ、“はんだボール”を溶融
させるのに必要な熱処理による半導体チップの劣化を無
くすなどの見地から、これに代わる接合方法の実用化が
進められている。2. Description of the Related Art As described above, a flip chip bonding method is used as a method for mounting a semiconductor chip on a circuit board, and bumps made of "solder balls" are used for pads formed on the circuit board by patterning. The method of aligning, joining, and fusing is becoming popular, but recently, as the integration density of semiconductor chips improves and the repeating pitch between bumps becomes further shorter, “solder balls” are melted. From the standpoint of eliminating the deterioration of the semiconductor chip due to the heat treatment required for the above, the joining method which is an alternative to this is being put into practical use.
【０００６】すなわち、半導体チップの端子形成位置に
金（Au）などの金属を用いてスタッドバンプを形成し、
このスタッドバンプと回路基板上に形成してあるパッド
とを導電性接着剤を用いて接合する。異方性導電ラ
バーを用いて接合する。などの研究が行なわれている。That is, a stud bump is formed using a metal such as gold (Au) at a terminal forming position of a semiconductor chip,
The stud bump and the pad formed on the circuit board are joined using a conductive adhesive. Join using anisotropic conductive rubber. And so on.
【０００７】こゝで、は金属微粒子を主体とし、樹脂
をバインダとする導電体ペーストを使用するものである
が、抵抗率が比較的に高く、また、接着強度に問題があ
る。また、は銀(Ag)などの金属微粒子を含むシートに
選択的に圧力を加える場合にシートの圧縮によりその位
置の金属微粒子が直列に接触するのを利用し、加熱によ
りラバーを構成する樹脂を硬化させて導通状態を保持す
るのである。然し、バンプの相互間隔が狭い場合にバン
プ相互間で高い絶縁抵抗を保持することは難しいなどの
問題がある。In this case, a conductive paste containing metal fine particles as a main component and a resin as a binder is used, but the resistivity is relatively high and there is a problem in adhesive strength. In addition, when selectively applying pressure to a sheet containing fine metal particles such as silver (Ag), the fact that the fine metal particles at that position come into contact in series due to the compression of the sheet is used to heat the resin that constitutes the rubber. It is cured to maintain the electrical continuity. However, there is a problem that it is difficult to maintain a high insulation resistance between the bumps when the distance between the bumps is small.
【０００８】[0008]
【発明が解決しようとする課題】ＩＣやＬＳＩなどの集
積回路が形成されている半導体チップの回路基板への装
着法としてフリップチップ接合法が採られているが、集
積度が向上してバンプ或いはパッドの間隔が100 μm 程
度まで狭小化してきており、今後、更に短くなると従来
の樹脂を使用する端子接続方法では隣接する端子（バン
プ或いはパッド）間の絶縁を保持することは困難であ
る。また、接合に樹脂を使用する場合は半導体チップと
回路基板とが樹脂により充填されていることから、半導
体チップの接合不良が検出された場合、修復が困難であ
る。そこで、この解決が課題である。A flip chip bonding method is adopted as a method for mounting a semiconductor chip on which an integrated circuit such as an IC or an LSI is formed on a circuit board. The distance between pads has been reduced to about 100 μm, and if it becomes shorter in the future, it will be difficult to maintain insulation between adjacent terminals (bumps or pads) by a conventional terminal connection method using resin. Further, when a resin is used for joining, the semiconductor chip and the circuit board are filled with the resin, and therefore, if a joining defect of the semiconductor chip is detected, it is difficult to repair. Therefore, this solution is an issue.
【０００９】[0009]
【課題を解決するための手段】上記の課題は熱硬化性樹
脂よりなる樹脂層を被覆した金属細粒と熱硬化性樹脂液
とからなる接着剤をバンプの接合面に転写した後、パッ
ドに位置合わせし、加圧により金属細粒を互に圧接させ
て樹脂層を壊した状態で加熱硬化せしめ、バンプとパッ
ドとの導通を確認した後、チップと回路基板との間隙に
充填用樹脂液を注入して硬化させることを特徴としてチ
ップ部品の端子接続方法を構成することにより解決する
ことができる。[Means for Solving the Problems] The above-mentioned problems are solved by transferring an adhesive composed of fine metal particles coated with a resin layer made of a thermosetting resin and a thermosetting resin liquid to a bonding surface of a bump, and then applying the adhesive to a pad. After aligning and pressing the metal fine particles against each other by pressure to heat and harden the resin layer in a broken state, check the conduction between the bumps and pads, and then fill the gap between the chip and the circuit board with the resin liquid for filling. This can be solved by configuring a terminal connection method for chip parts, which is characterized by injecting and hardening.
【００１０】[0010]
【作用】発明者等は次の方法をとることにより従来の問
題点を解決した。すなわち、従来の問題点は、 樹脂
を使用する端子接続方法では隣接端子間の絶縁保持が困
難であること、 接合不良が発生した場合に修復が困
難なこと、である。The inventors solved the conventional problems by taking the following method. That is, the conventional problems are that it is difficult to maintain insulation between adjacent terminals by a terminal connection method using a resin, and it is difficult to repair when a bonding failure occurs.
【００１１】現在使用されている回路基板のパターン幅
は200 μm 程度、また電極間隔は100 μm 程度まで狭小
化されている。そこで、例えば導電性接着剤を半導体バ
ンプの上に塗布して回路基板上にパターン形成してある
パッドに接合すると容易に電極端子（バンプまたはパッ
ド）間の短絡が生ずる。The circuit board currently used has a pattern width of about 200 μm, and the electrode interval is narrowed to about 100 μm. Therefore, for example, if a conductive adhesive is applied on the semiconductor bumps and bonded to the pads patterned on the circuit board, a short circuit easily occurs between the electrode terminals (bumps or pads).
【００１２】図３はこの状態を示すもので、半導体チッ
プ１に形成されているバンプ２が例えば200 μm 角であ
り、バンプ２の相互間隔が100 μm すなわち300 μm ピ
ッチで形成されており、一方、回路基板３にパターン形
成してあるパッド４の幅が200 μm でピッチが同様に30
0 μm である場合、導電性接着剤５をバンプ２の接触面
に塗布する場合、導電性接着剤の調整が困難であり、接
合した後においては、同図（Ｂ）に示すように導電性接
着剤５のはみ出しによる短絡が生じ易い。また、従来の
接着剤による半導体チップ１と回路基板３の接合におい
ては、接合の良否の検査は半導体チップ１と回路基板３
を全面的に接着剤で硬化した後に行なっているために、
不良が発生した場合に半導体チップ１を回路基板３から
除去することは非常に困難である。FIG. 3 shows this state. The bumps 2 formed on the semiconductor chip 1 are, for example, 200 μm square, and the mutual intervals of the bumps 2 are 100 μm, that is, 300 μm pitch. , The width of the pads 4 patterned on the circuit board 3 is 200 μm and the pitch is 30
When it is 0 μm, it is difficult to adjust the conductive adhesive when the conductive adhesive 5 is applied to the contact surface of the bump 2, and after bonding, as shown in FIG. A short circuit easily occurs due to the protrusion of the adhesive 5. Further, in the case of bonding the semiconductor chip 1 and the circuit board 3 with a conventional adhesive, the quality of the bonding is inspected by the semiconductor chip 1 and the circuit board 3.
Since it is done after the whole is cured with an adhesive,
It is very difficult to remove the semiconductor chip 1 from the circuit board 3 when a defect occurs.
【００１３】そこで、これらの問題を解決する方法とし
て、 金属細粒に熱硬化性樹脂を被覆したマイクロカプセ
ルを熱硬化性樹脂液に混合した接着剤を使用する。 端子接続と半導体チップの回路基板との接着とを別
にして行なう。 の方法をとることにより問題を解決するものである。Therefore, as a method for solving these problems, an adhesive is used in which microcapsules in which metal fine particles are coated with a thermosetting resin are mixed with a thermosetting resin liquid. The terminal connection and the adhesion of the semiconductor chip to the circuit board are performed separately. The problem is solved by taking the method of.
【００１４】すなわち、従来の導通法は樹脂液あるいは
樹脂よりなるシートの中に金属微粒子を懸濁あるいは混
合しておき、上から圧力を加えることにより金属微粒子
が縦に接触している状態で加熱硬化し、これにより導通
を保つものである。然し、端子の相互間隔が100 μm 程
度と微少化している現在、これにより端子間絶縁を確保
することは無理がある。そこで、本発明は図１に示すよ
うに平均粒径が５μm程度の金属粒子７に熱硬化性樹脂
よりなる樹脂膜８を被覆したマククロカプセル９を使用
し、圧力により樹脂膜８が破れて金属粒子７が直接に接
触して導通状態となるのを利用する。That is, in the conventional conduction method, metal fine particles are suspended or mixed in a resin liquid or a sheet made of a resin, and pressure is applied from above to heat the metal fine particles in a state of vertical contact. It cures and thus maintains continuity. However, it is impossible to secure the insulation between terminals by this because the mutual distance between terminals is miniaturized to about 100 μm. Therefore, according to the present invention, as shown in FIG. 1, a Mackuro capsule 9 in which a resin film 8 made of a thermosetting resin is coated on metal particles 7 having an average particle size of about 5 μm is used, and the resin film 8 is broken by pressure. It is used that the metal particles 7 are in direct contact with each other to be in a conductive state.
【００１５】そのためには樹脂膜８が容易に破れること
ゝ、破壊した金属粒子７の相互接触が完全に保たれるこ
とで、そのためには樹脂膜８が熱硬化性樹脂よりなり極
めて薄いこと、接着剤を構成する樹脂液が熱硬化性樹脂
からなり、熱硬化の際に収縮して圧縮応力により金属粒
子７の相互接触を永久に保持することが必要である。For that purpose, the resin film 8 is easily broken, and mutual contact of the broken metal particles 7 is completely maintained. For that purpose, the resin film 8 is made of a thermosetting resin and is extremely thin. It is necessary that the resin liquid constituting the adhesive is composed of a thermosetting resin and contracts during thermosetting to permanently maintain mutual contact of the metal particles 7 by compressive stress.
【００１６】次に、端子間隔が100 μm のように狭い場
合に、従来の導電性接着剤を用いて絶縁が保証される接
合を行なうためには、導電性接着剤のバンプからのはみ
出しを無くすことが必要であったが、これについて本発
明は導電性微粒子としてマイクロカプセル型導電性接着
剤を使用することでバンプからのはみ出し量を制限しな
くてよくなる。また、バンプへの接着剤塗布方法は作業
性の点から転写法を使用する。これは一定厚の接着剤を
平坦な板に塗布し、これを半導体チップに当接する方法
である。Next, in the case where the terminal spacing is as narrow as 100 μm, in order to perform the bonding in which insulation is guaranteed by using the conventional conductive adhesive, the protrusion of the conductive adhesive from the bump is eliminated. However, in the present invention, by using a microcapsule type conductive adhesive as the conductive fine particles, it is not necessary to limit the amount of protrusion from the bump. In addition, a transfer method is used as a method for applying the adhesive to the bumps in terms of workability. This is a method in which an adhesive having a constant thickness is applied to a flat plate and then abutted on the semiconductor chip.
【００１７】図２（Ａ）はこのようにして半導体チップ
１のバンプ２に塗布した導電性接着剤５の付着状態を示
すものである。次に、本発明の特徴はこのようにして半
導体チップ１の回路基板３への装着が終わった後、試験
機により接着の良否を測定して不良の場合はトルクを加
えると半導体チップ１を破壊することなく剥離すること
ができ、樹脂を溶剤で拭き取った後、再度、装着を行な
う。このようにして、半導体チップ１の装着不良がない
ことを確認した後に半導体チップ１と回路基板３の隙間
に熱硬化性の樹脂11を充填することにより接着強度を高
め、また、信頼性を保証するものである。FIG. 2A shows the adhered state of the conductive adhesive 5 applied to the bumps 2 of the semiconductor chip 1 in this way. Next, the feature of the present invention is that after the semiconductor chip 1 is mounted on the circuit board 3 in this way, the quality of the adhesion is measured by a tester, and if the adhesion is defective, the torque is applied to destroy the semiconductor chip 1. It can be peeled off without removing it, and the resin is wiped off with a solvent, and then mounted again. In this way, after confirming that there is no defective mounting of the semiconductor chip 1, the adhesive strength is increased by filling the gap between the semiconductor chip 1 and the circuit board 3 with the thermosetting resin 11, and the reliability is guaranteed. To do.
【００１８】[0018]
【実施例】実施例１：（図２参照） 導電性接着剤５として平均粒径が５μm の銅（Cu）微粒
子の表面に銀 (Ag）メッキを施し、この上にエポキシ樹
脂を約1000Åの厚さに被覆してあるマイクロカプセル
を、一液性エポキシ樹脂液に10容量％添加して粘度3000
cpsにしたものを用いた。また、半導体チップとしては
金(Au)よりなり、200 μm 角のスタッド・バンプが100
μm の間隔で128 ピンが配列しているものを用い、ま
た、回路基板としてはガラスエポキシ基板上にCuよりな
り200 μm 角のパッドが100 μm の間隔で128 個パター
ン形成してあるものを使用した。EXAMPLE Example 1 (see FIG. 2) The surface of copper (Cu) fine particles having an average particle size of 5 μm as the conductive adhesive 5 was plated with silver (Ag), and an epoxy resin of about 1000 Å was applied on the surface. Add microcapsules with a thickness of 10% by volume to a one-part epoxy resin solution to obtain a viscosity of 3000.
I used cps. The semiconductor chip is made of gold (Au) and has 100 μm of 200 μm square stud bumps.
Uses 128 pins arranged at intervals of μm, and uses a circuit board with 128 pads of 200 μm square made of Cu on 100 μm intervals on a glass epoxy substrate. did.
【００１９】まず、ガラス基板上に導電性接着剤５を35
μm の厚さに被覆し、この上に128ピンの半導体チップ
１を置き、引上げてバンプ２の上に転写した。（以上同
図Ａ）、次に、この半導体チップ１を回路基板３のパッ
ド４に位置合わせして接合した後、３kgの荷重( 接合部
にそれぞれ25ｇ）を加えながら200 ℃に30秒保持して硬
化させた後、導通検査と端子間の絶縁状態を測定した
が、導通は接点当たり0.5 Ω以下であり、絶縁も充分で
あった。なお、導通不良または絶縁不良が発生した場合
はトルクを与えて半導体チップ１を剥離し、テトラヒド
ロフランでエポキシ樹脂を溶解除去し、再度同じ工程を
行なえばよい。（以上同図Ｂ） 次に、一液性エポキシ樹脂液をスポイドを使用して注入
した後、200 ℃で１分間加熱することで装着が完了し
た。（以上同図Ｃ） 実施例２：（図２参照） 導電性接着剤５として粘度が20000 cps と大きなものを
使用した以外は実施例１と全く同様にして半導体チップ
１の装着を行なったが各接点の接着抵抗は0.5Ω以下で
あり、また接着不良も発生しなかった。First, the conductive adhesive 5 is applied on the glass substrate 35.
A 128-pin semiconductor chip 1 was placed on the bump 2 and transferred onto the bump 2 so as to cover the bump 2. (Above figure A) Then, after aligning and bonding the semiconductor chip 1 to the pad 4 of the circuit board 3, hold at 200 ° C. for 30 seconds while applying a load of 3 kg (each bonding portion is 25 g). After curing by curing, the continuity test and the insulation state between the terminals were measured. The continuity was 0.5 Ω or less per contact, and the insulation was sufficient. In addition, when the conduction failure or the insulation failure occurs, the semiconductor chip 1 may be peeled off by applying torque, the epoxy resin may be dissolved and removed with tetrahydrofuran, and the same process may be performed again. (The above B in the same figure) Next, the one-component epoxy resin liquid was injected using a spid, and then the mounting was completed by heating at 200 ° C. for 1 minute. (See FIG. 2C) Example 2: (See FIG. 2) The semiconductor chip 1 was mounted in exactly the same manner as in Example 1 except that the conductive adhesive 5 having a large viscosity of 20000 cps was used. The adhesion resistance of each contact was 0.5Ω or less, and no adhesion failure occurred.
【００２０】[0020]
【発明の効果】本発明の実施により端子間の絶縁が良
く、また、修復が可能なチップ装着を行なうことがで
き、これにより信頼性を向上することができる。According to the present invention, the insulation between the terminals is good, and the repairable chip mounting can be carried out, whereby the reliability can be improved.
【図１】 マイクロカプセルの断面図である。FIG. 1 is a cross-sectional view of a microcapsule.
【図２】 本発明の実施法を示す断面図である。FIG. 2 is a sectional view showing a method for carrying out the present invention.
【図３】 従来の問題点を示す断面図である。FIG. 3 is a sectional view showing a conventional problem.
１ 半導体チップ ２ バンプ ３ 回路基板 ４ パッド ５ 導電性接着剤 ７ 金属粒子 ８ 樹脂膜 ９ マイクロカプセル 11 樹脂 1 Semiconductor Chip 2 Bump 3 Circuit Board 4 Pad 5 Conductive Adhesive 7 Metal Particles 8 Resin Film 9 Micro Capsule 11 Resin
フロントページの続き (72)発明者 徳平 英士 神奈川県川崎市中原区上小田中1015番地 富士通株式会社内Continued Front Page (72) Inventor Eiji Tokuhira 1015 Kamiodanaka, Nakahara-ku, Kawasaki-shi, Kanagawa Fujitsu Limited
Claims (1)
品の該バンプを、予め回路基板上にパターン形成してあ
る複数のパッドに位置合わせして加熱し溶着させる端子
接続方法において、 熱硬化性樹脂よりなる樹脂層を被覆した金属細粒と熱硬
化性樹脂液とからなる接着剤を前記バンプの接合面に転
写した後、前記パッドに位置合わせし、加圧により前記
金属細粒を互に圧接させて樹脂層を壊した状態で加熱硬
化せしめ、前記バンプとパッドとの導通を確認した後、
前記チップと回路基板との間隙に充填用樹脂液を注入し
て硬化させることを特徴とするチップ部品の端子接続方
法。1. A terminal connecting method in which the bumps of a chip component having a plurality of bumps as terminal electrodes are aligned with a plurality of pads formed in advance on a circuit board and heated to be welded, and thermosetting is performed. After transferring an adhesive consisting of a metal fine particle coated with a resin layer made of a resin and a thermosetting resin liquid to the bonding surface of the bump, aligning it with the pad and pressing the metal fine particles to each other by pressing. After pressing and heating to cure the resin layer in a broken state, after confirming the conduction between the bump and the pad,
A method of connecting terminals to a chip component, characterized by injecting a filling resin liquid into a gap between the chip and the circuit board to cure the resin liquid.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP30842093A JP3271404B2 (en) | 1993-12-09 | 1993-12-09 | Terminal connection method for chip components |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP30842093A JP3271404B2 (en) | 1993-12-09 | 1993-12-09 | Terminal connection method for chip components |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH07161769A true JPH07161769A (en) | 1995-06-23 |
| JP3271404B2 JP3271404B2 (en) | 2002-04-02 |
Family
ID=17980845
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP30842093A Expired - Fee Related JP3271404B2 (en) | 1993-12-09 | 1993-12-09 | Terminal connection method for chip components |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3271404B2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6458237B1 (en) | 1997-05-19 | 2002-10-01 | Fujitsu Limited | Mounting method of semiconductor device |
| CN111063621A (en) * | 2019-12-30 | 2020-04-24 | 济南海马机械设计有限公司 | Photoelectric detector and manufacturing method thereof |
-
1993
- 1993-12-09 JP JP30842093A patent/JP3271404B2/en not_active Expired - Fee Related
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6458237B1 (en) | 1997-05-19 | 2002-10-01 | Fujitsu Limited | Mounting method of semiconductor device |
| US6787925B2 (en) | 1997-05-19 | 2004-09-07 | Fujitsu Limited | Mounting method of semiconductor device |
| CN111063621A (en) * | 2019-12-30 | 2020-04-24 | 济南海马机械设计有限公司 | Photoelectric detector and manufacturing method thereof |
| CN111063621B (en) * | 2019-12-30 | 2021-11-02 | 江苏大摩半导体科技有限公司 | Photoelectric detector and manufacturing method thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3271404B2 (en) | 2002-04-02 |
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