JPH0697061A - Film forming method and its equipment - Google Patents

Film forming method and its equipment

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Publication number
JPH0697061A
JPH0697061A JP24801992A JP24801992A JPH0697061A JP H0697061 A JPH0697061 A JP H0697061A JP 24801992 A JP24801992 A JP 24801992A JP 24801992 A JP24801992 A JP 24801992A JP H0697061 A JPH0697061 A JP H0697061A
Authority
JP
Japan
Prior art keywords
film
solvent
semiconductor substrate
organic compound
resist
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP24801992A
Other languages
Japanese (ja)
Inventor
Hideyuki Matsuda
秀之 松田
Katsuhiko Iizuka
勝彦 飯塚
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP24801992A priority Critical patent/JPH0697061A/en
Publication of JPH0697061A publication Critical patent/JPH0697061A/en
Withdrawn legal-status Critical Current

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  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)

Abstract

PURPOSE:To provide a method and equipment for forming resist film and interference-preventive film on it to be used in lithography for semiconductor manufacture, wherein residual solvent is removed from organic compound film without the problems that arise in the conventional prebaking process. CONSTITUTION:In a film forming method comprising a process for coating an organic compound film 3 or 4 dissolved in a solvent on a layer 2 to be etched on a semiconductor substrate 1, a solvent removing process will introduce the semiconductor substrate 1 after coating into a vacuum chamber 6 so as to evaporate the solvent by vacuum drying.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、有機化合物の塗膜、よ
り詳しくは、半導体装置の製造でのリソグラフィー工程
に用いられるレジスト膜、その上に形成される干渉防止
膜などの塗膜を形成する方法およびそのための装置に関
する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention forms a coating film of an organic compound, more specifically, a coating film such as a resist film used in a lithography process in the manufacture of a semiconductor device and an interference prevention film formed thereon. Method and apparatus therefor.

【0002】[0002]

【従来の技術】近年、LSI、VLSIなどの半導体装
置は高集積化と微細化とが図られ、鮮明かつ微細なパタ
ーンを形成することが求められている。このようなパタ
ーンを形成するために、レジスト材料、露光装置、多層
レジスト法、レジストのシリル化、干渉防止膜の付加な
どに各種の提案がなされている。
2. Description of the Related Art In recent years, semiconductor devices such as LSI and VLSI have been highly integrated and miniaturized, and it has been required to form a clear and fine pattern. In order to form such a pattern, various proposals have been made on a resist material, an exposure apparatus, a multilayer resist method, silylation of resist, addition of an interference prevention film, and the like.

【0003】通常のリソグラフィープロセスでは、半導
体基板上の被エッチング層(配線層、絶縁層など)の上
に、溶媒に溶けたレジスト膜や干渉防止膜をスピンコー
ト法かローラコート法によって塗布し、プリベークして
塗膜中の溶媒を蒸発させている。それから、露光・現像
し、ポストベークしてレジストパターンを形成する。こ
のレジスト膜は、フォトレジスト、電子線レジスト、X
線レジストなどである。干渉防止膜は現像時の内部干渉
効果を低減して現像後のレジストパターンの壁面をより
垂直にすることのできるコントラスト増強膜(CEL
膜)であり、この場合には、溶媒に溶けた干渉防止膜を
プリベーク後にレジスト膜上に塗布し、ベーク(加熱乾
燥)して溶剤を蒸発させることで、レジスト膜上に形成
している。
In a usual lithographic process, a resist film or an interference prevention film dissolved in a solvent is applied onto a layer to be etched (wiring layer, insulating layer, etc.) on a semiconductor substrate by spin coating or roller coating, The solvent in the coating film is evaporated by pre-baking. Then, it is exposed and developed, and post-baked to form a resist pattern. This resist film is a photoresist, an electron beam resist, X
For example, line resist. The anti-interference film is a contrast enhancing film (CEL) that can reduce the internal interference effect during development and make the wall surface of the resist pattern after development more vertical.
In this case, the interference prevention film dissolved in a solvent is applied on the resist film after pre-baking, and baked (heated and dried) to evaporate the solvent, thereby forming the film on the resist film.

【0004】[0004]

【発明が解決しようとする課題】レジスト膜を塗布形成
した後で、ポリマーが重合しないでかつ添加物の熱分解
が生じない温度以下に加熱するプリベークによって、塗
布膜中の残留溶媒を蒸発させる訳であるが、処理時間の
長時間化、処理後の放置時間による膜厚の減厚といった
問題が生じる。
After the resist film is formed by coating, the residual solvent in the coating film is evaporated by pre-baking which is heated below a temperature at which the polymer does not polymerize and thermal decomposition of the additive does not occur. However, there is a problem that the processing time is extended and the film thickness is reduced due to the standing time after the processing.

【0005】また、干渉防止膜をレジスト膜上に形成す
るために、ベーキングを行うと、その熱よって、干渉防
止膜材料とレジスト材料とが結合して、中間混合物層が
発生してしまう。この混合物層はその屈折率がレジスト
膜の屈折率に近くなり、干渉防止膜としての屈折率増加
に伴う干渉防止効果を低減してしまう。また、混合物層
は現像剤で取り除き難いものであり、レジスト膜パター
ンにパーティクルとして残り、パターン線幅の安定性や
レジスト再生の際に別の処理(フッ酸処理など)が必要
となり、手番の増加がおこる。
Further, when baking is performed to form the interference prevention film on the resist film, the heat causes the interference prevention film material and the resist material to bond with each other, thereby forming an intermediate mixture layer. The refractive index of this mixture layer is close to that of the resist film, and the interference preventing effect as the interference preventing film is reduced due to the increase of the refractive index. Further, the mixture layer is difficult to remove with a developer, and remains as particles in the resist film pattern, which requires stability of the pattern line width and another treatment (such as hydrofluoric acid treatment) at the time of regenerating the resist. Increase occurs.

【0006】本発明の目的は、レジスト膜上に塗布され
た干渉防止膜の放置時間などによって引き起こされた減
膜現象を招かない方法を提供することである。本発明の
別の目的は、中間混合物を生じさせることなく干渉防止
膜から残留溶媒を除去する方法を提供することである。
本発明のその他の目的は、溶媒に溶解した有機化合物膜
(レジスト膜、干渉防止膜など)を塗布形成し、その塗
膜から溶媒を除去する装置を提供することである。
An object of the present invention is to provide a method which does not cause a film reduction phenomenon caused by a standing time of an interference prevention film coated on a resist film. Another object of the invention is to provide a method of removing residual solvent from an anti-interference membrane without the formation of an intermediate mixture.
Another object of the present invention is to provide an apparatus for forming an organic compound film (resist film, interference prevention film, etc.) dissolved in a solvent by coating and removing the solvent from the coating film.

【0007】[0007]

【課題を解決するための手段】上述の目的が、半導体基
板上の被エッチング層の上に溶媒に溶けた有機化合物膜
を塗布する工程および該有機化合物膜の溶媒を除去する
工程からなる塗膜形成方法において、溶媒除去工程が、
塗布後の半導体基板を真空チャンバー内に導入して、真
空乾燥によって溶媒を蒸発させることを特徴とする塗膜
形成方法によって達成される。
[Means for Solving the Problems] The above object is a coating film comprising a step of applying an organic compound film dissolved in a solvent on a layer to be etched on a semiconductor substrate and a step of removing the solvent of the organic compound film. In the forming method, the solvent removal step comprises
This is achieved by a method for forming a coating film, which comprises introducing the coated semiconductor substrate into a vacuum chamber and evaporating the solvent by vacuum drying.

【0008】有機化合物膜がリソグラフィープロセスで
のレジスト膜(半導体基板の被エッチング層上に形成し
たレジスト膜)或いは該レジスト膜の上に形成される干
渉防止膜である。また、別の目的が、半導体基板上の被
エッチング層の上に溶媒に溶けた有機化合物膜を塗布す
る装置に、該有機化合物膜の溶媒を除去する装置が接続
されている塗膜形成装置において、溶媒除去装置が、真
空ポンプにつながった真空チャンバーおよびその内部に
設けられた塗布後の半導体基板を担持する支持板からな
ることを特徴とする塗膜形成装置によって達成される。
The organic compound film is a resist film (a resist film formed on a layer to be etched of a semiconductor substrate) in a lithographic process or an interference prevention film formed on the resist film. Another object is to provide an apparatus for applying an organic compound film dissolved in a solvent on a layer to be etched on a semiconductor substrate, and a device for removing the solvent of the organic compound film is connected to the coating film forming apparatus. The solvent removing device comprises a vacuum chamber connected to a vacuum pump and a support plate provided inside the vacuum chamber for supporting a semiconductor substrate after coating, thereby achieving a coating film forming device.

【0009】[0009]

【作用】本発明では、熱によるベーキングの代わりに、
真空(例えば、0.1〜0.01Torrの減圧)状態のチャン
バー内に塗膜を有する半導体基板を配置して、塗膜中の
残留溶媒を蒸発させ、排気除去する真空乾燥で脱溶媒処
理を行う。加熱しないので、上述した問題が発生するこ
とはない。
In the present invention, instead of baking by heat,
A semiconductor substrate having a coating film is placed in a chamber under a vacuum (for example, a reduced pressure of 0.1 to 0.01 Torr), the residual solvent in the coating film is evaporated, and the solvent removal treatment is performed by vacuum drying to remove by evacuation. To do. Since it is not heated, the above-mentioned problems do not occur.

【0010】[0010]

【実施例】以下、添付図面を参照して、本発明の実施態
様例および比較例によって本発明を詳細に説明する。 例1 図1に示すように、シリコン半導体基板1の上に熱酸化
膜(SiO2膜)2を形成し、その上にレジスト膜3を形成
し、さらにその上に干渉防止膜4を本発明に従って形成
する。
EXAMPLES The present invention will be described in detail below with reference to the accompanying drawings by way of example embodiments and comparative examples of the present invention. Example 1 As shown in FIG. 1, a thermal oxide film (SiO 2 film) 2 is formed on a silicon semiconductor substrate 1, a resist film 3 is formed thereon, and an interference prevention film 4 is further formed thereon. According to.

【0011】この場合に、レジストをスピンコート装置
にて半導体基板1の酸化膜2の上に滴下し、ほとんどの
溶媒が蒸発して塗膜を形成する。この塗膜(膜厚:1.2
μm)は溶媒を含有しており、プリベーク装置にて約1
00℃にて1分間加熱して溶媒を蒸発させてレジスト膜
3とする。次に、水溶性の干渉防止膜材料をスピンコー
ト装置にて半導体基板1のレジスト膜3の上に塗布し、
水分を含有した干渉防止塗膜(厚さ:130nm)を形
成する。溶媒が水なので、有機溶媒のようには蒸発しな
いで塗膜中に残る。この干渉防止塗膜を有する半導体基
板1を、図2に示すような、真空チャンバー6およびそ
の内部に設けられた支持板7からなる溶媒除去装置8内
に搬送する。この溶媒除去装置8は塗布装置に接続して
おり、適切な搬送手段(図示せず)によって半導体基板
1が塗布装置から装置8へ移送される。そして、指示板
7は静電チャック機構または真空チャック機構を備えて
おり、搬送されてきた半導体基板1をその上に担持す
る。真空チャンバー6は排気管9によって真空ポンプ
(図示せず)に接続されている。真空チャンバー6内を
排気して、減圧状態にすることで、塗膜中の水分を蒸発
除去(真空乾燥)する。
In this case, a resist is dropped on the oxide film 2 of the semiconductor substrate 1 by a spin coater, and most of the solvent is evaporated to form a coating film. This coating (film thickness: 1.2
μm) contains a solvent and is about 1
The resist film 3 is formed by heating at 00 ° C. for 1 minute to evaporate the solvent. Next, a water-soluble interference preventing film material is applied onto the resist film 3 of the semiconductor substrate 1 by a spin coater,
An interference prevention coating film (thickness: 130 nm) containing water is formed. Since the solvent is water, it does not evaporate like an organic solvent and remains in the coating film. The semiconductor substrate 1 having the coating film for preventing interference is conveyed into a solvent removing device 8 including a vacuum chamber 6 and a support plate 7 provided therein as shown in FIG. The solvent removing device 8 is connected to the coating device, and the semiconductor substrate 1 is transferred from the coating device to the device 8 by an appropriate transfer means (not shown). The instruction plate 7 is equipped with an electrostatic chuck mechanism or a vacuum chuck mechanism, and holds the transported semiconductor substrate 1 thereon. The vacuum chamber 6 is connected to a vacuum pump (not shown) by an exhaust pipe 9. The inside of the vacuum chamber 6 is evacuated to a reduced pressure state, so that the water content in the coating film is removed by evaporation (vacuum drying).

【0012】真空チャンバー6内の圧力(真空圧)を0.
1Torr(破線A)あるいは0.01Torr(破線B)にする
場合の塗膜の膜厚減少を調べると、図3に示す結果が得
られる。なお、図3での時間(秒)は真空チャンバー6
内が所定の真空圧になった時からの経過時間であり、○
印は干渉防止膜を塗布した直後の厚さである。図3から
明らかなように、真空乾燥時間が長くなる程干渉防止膜
の厚さは減少し、真空圧0.01Torrで120秒経過した
ときの膜厚が、ベーキング(90℃×30秒)した場合
の膜厚と同じであることが分かった。この状態を真空圧
0.1Torrで達成するには、300秒かかる。なお、30
0秒(5分)よりも長くすればもっと膜厚が減少するこ
とは確かであるが、300秒以上の処理では装置のスル
ープットが低下してしまうので、膜厚測定をここで終え
ている。
The pressure (vacuum pressure) in the vacuum chamber 6 is set to 0.
Examining the decrease in the film thickness of the coating film at 1 Torr (broken line A) or 0.01 Torr (broken line B), the results shown in FIG. 3 are obtained. In addition, the time (second) in FIG.
It is the elapsed time from when the inside becomes a predetermined vacuum pressure, ○
The mark indicates the thickness immediately after applying the interference prevention film. As is clear from FIG. 3, the thickness of the interference prevention film decreases as the vacuum drying time increases, and the film thickness after 120 seconds at a vacuum pressure of 0.01 Torr was baked (90 ° C. × 30 seconds). It was found to be the same as the film thickness in the case. This state is vacuum pressure
It will take 300 seconds to reach 0.1 Torr. In addition, 30
Although it is certain that the film thickness will be further reduced if the time is longer than 0 seconds (5 minutes), the film thickness measurement is ended here because the throughput of the apparatus is lowered in the processing for 300 seconds or more.

【0013】このようにして真空乾燥の脱溶媒処理によ
って得られた干渉防止膜4は、その特性はプリベークに
よる場合の干渉防止膜特性と同じであり、本発明に係る
脱溶媒処理はプリベークの熱処理に代わるやり方であっ
て、中間混合層発生のような問題を招くことはない。 例2 例1でのレジスト膜の形成においても、図2の溶媒除去
装置8を用いて、プリベーク(熱処理)を真空乾燥の脱
溶媒処理に代えることができる。この場合には、真空圧
0.01Torrで120秒経過したときのレジスト膜厚が、
プリベークでのレジスト膜厚と同じとなる。本発明に係
る脱溶媒処理では加熱していないので、レジストの感度
のゆらぎ等の発生、べーキングによるウェハー(半導体
基板)面内のレジスト膜のバラツキがおさえられる。
The interference-preventing film 4 thus obtained by vacuum solvent removal treatment has the same characteristics as the interference-preventing film in the case of prebaking, and the desolvation treatment according to the present invention is a heat treatment for prebaking. It does not cause problems such as the generation of an intermediate mixed layer. Example 2 Also in the formation of the resist film in Example 1, the solvent removal apparatus 8 of FIG. 2 can be used to replace the prebaking (heat treatment) with a vacuum solvent removal treatment. In this case, the vacuum pressure
The resist thickness after 120 seconds at 0.01 Torr is
It is the same as the resist film thickness in prebaking. Since heating is not performed in the desolvation treatment according to the present invention, fluctuations in the sensitivity of the resist and the like, and variations in the resist film within the wafer (semiconductor substrate) plane due to baking are suppressed.

【0014】[0014]

【発明の効果】以上説明したように、本発明に係る有機
化合物膜(レジスト膜、干渉防止膜など)の溶媒除去は
加熱処理(プリベーク)に代えて真空乾燥の原理を利用
しており、加熱処理でもたらされる欠点(膜厚のバラツ
キ、中間混合物層の発生、屈折率がレジスト層に近くな
ることの干渉効果の低下など)を招くことなく、溶媒除
去ができる。半導体装置の製造での微細加工に寄与する
ことになる。
As described above, the solvent removal of the organic compound film (resist film, interference prevention film, etc.) according to the present invention uses the principle of vacuum drying instead of heat treatment (prebaking). The solvent can be removed without incurring the drawbacks brought about by the treatment (such as variations in film thickness, generation of an intermediate mixture layer, and reduction in interference effect due to the refractive index approaching that of the resist layer). This contributes to fine processing in the manufacture of semiconductor devices.

【図面の簡単な説明】[Brief description of drawings]

【図1】レジスト膜および干渉防止膜を形成した半導体
基板の概略断面図である。
FIG. 1 is a schematic cross-sectional view of a semiconductor substrate on which a resist film and an interference prevention film are formed.

【図2】本発明に係る真空を利用した溶媒除去装置の概
略図である。
FIG. 2 is a schematic view of a solvent removing apparatus using a vacuum according to the present invention.

【図3】本発明に係る真空乾燥の脱溶媒除処理における
干渉防止膜の膜厚減少を示すグラフである。
FIG. 3 is a graph showing the reduction in the thickness of the interference prevention film in the solvent removal treatment by vacuum drying according to the present invention.

【符号の説明】[Explanation of symbols]

1…半導体基板 2…酸化膜 3…レジスト膜 4…干渉防止膜 6…真空チャンバー 7…支持板 8…溶媒除去装置 9…排気管 DESCRIPTION OF SYMBOLS 1 ... Semiconductor substrate 2 ... Oxide film 3 ... Resist film 4 ... Interference prevention film 6 ... Vacuum chamber 7 ... Support plate 8 ... Solvent removal device 9 ... Exhaust pipe

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】 半導体基板上の被エッチング層の上に溶
媒に溶けた有機化合物膜を塗布する工程と、該有機化合
物膜の溶媒を除去する工程とを順に行う塗膜形成方法に
おいて、前記溶媒除去工程が、塗布後の前記半導体基板
を真空チャンバー内に導入して、真空乾燥によって前記
溶媒を蒸発させることを特徴とする塗膜形成方法。
1. A method for forming a coating film, which comprises a step of applying an organic compound film dissolved in a solvent on a layer to be etched on a semiconductor substrate and a step of removing the solvent of the organic compound film in the order mentioned above. A coating film forming method, wherein the removing step comprises introducing the coated semiconductor substrate into a vacuum chamber and evaporating the solvent by vacuum drying.
【請求項2】 前記有機化合物膜がリソグラフィープロ
セスでのレジスト膜であることを特徴とする塗膜形成方
法。
2. The method for forming a coating film, wherein the organic compound film is a resist film in a lithography process.
【請求項3】 前記有機化合物膜が、半導体基板の被エ
ッチング層上に形成したレジスト膜の上に形成される干
渉防止膜であることを特徴とする塗膜形成方法。
3. The coating film forming method, wherein the organic compound film is an interference prevention film formed on a resist film formed on a layer to be etched of a semiconductor substrate.
【請求項4】 前記干渉防止膜がコントラスト増強膜で
あることを特徴とする請求項3記載の塗膜形成方法。
4. The coating film forming method according to claim 3, wherein the interference prevention film is a contrast enhancing film.
【請求項5】 半導体基板上の被エッチング層の上に溶
媒に溶けた有機化合物膜を塗布する装置に、該有機化合
物膜の溶媒を除去する装置が接続されている塗膜形成装
置において、前記溶媒除去装置が、真空ポンプにつなが
った真空チャンバーおよびその内部に設けられた塗布後
の前記半導体基板を担持する支持板からなることを特徴
とする塗膜形成装置。
5. A coating film forming apparatus in which an apparatus for applying an organic compound film dissolved in a solvent onto an etching target layer on a semiconductor substrate is connected to an apparatus for removing the solvent of the organic compound film, A coating film forming apparatus, wherein the solvent removing device comprises a vacuum chamber connected to a vacuum pump and a support plate provided inside the vacuum chamber for supporting the coated semiconductor substrate.
JP24801992A 1992-09-17 1992-09-17 Film forming method and its equipment Withdrawn JPH0697061A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24801992A JPH0697061A (en) 1992-09-17 1992-09-17 Film forming method and its equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24801992A JPH0697061A (en) 1992-09-17 1992-09-17 Film forming method and its equipment

Publications (1)

Publication Number Publication Date
JPH0697061A true JPH0697061A (en) 1994-04-08

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JP24801992A Withdrawn JPH0697061A (en) 1992-09-17 1992-09-17 Film forming method and its equipment

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6342321B1 (en) 1998-12-25 2002-01-29 Canon Kabushiki Kaisha Method of drying resinous composition layer, method of manufacturing color filter substrate using the same drying method, and liquid crystal display device
US9881985B2 (en) 2012-02-28 2018-01-30 Boe Technology Group Co., Ltd. OLED device, AMOLED display device and method for manufacturing same
CN111121654A (en) * 2019-12-31 2020-05-08 歌尔股份有限公司 Method, device and equipment for processing membrane rupture phenomenon and computer readable storage medium

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6342321B1 (en) 1998-12-25 2002-01-29 Canon Kabushiki Kaisha Method of drying resinous composition layer, method of manufacturing color filter substrate using the same drying method, and liquid crystal display device
US9881985B2 (en) 2012-02-28 2018-01-30 Boe Technology Group Co., Ltd. OLED device, AMOLED display device and method for manufacturing same
CN111121654A (en) * 2019-12-31 2020-05-08 歌尔股份有限公司 Method, device and equipment for processing membrane rupture phenomenon and computer readable storage medium
CN111121654B (en) * 2019-12-31 2022-04-22 歌尔股份有限公司 Method, device and equipment for processing membrane rupture phenomenon and computer readable storage medium

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Effective date: 19991130