JPH0664091B2 - Comparison circuit - Google Patents
Comparison circuitInfo
- Publication number
- JPH0664091B2 JPH0664091B2 JP13469687A JP13469687A JPH0664091B2 JP H0664091 B2 JPH0664091 B2 JP H0664091B2 JP 13469687 A JP13469687 A JP 13469687A JP 13469687 A JP13469687 A JP 13469687A JP H0664091 B2 JPH0664091 B2 JP H0664091B2
- Authority
- JP
- Japan
- Prior art keywords
- terminal
- capacitor
- reference power
- capacitance
- voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Landscapes
- Measurement Of Current Or Voltage (AREA)
- Manipulation Of Pulses (AREA)
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は比較回路に関し、特に入力電圧と基準電圧とを
比較する集積化に適した比較回路に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a comparison circuit, and more particularly to a comparison circuit suitable for integration for comparing an input voltage and a reference voltage.
従来、この種の比較回路は、第３図に示すようにｎ個の
抵抗Ｒ１,R２，〜RK,RK ＋ １，〜Rnと閾値電圧選択用の
スイッチＳ１，〜SK,Sn− １とコンパレータ30とを有
し、これらｎ個の抵抗を接地端子31と電源端子32間に直
列に接続し、隣接抵抗の接続点から閾値電圧を選択して
各スイッチを通してコンパレータ30の一方の入力に接続
し、他方の入力には入力端子１を接続して構成されてい
た。Conventionally, the comparator circuit of this type, n-number of resistors R 1 as shown in FIG. 3, R 2, ~R K, R K + 1, the switch S 1 of ~Rn and the threshold voltage for selecting, to S K , Sn - 1 and a comparator 30. These n resistors are connected in series between the ground terminal 31 and the power supply terminal 32, the threshold voltage is selected from the connection point of adjacent resistors, and the comparator 30 is connected through each switch. The input terminal 1 was connected to one input and the other input was connected.
上述した従来の比較回路は、ｎ個の抵抗を接地端子と電
源端子間に直列に接続し、隣接抵抗の接続点から閾値電
圧を選択する構成となっているので、抵抗による消費電
力の増加と集積化した場合の抵抗比精度の確保のための
抵抗面積の増加とを同時に防ぐことができないという欠
点がある。また、閾値電圧が電源電圧の変動により影響
を受けるという欠点がある。この欠点を避けるためにｎ
個の抵抗を接地端子と基準電源間に直列に接続した場合
には、基準電源の電圧値より高い閾値電圧を作成できな
くなるという欠点がある。The conventional comparison circuit described above has a configuration in which n resistors are connected in series between the ground terminal and the power supply terminal and the threshold voltage is selected from the connection point of the adjacent resistors. There is a drawback in that it is not possible to prevent an increase in the resistance area for ensuring the accuracy of the resistance ratio when integrated, at the same time. Further, there is a drawback that the threshold voltage is affected by the fluctuation of the power supply voltage. To avoid this drawback n
If the individual resistors are connected in series between the ground terminal and the reference power source, there is a drawback that a threshold voltage higher than the voltage value of the reference power source cannot be created.
本発明によれば、基準電源を接続する第１の端子とこの
基準電源により決定される電圧と比較される比較電圧を
接続する第２の端子と比較結果を出力する第３の端子と
を有するコンパレータと、第１の容量と、一方の端子を
前記基準電源に接続した第２の容量と、前記第１の容量
の一方の端子を接地端子および前記基準電源にそれぞれ
接続するための第１および第２のスイッチと、前記第１
の容量の他方の端子を入力端子および前記第２の容量の
他方の端子にそれぞれ接続するための第３および第４の
スイッチと、前記第２の容量の他方の端子を接地端子お
よび前記コンパレータの前記第２の端子にそれぞれ接続
するための第５および第６のスイッチとを備えることを
特徴とする比較回路が得られる。また、前記第２の容量
が所望の容量値を選択できる複数の容量素子からなる容
量アレイで構成されるものでもよい。According to the present invention, it has a first terminal for connecting a reference power supply, a second terminal for connecting a comparison voltage to be compared with a voltage determined by the reference power supply, and a third terminal for outputting a comparison result. A comparator, a first capacitance, a second capacitance having one terminal connected to the reference power supply, and a first and one for connecting one terminal of the first capacitance to a ground terminal and the reference power supply, respectively. A second switch and the first
Third and fourth switches for connecting the other terminal of the capacitor to the input terminal and the other terminal of the second capacitor, respectively, and the other terminal of the second capacitor to the ground terminal and the comparator. A comparison circuit is obtained, which comprises a fifth switch and a sixth switch for connecting to the second terminal, respectively. Further, the second capacitor may be composed of a capacitor array composed of a plurality of capacitors capable of selecting a desired capacitance value.
次に、本発明について図面を参照して説明する。 Next, the present invention will be described with reference to the drawings.
第１図は本発明の第１の実施例を示す回路図である。FIG. 1 is a circuit diagram showing a first embodiment of the present invention.
第１図において、１は入力端子、２は出力端子、３は接
地端子、４は基準電源、5,6は容量、7,8,9,10,11,12は
スイッチ、13はコンパレータを示す。入力端子１はスイ
ッチ9,10,11,12を通してコンパレータ13の＋端子に接続
され、容量５はスイッチ9,10の接続点とスイッチ7,8の
接続点との間に接続され、容量６はスイッチ10,12の接
続点と基準電源４との間に接続され、スイッチ7,8はそ
れぞれ接地端子3,基準電源４と接続され、スイッチ11は
スイッチ10,12の接続点と接地端子３との間に接続さ
れ、コンパレータ13の−端子および出力は基準電源４お
よび出力端子２にそれぞれ接続されている。In FIG. 1, 1 is an input terminal, 2 is an output terminal, 3 is a ground terminal, 4 is a reference power source, 5 and 6 are capacitors, 7,8,9,10,11,12 are switches, and 13 is a comparator. . The input terminal 1 is connected to the + terminal of the comparator 13 through the switches 9, 10, 11 and 12, the capacitor 5 is connected between the connection points of the switches 9 and 10 and the switches 7 and 8, and the capacitor 6 is It is connected between the connection point of the switches 10 and 12 and the reference power source 4, the switches 7 and 8 are connected to the ground terminal 3 and the reference power source 4, respectively, and the switch 11 is connected to the connection point of the switches 10 and 12 and the ground terminal 3. The negative terminal and the output of the comparator 13 are connected to the reference power source 4 and the output terminal 2, respectively.
続いて、第１の実施例の動作について説明する。Next, the operation of the first embodiment will be described.
図示していない駆動手段によって、スイッチ7,9,11のみ
をオンとする状態１と、スイッチ8,10,12のみをオンと
する状態２とを互いに重ならないタイミングで交互に繰
り返し動作させる。状態１において入力端子１の電圧Ｖ
１により容量５（容量値をＣ１とする）にはＣ１Ｖ１の
電荷が充電され、容量６（容量値をＣ２とする）には−
Ｃ２Vrの電荷が充電される。ここでVrは基準電源４の電
圧である。状態２においては容量5,6に充電されていた
電荷が容量5,6に再配分され、容量5,6の接続点の電圧VX
は次式で表される値になる。By a driving means (not shown), a state 1 in which only the switches 7, 9, 11 are turned on and a state 2 in which only the switches 8, 10, 12 are turned on are alternately and repeatedly operated at timings that do not overlap each other. The voltage V of the input terminal 1 in the state 1
1 causes the capacitor 5 (capacity value is C 1 ) to be charged with C 1 V 1 charge, and the capacitor 6 (capacity value is C 2 ) is −
The electric charge of C 2 Vr is charged. Here, Vr is the voltage of the reference power supply 4. In the state 2, the charges charged in the capacitors 5 and 6 are redistributed to the capacitors 5 and 6, and the voltage V X at the connection point of the capacitors 5 and 6 is
Is the value expressed by the following equation.
Ｃ１Ｖ１−Ｃ２Vr＝（Ｃ１＋Ｃ２）（VX−Vr） 従って、VX＝｛Ｃ１／（Ｃ１＋Ｃ２）｝（Ｖ１＋Vr） この電圧VXが基準電源の電圧Vrより大きいときはコンパ
レータ13により出力端子２にハイレベルが出力され、小
さいときはローレベルが出力される。コンパレータ13の
出力がローレベルからハイレベルに切り替わる入力端子
電圧Ｖ１は次式で表される。C 1 V 1 −C 2 Vr = (C 1 + C 2 ) (V X −Vr) Therefore, V X = {C 1 / (C 1 + C 2 )} (V 1 + Vr) This voltage V X is the reference power source. When the voltage is higher than Vr, the comparator 13 outputs a high level to the output terminal 2, and when it is lower, a low level is output. The input terminal voltage V 1 at which the output of the comparator 13 switches from low level to high level is expressed by the following equation.
Vr＝｛Ｃ１／（Ｃ１＋Ｃ２）｝（Ｖ１＋Vr） 従って、Ｖ１＝（Ｃ２／Ｃ１）Vr つまり、入力端子電圧Ｖ１と閾値電圧（Ｃ２／Ｃ１）Vr
との大小を比較することができる。Vr = {C 1 / (C 1 + C 2 )} (V 1 + Vr) Therefore, V 1 = (C 2 / C 1 ) Vr That is, the input terminal voltage V 1 and the threshold voltage (C 2 / C 1 ) Vr
You can compare the size with.
入力端子１の電圧Ｖ１が基準電圧Vrより大きな場合に
は、スイッチ7,10のみをオンとする状態３を上記状態１
と状態２との間に入れて互いに重ならないタイミングで
周期的に動作させることにより、容量5,6に再配分され
た電荷がスイッチの過渡動作時にスイッチのジャンクシ
ョンから電源に抜けるのを防ぐことができる。If the voltage V 1 of the input terminal 1 is larger than the reference voltage Vr, the state 1 to state 3 for turning on only the switch 7 and 10
It is possible to prevent the charge redistributed to the capacitors 5 and 6 from leaking from the junction of the switch to the power supply during the transient operation of the switch by putting it between the state 2 and the state 2 and operating it periodically when they do not overlap each other. it can.
第２図は本発明の第２の実施例を示す回路図である。図
中、第１の実施例の容量６（第１図に図示）を容量61と
スイッチＳ１の直列回路，容量62とスイッチＳ２の直列
回路，〜容量6nとスイッチSnの直列回路からなる容量ア
レイに置き替えたものであり、スイッチＳ１,S２，〜Sn
のいずれか１つまたは複数を選択しオンさせることによ
り、閾値電圧の値を可変にすることができる。FIG. 2 is a circuit diagram showing a second embodiment of the present invention. In the figure, the capacitor 6 of the first embodiment (shown in FIG. 1) is composed of a series circuit of a capacitor 61 and a switch S 1, a series circuit of a capacitor 62 and a switch S 2, and a series circuit of a capacitor 6n and a switch Sn. It is replaced with a capacitance array, and switches S 1 , S 2 , ... Sn
It is possible to make the value of the threshold voltage variable by selecting and turning on one or more of the above.
上記の実施例では抵抗素子を使用しないので、低消費電
力化，高精度化，占有面積の縮小化が実現される。Since the resistive element is not used in the above embodiment, low power consumption, high accuracy, and reduction of occupied area are realized.
以上説明したように本発明は、基準電源を接続する第１
の端子とこの基準電源により決定される電圧と比較され
る比較電圧を接続する第２の端子と比較結果を出力する
第３の端子とを有するコンパレータと、第１の容量と、
一方の端子を前記基準電源に接続した第２の容量と、前
記第１の容量の一方の端子を設地端子および前記基準電
源にそれぞれ接続するための第１および第２のスイッチ
と、前記第１の容量の他方の端子を入力端子および前記
第２の容量の他方の端子にそれぞれ接続するための第３
および第４のスイッチと、前記第２の容量の他方の端子
を接地端子および前記コンパレータの前記第２の端子に
それぞれ接続するための第５および第６のスイッチとを
備えることにより、集積化したときに低消費電力化，高
精度化および占有面積の縮小化が実現できるという効果
を有する。As described above, the present invention relates to the first power source for connecting the reference power source.
A comparator having a second terminal for connecting a comparison voltage to be compared with the voltage determined by the reference power source, and a third terminal for outputting a comparison result;
A second capacitor having one terminal connected to the reference power source; first and second switches for connecting one terminal of the first capacitor to a ground terminal and the reference power source; A third terminal for connecting the other terminal of the first capacitor to the input terminal and the other terminal of the second capacitor, respectively.
And a fourth switch, and fifth and sixth switches for connecting the other terminal of the second capacitor to a ground terminal and the second terminal of the comparator, respectively. At the same time, it has the effects of achieving low power consumption, high accuracy, and a small occupied area.
第１図，第２図はそれぞれ本発明の比較回路の第1,第２
の実施例を示す回路図、第３図は従来の比較回路の一例
を示す回路図である。 １……入力端子、２……出力端子、3,31……接地端子、
４……基準電源、5,6,61,62,〜6n……容量、7,8,9,10,1
1,12,S１，〜Sn……スイッチ、13,30……コンパレー
タ、32……電源端子。1 and 2 are respectively the first and second comparison circuits of the present invention.
FIG. 3 is a circuit diagram showing an embodiment of the above, and FIG. 3 is a circuit diagram showing an example of a conventional comparison circuit. 1 …… input terminal, 2 …… output terminal, 3,31 …… ground terminal,
4 ... Reference power supply, 5,6,61,62, to 6n ... Capacity, 7,8,9,10,1
1,12, S 1 , ... Sn …… Switch, 13,30 …… Comparator, 32 …… Power supply terminal.
Claims (2)
電源により決定される電圧と比較される比較電圧を接続
する第２の端子と比較結果を出力する第３の端子とを有
するコンパレータと、第１の容量と、一方の端子を前記
基準電源に接続した第２の容量と、前記第１の容量の一
方の端子を接地端子および前記基準電源にそれぞれ接続
するための第１および第２のスイッチと、前記第１の容
量の他方の端子を入力端子および前記第２の容量の他方
の端子にそれぞれ接続するための第３および第４のスイ
ッチと、前記第２の容量の他方の端子を接地端子および
前記コンパレータの前記第２の端子にそれぞれ接続する
ための第５および第６のスイッチとを備えることを特徴
とする比較回路。1. A comparator having a first terminal for connecting a reference power supply, a second terminal for connecting a comparison voltage to be compared with a voltage determined by the reference power supply, and a third terminal for outputting a comparison result. A first capacitor, a second capacitor having one terminal connected to the reference power source, and first and first capacitors for connecting one terminal of the first capacitor to a ground terminal and the reference power source, respectively. Two switches, third and fourth switches for connecting the other terminal of the first capacitance to the input terminal and the other terminal of the second capacitance, respectively, and the other of the second capacitance. A comparison circuit, comprising: a fifth terminal and a sixth switch for connecting a terminal to a ground terminal and the second terminal of the comparator, respectively.
る複数の容量素子からなる容量アレイで構成されること
を特徴とする特許請求の範囲第（１）項記載の比較回
路。2. The comparison circuit according to claim 1, wherein the second capacitance is composed of a capacitance array composed of a plurality of capacitance elements capable of selecting a desired capacitance value.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13469687A JPH0664091B2 (en) | 1987-05-28 | 1987-05-28 | Comparison circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13469687A JPH0664091B2 (en) | 1987-05-28 | 1987-05-28 | Comparison circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS63298071A JPS63298071A (en) | 1988-12-05 |
| JPH0664091B2 true JPH0664091B2 (en) | 1994-08-22 |
Family
ID=15134456
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13469687A Expired - Lifetime JPH0664091B2 (en) | 1987-05-28 | 1987-05-28 | Comparison circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0664091B2 (en) |
-
1987
- 1987-05-28 JP JP13469687A patent/JPH0664091B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPS63298071A (en) | 1988-12-05 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US6563235B1 (en) | Switched capacitor array circuit for use in DC-DC converter and method | |
| JP2736789B2 (en) | Driver circuit device | |
| JPS6139726A (en) | Digital-analog converting circuit | |
| JPH11164545A (en) | Method and device for reducing power current surge in charge pump by using delay clock line | |
| JPH056688A (en) | Sample and hold circuit | |
| EP0163333A1 (en) | Filter arrangement | |
| EP2223422A2 (en) | Integrated circuit with a dc-dc converter | |
| JPH02146815A (en) | Input circuit for semiconductor integrated circuit | |
| JPH0664091B2 (en) | Comparison circuit | |
| JPH06164323A (en) | Switched capacitor circuit | |
| JP4104835B2 (en) | D / A converter circuit | |
| JP2858164B2 (en) | Power supply | |
| JPS63298072A (en) | Comparator | |
| JPS63289461A (en) | Comparator circuit | |
| JP2963914B2 (en) | Boost circuit | |
| JPH01147912A (en) | Analog voltage generating circuit | |
| JPH035040Y2 (en) | ||
| CN220457114U (en) | Voltage equalizing circuit of series capacitor circuit | |
| JP2978527B6 (en) | Analog integrated circuit | |
| JP2796866B2 (en) | Charge pump circuit | |
| JPH0297114A (en) | Semiconductor device | |
| JP3210978B2 (en) | Integrator circuit | |
| JPS61251232A (en) | Analog-digital converter | |
| JPH02288724A (en) | Delay circuit | |
| JPS635296Y2 (en) |