JPH0644093A

JPH0644093A - System for changing-over duplicating device

Info

Publication number: JPH0644093A
Application number: JP4079676A
Authority: JP
Inventors: Tadashi Mizuguchi; 忠水口; Takaaki Yamamoto; 高明山本
Original assignee: NEC Corp; NEC Communication Systems Ltd
Current assignee: NEC Corp; NEC Communication Systems Ltd
Priority date: 1992-04-01
Filing date: 1992-04-01
Publication date: 1994-02-18

Abstract

PURPOSE:To forcibly let a processor perform system change-over even at the time of a fault in the system change-over of a duplicating device where the processor is mounted. CONSTITUTION:The duplicating device is provided with a change detecting circuit 2 detecting the change of operation state indication from active to reserve, a monitoring timer 4 started by the change of operation state indication information and a control circuit 3 permitting one of an acknowledge signal from the processor 1 or an overflow signal from the monitoring timer 4 to be a trigger so as to execute system change-over. At the time of normality in the processor 1, system change-over (the change-over of an operation state) is executed by the acknowledge signal from the processor to which the change of the operation state is transmitted. Unless the acknowledge signal is outputted at the time of the fault in the processor, system change-over is executed with the overflow signal of the monitoring timer 4 as the trigger.

Description

【発明の詳細な説明】Detailed Description of the Invention

【０００１】[0001]

【産業上の利用分野】本発明はプロセッサを有する二重
化装置における現用系及び予備系の系切替方式に関す
る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a system switching system for an active system and a standby system in a duplexer having a processor.

【０００２】[0002]

【従来の技術】従来のプロセッサを有する二重化装置の
切替方式では、切替指示があると、プロセッサ制御によ
り切替時の準備処理を実行した後に、切替を実行してい
た。2. Description of the Related Art In a conventional switching system for a duplexer having a processor, when a switching instruction is issued, switching is performed after a preparatory process for switching is performed under processor control.

【０００３】[0003]

【発明が解決しようとする課題】この従来の切替方式で
は、プロセッサが準備処理を実行し、プロセッサよりの
アクノレッジ信号が出力されたことにより、切替が実行
されるので、プロセッサに障害が発生すると、アクノレ
ッジ信号が出力されず切替が実行されなくなる問題点が
ある。In this conventional switching system, the processor executes the preparation process and the switching is executed by the output of the acknowledge signal from the processor. Therefore, when a failure occurs in the processor, There is a problem that the acknowledge signal is not output and the switching is not executed.

【０００４】[0004]

【課題を解決するための手段】本発明の二重化装置切替
方式は、プロセッサを有する二重化装置における現用系
と予備系との動作状態の切替方式において、前記二重化
装置内に上位装置からの動作状態指示情報の変化を検出
し前記プロセッサに伝達する手段と、前記動作状態指示
情報の変化時点からの一定時間を監視するタイマーと、
前記プロセッサからのアクノレッジ信号と前記監視タイ
マーからのオーバーフロー信号とのどちらかの信号の受
信により動作状態を切替える制御回路とを備えている。A duplexer switching system of the present invention is a system for switching the operating state of an active system and a standby system in a duplexer having a processor, and an operating state instruction from a host device in the duplexer is provided. Means for detecting a change in information and transmitting it to the processor; and a timer for monitoring a fixed time from the time when the operating state instruction information changes,
And a control circuit for switching an operating state by receiving either an acknowledge signal from the processor or an overflow signal from the monitoring timer.

【０００５】[0005]

【実施例】次に本発明について図面を参照して説明す
る。The present invention will be described below with reference to the drawings.

【０００６】図１は本発明の一実施例のブロック図であ
る。二重化装置の片系を０系、他の片系を１系とここで
は呼び、０系，１系は同一構成である。０系，１系とも
プロセッサ１と、動作状態指示情報の変化検出回路２
と、動作状態を切替える制御回路３と、動作状態指示情
報の変化からの時間を監視する監視タイマー３とを有し
ている。FIG. 1 is a block diagram of an embodiment of the present invention. Here, one system of the duplexer is referred to as 0 system and the other system is referred to as 1 system, and 0 system and 1 system have the same configuration. A processor 1 and a change detection circuit 2 for operating state instruction information for both system 0 and system 1
And a control circuit 3 for switching the operating state, and a monitoring timer 3 for monitoring the time from the change of the operating state instruction information.

【０００７】次に、０系が現用系から予備系へ、１系が
予備系から現用系へ切替るケースについて説明する。Next, a case where the 0-system is switched from the active system to the standby system and the 1-system is switched from the standby system to the active system will be described.

【０００８】０系に対し、上位装置からの動作状態指示
は現用から予備へ変化し、変化検出回路２がこの変化を
検出しプロセッサ１に伝達する。一方、監視タイマー４
は、変化時点よりタイマーが起動される。プロセッサ１
は、切替準備処理終了後、両系の制御回路３にアクノレ
ッジ信号を出力する。同様に、１系に対しても動作状態
指示は予備から現用に変化し、以降０系と同様にプロセ
ッサ１は両系にアクノレッジ信号を出力する。各々の系
の制御回路３は、両系のプロセッサ１からのアクノレッ
ジ信号を受信した時点で系切替を実行する。With respect to the 0 system, the operating state instruction from the host device changes from the active state to the standby state, and the change detection circuit 2 detects this change and transmits it to the processor 1. Meanwhile, monitoring timer 4
, The timer is started from the point of change. Processor 1
Outputs an acknowledge signal to the control circuits 3 of both systems after the switching preparation process is completed. Similarly, for the 1-system, the operating state instruction changes from standby to active, and thereafter, like the 0-system, the processor 1 outputs an acknowledge signal to both systems. The control circuit 3 of each system executes system switching at the time of receiving an acknowledge signal from the processors 1 of both systems.

【０００９】プロセッサ１に障害が発生し、アクノレッ
ジ信号を両系プロセッサ１から受信できない時は、各々
の系の監視タイマー４がオーバーフロー信号を出力し、
制御回路３はオーバーフロー信号により切替を実行す
る。この監視タイマー４のオーバーフロー時間は、プロ
セッサ１が正常時にアクノレッジ信号を返答するのに要
する時間より大きく設定する必要がある。When a failure occurs in the processor 1 and an acknowledge signal cannot be received from both processors 1, the monitor timer 4 of each system outputs an overflow signal,
The control circuit 3 executes switching by the overflow signal. The overflow time of the monitoring timer 4 needs to be set longer than the time required for the processor 1 to reply an acknowledge signal when the processor 1 is normal.

【００１０】[0010]

【発明の効果】以上説明したように本発明は、動作状態
指示情報の変化時点から一定時間を監視するタイマーを
備えることにより、プロセッサ正常時には情報欠落のな
い連続的な切替を提供することができ、プロセッサ障害
時でも強制的に切替を実行することができ、二重化装置
の信頼生を高めることができる。As described above, the present invention can provide continuous switching without information loss when the processor is normal by providing the timer for monitoring the fixed time from the change point of the operating state instruction information. The switching can be forcibly executed even when the processor fails, and the reliability of the duplexer can be improved.

【図面の簡単な説明】[Brief description of drawings]

【図１】本発明の一実施例のブロック図である。FIG. 1 is a block diagram of an embodiment of the present invention.

【符号の説明】[Explanation of symbols]

１プロセッサ２変化検出回路３制御回路４監視タイマー 1 Processor 2 Change detection circuit 3 Control circuit 4 Monitoring timer

Claims

【特許請求の範囲】[Claims]

【請求項１】プロセッサを有する二重化装置における
現用系と予備系との動作状態の切替方式において、前記
二重化装置内に上位装置からの動作状態指示情報の変化
を検出し前記プロセッサに伝達する手段と、前記動作状
態指示情報の変化時点からの一定時間を監視するタイマ
ーと、前記プロセッサからのアクノレッジ信号と前記監
視タイマーからのオーバーフロー信号とのどちらかの信
号の受信により動作状態を切替える制御回路とを備える
ことを特徴とする二重化装置切替方式。1. In a method of switching the operating state of a working system and a standby system in a duplexer having a processor, means for detecting a change in operating state instruction information from a host device in the duplexer and transmitting the change to the processor. A timer for monitoring a fixed time from the time when the operating state instruction information changes, and a control circuit for switching the operating state by receiving either an acknowledge signal from the processor or an overflow signal from the monitoring timer. A duplexer switching system characterized by being provided.