JPH06314718A - Semiconductor integrated circuit pellet - Google Patents

Semiconductor integrated circuit pellet

Info

Publication number
JPH06314718A
JPH06314718A JP5101632A JP10163293A JPH06314718A JP H06314718 A JPH06314718 A JP H06314718A JP 5101632 A JP5101632 A JP 5101632A JP 10163293 A JP10163293 A JP 10163293A JP H06314718 A JPH06314718 A JP H06314718A
Authority
JP
Japan
Prior art keywords
pellet
groove
island
integrated circuit
wafer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5101632A
Other languages
Japanese (ja)
Inventor
Makio Beppu
牧夫 別府
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP5101632A priority Critical patent/JPH06314718A/en
Publication of JPH06314718A publication Critical patent/JPH06314718A/en
Pending legal-status Critical Current

Links

Classifications

    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B29—WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
    • B29C—SHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
    • B29C66/00—General aspects of processes or apparatus for joining preformed parts
    • B29C66/40—General aspects of joining substantially flat articles, e.g. plates, sheets or web-like materials; Making flat seams in tubular or hollow articles; Joining single elements to substantially flat surfaces
    • B29C66/41—Joining substantially flat articles ; Making flat seams in tubular or hollow articles
    • B29C66/45—Joining of substantially the whole surface of the articles
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B29—WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
    • B29C—SHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
    • B29C65/00—Joining or sealing of preformed parts, e.g. welding of plastics materials; Apparatus therefor
    • B29C65/48—Joining or sealing of preformed parts, e.g. welding of plastics materials; Apparatus therefor using adhesives, i.e. using supplementary joining material; solvent bonding
    • B29C65/4895—Solvent bonding, i.e. the surfaces of the parts to be joined being treated with solvents, swelling or softening agents, without adhesives
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B29—WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
    • B29C—SHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
    • B29C66/00—General aspects of processes or apparatus for joining preformed parts
    • B29C66/01—General aspects dealing with the joint area or with the area to be joined
    • B29C66/32—Measures for keeping the burr form under control; Avoiding burr formation; Shaping the burr
    • B29C66/322—Providing cavities in the joined article to collect the burr
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B29—WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
    • B29C—SHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
    • B29C66/00—General aspects of processes or apparatus for joining preformed parts
    • B29C66/01—General aspects dealing with the joint area or with the area to be joined
    • B29C66/05—Particular design of joint configurations
    • B29C66/10—Particular design of joint configurations particular design of the joint cross-sections
    • B29C66/11—Joint cross-sections comprising a single joint-segment, i.e. one of the parts to be joined comprising a single joint-segment in the joint cross-section
    • B29C66/112—Single lapped joints
    • B29C66/1122—Single lap to lap joints, i.e. overlap joints
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B29—WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
    • B29C—SHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
    • B29C66/00—General aspects of processes or apparatus for joining preformed parts
    • B29C66/40—General aspects of joining substantially flat articles, e.g. plates, sheets or web-like materials; Making flat seams in tubular or hollow articles; Joining single elements to substantially flat surfaces
    • B29C66/41—Joining substantially flat articles ; Making flat seams in tubular or hollow articles
    • B29C66/45—Joining of substantially the whole surface of the articles
    • B29C66/452—Joining of substantially the whole surface of the articles the article having a disc form, e.g. making CDs or DVDs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29199—Material of the matrix
    • H01L2224/29294—Material of the matrix with a principal constituent of the material being a liquid not provided for in groups H01L2224/292 - H01L2224/29291
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29338—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29339—Silver [Ag] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8336—Bonding interfaces of the semiconductor or solid state body
    • H01L2224/83365—Shape, e.g. interlocking features
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8384—Sintering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0657—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/1015—Shape
    • H01L2924/10155—Shape being other than a cuboid
    • H01L2924/10158—Shape being other than a cuboid at the passive surface

Abstract

PURPOSE:To eliminate the poor adhesion between a pellet and an island, and to prevent generation of cracks on the pellet by a method wherein, after the pellet has been die-bonded, the foam, generated by the evaporation of the solvent contained in silver paste when curing the die-bonding silver paste, is effectively dissipated. CONSTITUTION:A foam-releasing path, which is used to efficiently dissipate a solvent when die-bonding paste is cured, is formed by providing grooves 2 of 20 to 100mum in width and 30 to 100mum in depth leaving the space of 200 to 800mum on the backside of a pellet 1.

Description

【発明の詳細な説明】Detailed Description of the Invention

【０００１】[0001]

【産業上の利用分野】本発明は半導体集積回路ペレット
に関し、特にダイボンディング性を向上させるためのペ
レットの裏面構造に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor integrated circuit pellet, and more particularly to a back surface structure of the pellet for improving die bonding property.

【０００２】[0002]

【従来の技術】従来の半導体集積回路ペレット（以下単
にペレットと称する）の構造を図３（ａ）、（ｂ）、
（ｃ）を用いて説明する。同図（ａ）は半導体ウェーハ
（以下単にウェーハと称する）１３の表面に所定の集積
回路素子を形成した後、３０〜４０μｍ程度の粒径の研
磨材を有する研削砥石でウェーハを所定の厚さに研削加
工した後の断面図を示している。この方法では、ダイボ
ンディングされたペレットとアイランドとの接触抵抗を
低減する目的で、同図（ｂ）の部分拡大斜視図に示すよ
うに、０．５μｍないしそれ以上の深さ９を有する溝８
がウェーハ１３の裏面に形成される（特開昭６２−２４
３３３２号参照）。また同図（ｃ）はこのペレット１を
パッケージ等のアイランド６に銀ペースト７を用いてダ
イボンディングした状態を示す断面図で、気泡１４が銀
ペースト７中に含まれた状態を示している。2. Description of the Related Art The structure of a conventional semiconductor integrated circuit pellet (hereinafter simply referred to as a pellet) is shown in FIGS.
An explanation will be given using (c). FIG. 1A shows that after a predetermined integrated circuit element is formed on the surface of a semiconductor wafer (hereinafter simply referred to as a wafer) 13, the wafer is made to have a predetermined thickness with a grinding wheel having an abrasive having a grain size of about 30 to 40 μm. The cross-sectional view after grinding is shown in FIG. In this method, in order to reduce the contact resistance between the die-bonded pellet and the island, as shown in the partially enlarged perspective view of FIG. 7B, the groove 8 having a depth 9 of 0.5 μm or more is provided.
Are formed on the back surface of the wafer 13 (JP-A-62-24).
3332). Further, FIG. 3C is a sectional view showing a state in which the pellet 1 is die-bonded to an island 6 such as a package by using a silver paste 7, and shows a state in which bubbles 14 are contained in the silver paste 7.

【０００３】図４（ａ）、（ｂ）は従来の他のウェーハ
構造を示したものである（特開昭６１−８９３４号参
照）。同図（ａ）はウェーハ１３の表面に所定の集積回
路素子を形成した後、ウェーハ１３の裏面にウェーハの
厚部１２と薄部１１が交互に存在するように溝１０を平
行に設けた断面図を示している。同図（ｂ）はそのウェ
ーハ裏面の平面図である。この従来例は、大型ペレット
やフルウェーハＬＳＩのように、ペレットをアイランド
に取り付けた後、温度サイクルを受けるとペレットとア
イランドの熱膨張係数の差により生ずる応力によって、
ペレットにクラックが発生するのをするために、ウェー
ハの薄部１１のたわみを利用してこの応力を均等に緩和
するようになっている。そのため、厚部１２と薄部１１
とはほぼ同程度の幅を有する。従って、ペレットがアイ
ランドに接着する面積は、図３で示した従来例に比較し
て大幅に小さくなる。FIGS. 4A and 4B show another conventional wafer structure (see Japanese Patent Laid-Open No. 61-8934). FIG. 3A is a cross-sectional view in which a predetermined integrated circuit element is formed on the front surface of the wafer 13 and then grooves 10 are provided in parallel on the back surface of the wafer 13 so that thick portions 12 and thin portions 11 of the wafer are alternately present. The figure is shown. FIG. 3B is a plan view of the back surface of the wafer. In this conventional example, like a large pellet or a full-wafer LSI, when a pellet is attached to an island and then subjected to a temperature cycle, the stress caused by the difference in thermal expansion coefficient between the pellet and the island causes
In order to prevent cracks from occurring in the pellet, the stress of the thin portion 11 of the wafer is utilized to evenly relax this stress. Therefore, the thick portion 12 and the thin portion 11
And have almost the same width. Therefore, the area where the pellet adheres to the island is significantly smaller than that in the conventional example shown in FIG.

【０００４】[0004]

【発明が解決しようとする課題】一般にペレットをパッ
ケージに搭載するためには、銀ペースト等を用いてペレ
ットをアイランドにダイボンディングしているが、実用
に耐える接着強度を得るためにはペレットをアイランド
に接着後、１００〜３５０℃程度の温度中でキュアして
銀ペースト中に含まれる溶剤を気化し外部に放散する必
要がある。特に最近では、半導体製造設備の複合化が進
むにつれインライン処理のため、比較的高温、短時間で
キュアを行う必要が生じている。Generally, in order to mount the pellet on the package, the pellet is die-bonded to the island using silver paste or the like. After bonding, it is necessary to cure at a temperature of about 100 to 350 ° C. to vaporize the solvent contained in the silver paste and diffuse it to the outside. Particularly in recent years, as semiconductor manufacturing facilities have become more complex, it has become necessary to perform curing at a relatively high temperature for a short time because of in-line processing.

【０００５】図３で説明した従来例では、上記のように
高温のキュアを行った場合、同図（ｃ）に示したように
銀ペースト７中に含まれる溶剤が急速に気化するが、そ
れを外部に充分に放散することができないため銀ペース
ト７中に気泡１４が残存してしまう。そのため、ペレッ
ト１は浮き上がると同時にペレットとアイランドとの接
着面積は大幅に減少し、接着強度が著しく低下する。こ
の場合、ペレット裏面に溝８が存在するため溝８の部分
から溶剤の放散が考えられるが、粒径３０〜４０μｍの
砥材でできる溝の深さはせいぜい０．５μｍ程度である
ため銀ペーストで埋まり、溶剤放散の役割は全く果して
いない。In the conventional example described with reference to FIG. 3, when the high temperature curing is performed as described above, the solvent contained in the silver paste 7 is rapidly vaporized as shown in FIG. The air bubbles 14 remain in the silver paste 7 because they cannot be sufficiently diffused to the outside. Therefore, the pellet 1 floats up, and at the same time, the adhesive area between the pellet and the island is greatly reduced, and the adhesive strength is significantly reduced. In this case, since there is a groove 8 on the back surface of the pellet, the solvent may be diffused from the groove 8, but since the depth of the groove formed by an abrasive having a particle size of 30 to 40 μm is about 0.5 μm at most, the silver paste is used. Filled with, and does not play the role of solvent emission at all.

【０００６】このため、特にモールド樹脂を用いた集積
回路パッケージでは、モールド樹脂封止後の主に樹脂に
よる応力によりペレットがアイランドから剥離し、外部
から浸透した水分がこのペレットとアイランドとの間に
まで侵入する。この状態で、例えばプレッシャークッカ
ー試験等の耐湿試験を行うと、その水分が試験中に気化
するため蒸気圧によりモールド樹脂にクラックが入るい
わゆるパッケージクラックが発生し、半導体装置として
の信頼性が著しく低下するという問題点を有する。Therefore, particularly in an integrated circuit package using a mold resin, the pellets are separated from the island mainly due to the stress of the resin after the molding resin is sealed, and the moisture permeated from the outside is absorbed between the pellet and the island. Intrude up to. In this state, for example, if a moisture resistance test such as a pressure cooker test is performed, the moisture evaporates during the test, so that vapor pressure causes cracks in the mold resin, so-called package cracks occur, and the reliability as a semiconductor device decreases significantly. There is a problem of doing.

【０００７】また、溶剤放散を改良する従来例として、
図４（ａ）、（ｂ）に示したようにウェーハ裏面に広い
幅の溝を設けた場合は、キュア中の溶剤の放散は比較的
良いが、上述のペレットとアイランドの熱膨張係数の違
いによる応力をこの溝の部分で吸収するためには、少な
くともｍｍオーダーの溝幅が必要であり、さらに、ウェ
ーハすなわちペレット裏面に厚部１２と薄部１１を同程
度の幅で設けているためペレットとアイランドの接着面
積は大幅に減少し、かえって接着強度が低下して剥離が
生じ易くなるという問題点を有する。Further, as a conventional example for improving solvent emission,
When a wide groove is provided on the back surface of the wafer as shown in FIGS. 4 (a) and 4 (b), the solvent is relatively well diffused during curing, but the difference in the thermal expansion coefficient between the pellet and the island is described above. In order to absorb the stress due to the groove portion at this groove portion, a groove width of at least mm order is necessary. Further, since the thick portion 12 and the thin portion 11 are provided on the back surface of the wafer, that is, the pellet, with the same width, the pellet There is a problem in that the adhesion area of the island is greatly reduced, and the adhesion strength is rather lowered, and peeling easily occurs.

【０００８】また、このｍｍオーダーの溝幅では、ペレ
ットとアイランド間の空隙面が広くなり過ぎるため水分
が無視できない程侵入する。そのため、かえってパッケ
ージクラックが生じやすくなるという問題点も発生して
いた。Further, with the groove width of the order of mm, the space between the pellet and the island becomes too wide, so that water penetrates to a considerable extent. Therefore, there is a problem that package cracks are more likely to occur.

【０００９】[0009]

【課題を解決するための手段】本発明は、ペレットの裏
面に幅２０〜１００μｍ、深さ３０〜１００μｍの溶剤
放散用の溝を２００〜８００μｍの間隔で設けることに
よって上述の問題点を解決している。SUMMARY OF THE INVENTION The present invention solves the above problems by providing solvent diffusion grooves having a width of 20 to 100 μm and a depth of 30 to 100 μm at intervals of 200 to 800 μm on the back surface of a pellet. ing.

【００１０】[0010]

【実施例】次に本発明について図面を参照して説明す
る。図１（ａ）、（ｂ）、（ｃ）は本発明の第１の実施
例を示す図である。同図（ａ）は、所定の集積回路素子
が形成されたペレット１の裏面に、幅３が２０〜１００
μｍ、深さ５が３０〜１００μｍの溝２を、その間隔４
が２００〜８００μｍとなるように設けた断面図であ
る。また、同図（ｂ）はペレット裏面の斜視図である。
また、同図（ｃ）はペレット１をアイランド６に銀ペー
スト７を介してダイボンディングした状態を示す断面図
である。The present invention will be described below with reference to the drawings. 1 (a), 1 (b) and 1 (c) are views showing a first embodiment of the present invention. FIG. 1A shows that the width 3 is 20 to 100 on the back surface of the pellet 1 on which a predetermined integrated circuit element is formed.
The groove 2 having a depth of 5 μm and a depth of 5 is 30 to 100 μm, and the gap 4
Is a cross-sectional view provided so as to be 200 to 800 μm. Further, FIG. 6B is a perspective view of the back surface of the pellet.
Further, FIG. 3C is a sectional view showing a state in which the pellet 1 is die-bonded to the island 6 via the silver paste 7.

【００１１】本実施例において、ウェーハの裏面に溝を
形成する際に最も問題となるのは、ペレットの機械的強
度の低下である。そこで、本実施例ではペレットの強度
をできるだけ低下させることなく、かつ溝加工技術を考
慮して以下に述べるような根拠に基づいて溝寸法を決定
した。In this embodiment, the most problematic problem when forming the groove on the back surface of the wafer is the decrease in mechanical strength of the pellet. Therefore, in this example, the groove size was determined based on the following reason in consideration of the groove processing technique without reducing the strength of the pellet as much as possible.

【００１２】まず、溝の深さについては、通常、ペレッ
トの厚さは平均すると３００μｍ程度である。このペレ
ットに溝を設けることによって薄くなる部分が生じ、ダ
イボンディング時の振動あるいはワイヤボンディング時
のツールによる衝撃で割れる恐れがある。これに耐え得
る薄部として、厚さの１／３程度の深さ、すなわち最大
１００μｍ程度の深さまでは問題がないという知見に基
づく。また、銀ペースト７の溝２への這い上りを考慮し
て下限深さは３０μｍとしている。First, regarding the depth of the groove, the average thickness of the pellet is usually about 300 μm. By providing a groove in the pellet, a thinned portion is generated, which may be broken by vibration during die bonding or impact by a tool during wire bonding. It is based on the knowledge that there is no problem at a depth of about 1/3 of the thickness, that is, at a maximum depth of about 100 μm as a thin portion that can withstand this. The lower limit depth is set to 30 μm in consideration of the creep of the silver paste 7 into the groove 2.

【００１３】次に、溝幅については、ペレット上に形成
されるボンディングパッドの大きさは通常１００μｍ角
である。そのため、ペレットの薄い部分の幅、すなわち
溝幅を１００μｍ以上とするのはワイヤボンディング時
の衝撃を考えると危険であり、また、溝加工を行う際の
切削ブレードを用いた加工幅の下限は２０μｍ程度であ
ることから、２０〜１００μｍの値が得られた。Regarding the groove width, the size of the bonding pad formed on the pellet is usually 100 μm square. Therefore, it is dangerous to set the width of the thin portion of the pellet, that is, the groove width to 100 μm or more, considering the impact at the time of wire bonding, and the lower limit of the processing width using the cutting blade when performing groove processing is 20 μm. Since it was a degree, a value of 20 to 100 μm was obtained.

【００１４】次に、溝間隔については、溶剤を効率よく
放散するためには溝数を増やすのが好ましいが、そうす
るとペレットのアイランドへの接着面積が減少すること
から接着強度も減少するという問題がある。そのため、
適正な溝を設けることによって気泡を効率よく放散する
ことができれば接着強度も向上することを考慮し、接着
面積を最大１／２程度減らしても接着強度を維持できる
という知見に基づいて、平均して溝幅の約１０倍程度の
範囲をカバーする値として２００〜８００μｍとしてい
る。Next, regarding the groove interval, it is preferable to increase the number of grooves in order to efficiently disperse the solvent. However, if this is done, the adhesion area of the pellets to the islands will decrease, and the adhesive strength will also decrease. is there. for that reason,
Considering that the adhesive strength will be improved if the bubbles can be efficiently diffused by providing an appropriate groove, and based on the finding that the adhesive strength can be maintained even if the adhesive area is reduced by about 1/2 at the maximum, The value covering the range of about 10 times the groove width is 200 to 800 μm.

【００１５】以上述べたように本実施例によれば、図１
（ｃ）に示したように、深さ３０〜１００μｍの溝２は
銀ペースト７で埋まらない深さであるため溶剤の逃げ道
ができ、溶剤放散の役割を充分に果す。また、ペレット
裏面全体の溶剤を効率良く放散するために溝間隔４を数
百μｍとしているので、例えば溝の幅と間隔との比を
１：１０程度とすれば、ペレットの接着面積の減少はほ
とんど無視でき、従ってペレットの発熱による熱放散も
問題なく行われる。As described above, according to this embodiment, FIG.
As shown in (c), the groove 2 having a depth of 30 to 100 μm is a depth that is not filled with the silver paste 7, so that the escape path for the solvent can be formed and the solvent can be sufficiently diffused. Further, since the groove interval 4 is set to several hundreds of μm in order to efficiently disperse the solvent on the entire back surface of the pellet, for example, if the ratio of the groove width to the interval is about 1:10, the adhesive area of the pellet will not decrease. It is almost negligible, so that heat dissipation by the heat generation of the pellets also occurs without problems.

【００１６】図２は本発明の第２の実施例を示す断面図
である。本実施例においては、溝の寸法、加工方法は第
１の実施例と同様である。第１の実施例と異なる所は、
比較的薄い（例えば２５０μｍ）ペレット１に深さ方向
に斜めに切り込みを入れて溝２を形成し、溶剤放散の役
割を果たすのに充分な深さと溝の部分におけるペレット
の厚みを確保し、ペレットの強度低下を防止している点
である。FIG. 2 is a sectional view showing a second embodiment of the present invention. In this embodiment, the dimensions of the groove and the processing method are the same as those in the first embodiment. The difference from the first embodiment is that
A relatively thin (eg, 250 μm) pellet 1 is cut diagonally in the depth direction to form a groove 2 to ensure a sufficient depth and a thickness of the pellet in the groove to play a role of solvent diffusion. This is the point that the decrease in strength is prevented.

【００１７】[0017]

【発明の効果】以上説明したように本発明は、ペレット
裏面に溶剤放散用の溝を設けることによって、ダイボン
ディング後のキュア時に銀ペーストに含まれる気化した
溶剤を効率よく放散することができるので、ペレットの
接着強度が向上し特にモールド樹脂を用いたパッケージ
におけるペレットのアイランドからの剥離、ひいてはパ
ッケージクラックの発生が防止され、信頼度の高い半導
体装置を得ることができる。As described above, according to the present invention, by providing the groove for solvent diffusion on the back surface of the pellet, the vaporized solvent contained in the silver paste can be efficiently diffused at the time of curing after die bonding. Further, the adhesive strength of the pellets is improved, and in particular, the peeling of the pellets from the island in the package using the mold resin and the occurrence of package cracks are prevented, and a highly reliable semiconductor device can be obtained.

【図面の簡単な説明】[Brief description of drawings]

【図１】本発明の第１の実施例を示す図で、同図（ａ）
は断面図、同図（ｂ）はペレット裏面側の斜視図、同図
（ｃ）はペレットをアイランドに固着した断面図であ
る。FIG. 1 is a diagram showing a first embodiment of the present invention, in which FIG.
Is a cross-sectional view, FIG. 6B is a perspective view of the back surface side of the pellet, and FIG. 6C is a cross-sectional view in which the pellet is fixed to the island.

【図２】本発明の第２の実施例を示す断面図である。FIG. 2 is a sectional view showing a second embodiment of the present invention.

【図３】従来のウェーハを示す図で、同図（ａ）は断面
図、同図（ｂ）はウェーハ裏面の部分拡大斜視図、同図
（ｃ）はダイシングしたペレットをアイランドに固着し
た断面図である。3A and 3B are views showing a conventional wafer, in which FIG. 3A is a sectional view, FIG. 3B is a partially enlarged perspective view of the back surface of the wafer, and FIG. 3C is a sectional view in which a diced pellet is fixed to an island. It is a figure.

【図４】従来のウェーハを示す図で、同図（ａ）は断面
図、同図（ｂ）は底面図である。4A and 4B are views showing a conventional wafer, in which FIG. 4A is a sectional view and FIG. 4B is a bottom view.

【符号の説明】[Explanation of symbols]

１ ペレット ２、８、１０ 溝 ３ 溝の幅 ４ 溝の間隔 ５、９ 溝の深さ ６ アイランド ７ 銀ペースト １１ 薄部 １２ 厚部 １３ ウェーハ １４ 気泡 1 Pellet 2, 8, 10 Groove 3 Groove width 4 Groove spacing 5, 9 Groove depth 6 Island 7 Silver paste 11 Thin part 12 Thick part 13 Wafer 14 Bubble

Claims (2)

【特許請求の範囲】[Claims] 【請求項１】 表面に集積回路が形成されている半導体
集積回路ペレットにおいて、ペレット裏面に幅２０〜１
００μｍ、深さ３０〜１００μｍの溝が２００〜８００
μｍの間隔で設けられていることを特徴とする半導体集
積回路ペレット。1. A semiconductor integrated circuit pellet having an integrated circuit formed on the front surface, the width of 20 to 1 on the back surface of the pellet.
A groove of 00 μm and a depth of 30 to 100 μm is 200 to 800
A semiconductor integrated circuit pellet characterized by being provided at intervals of μm. 【請求項２】 前記溝がペレット裏面に対し斜め方向に
切り込まれている請求項１記載の半導体集積回路ペレッ
ト。2. The semiconductor integrated circuit pellet according to claim 1, wherein the groove is cut obliquely with respect to the back surface of the pellet.
JP5101632A 1993-04-28 1993-04-28 Semiconductor integrated circuit pellet Pending JPH06314718A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5101632A JPH06314718A (en) 1993-04-28 1993-04-28 Semiconductor integrated circuit pellet

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5101632A JPH06314718A (en) 1993-04-28 1993-04-28 Semiconductor integrated circuit pellet

Publications (1)

Publication Number Publication Date
JPH06314718A true JPH06314718A (en) 1994-11-08

Family

ID=14305780

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5101632A Pending JPH06314718A (en) 1993-04-28 1993-04-28 Semiconductor integrated circuit pellet

Country Status (1)

Country Link
JP (1) JPH06314718A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10029791A1 (en) * 2000-06-16 2002-01-03 Infineon Technologies Ag Process for establishing a stable connection between two wafers
JP2013229561A (en) * 2012-03-30 2013-11-07 Mitsubishi Materials Corp Method for manufacturing joined body, method for manufacturing power module, substrate for power module, and power module
KR101423136B1 (en) * 2012-12-28 2014-07-25 한국광기술원 Semiconductor bonding assembly and semiconductor bonding method
KR101455178B1 (en) * 2014-02-27 2014-10-27 한국광기술원 Semiconductor bonding assembly
EP3982397A1 (en) * 2012-11-28 2022-04-13 Dowa Metaltech Co., Ltd. Electronic device with an electronic part sinter-bonded directly to a rough nickel-plated aluminium mounting surface of a mounting substrate and method for producing the same

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54133072A (en) * 1978-04-06 1979-10-16 Nec Corp Semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54133072A (en) * 1978-04-06 1979-10-16 Nec Corp Semiconductor device

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10029791A1 (en) * 2000-06-16 2002-01-03 Infineon Technologies Ag Process for establishing a stable connection between two wafers
DE10029791C2 (en) * 2000-06-16 2002-04-18 Infineon Technologies Ag Process for establishing a stable connection between two wafers
US6673189B2 (en) 2000-06-16 2004-01-06 Infineon Technologies Ag Method for producing a stable bond between two wafers
JP2013229561A (en) * 2012-03-30 2013-11-07 Mitsubishi Materials Corp Method for manufacturing joined body, method for manufacturing power module, substrate for power module, and power module
EP3982397A1 (en) * 2012-11-28 2022-04-13 Dowa Metaltech Co., Ltd. Electronic device with an electronic part sinter-bonded directly to a rough nickel-plated aluminium mounting surface of a mounting substrate and method for producing the same
KR101423136B1 (en) * 2012-12-28 2014-07-25 한국광기술원 Semiconductor bonding assembly and semiconductor bonding method
KR101455178B1 (en) * 2014-02-27 2014-10-27 한국광기술원 Semiconductor bonding assembly

Similar Documents

Publication Publication Date Title
US7808089B2 (en) Leadframe having die attach pad with delamination and crack-arresting features
US8053869B2 (en) Package having exposed integrated circuit device
JP3339838B2 (en) Semiconductor device and method of manufacturing the same
US6818550B2 (en) Method of cutting a wafer into individual chips
JP2001326304A (en) Semiconductor device and its manufacturing method
US9355994B2 (en) Build-up package for integrated circuit devices, and methods of making same
WO2007001018A1 (en) Semiconductor device and semiconductor device assembly
US20060209514A1 (en) Semiconductor device and manufacturing method therefor
KR100652442B1 (en) Semiconductor chip and method of manufacturing the same
JP2011109104A (en) Method for sealing electronic component
US6271588B1 (en) Semiconductor device and manufacturing method thereof
JP4939002B2 (en) Semiconductor device and semiconductor device assembly
JPH06314718A (en) Semiconductor integrated circuit pellet
JP2001267470A (en) Semiconductor device and its manufacturing method
JP3494100B2 (en) Semiconductor device and method of mounting the same
US10163819B2 (en) Surface mount package and manufacturing method thereof
JPS6119136A (en) Wire-bonding method for semiconductor device and bonding pad to be used for that
JP2003124431A (en) Wafer-form sheet, a chip-form electronic part, and their manufacturing method
JP2010073803A (en) Manufacturing method for semiconductor device
JP3330890B2 (en) Resin-sealed semiconductor device and method of manufacturing the same
JPH06302727A (en) Semiconductor integrated circuit device
JP3229816B2 (en) Method for manufacturing resin-encapsulated semiconductor device
JP4107896B2 (en) Semiconductor device and manufacturing method thereof
JPH08204066A (en) Semiconductor device
KR100728956B1 (en) Method for fabricating semiconductor package

Legal Events

Date Code Title Description
A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 19960625