JPH0621413A - Solid-state image sensing device and wire bonding method thereof - Google Patents
Solid-state image sensing device and wire bonding method thereofInfo
- Publication number
- JPH0621413A JPH0621413A JP4196178A JP19617892A JPH0621413A JP H0621413 A JPH0621413 A JP H0621413A JP 4196178 A JP4196178 A JP 4196178A JP 19617892 A JP19617892 A JP 19617892A JP H0621413 A JPH0621413 A JP H0621413A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor chip
- bonding wire
- bonding
- inner lead
- electrode pad
- Prior art date
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/8512—Aligning
- H01L2224/85148—Aligning involving movement of a part of the bonding apparatus
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01023—Vanadium [V]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Solid State Image Pick-Up Elements (AREA)
- Wire Bonding (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、リードフレームのダイ
パッド上に搭載された半導体チップを透明樹脂にて一体
封止した固体撮像装置及びそのワイヤボンディング方法
に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state image pickup device in which a semiconductor chip mounted on a die pad of a lead frame is integrally sealed with a transparent resin, and a wire bonding method thereof.
【０００２】[0002]
【従来の技術】従来、この種の固体撮像装置の中には、
図４に示すような構造のものがある。図示した固体撮像
装置５０において、５１は半導体チップであり、この半
導体チップ５１はリードフレームのダイパッド５２上に
搭載されている。半導体チップ５１の上面には複数の電
極パッド５３が設けられており、それらの各電極パッド
５３はボンディングワイヤ５４を通してリードフレーム
のインナリード５５に接続されている。そして、これら
全体は透明樹脂５６によって一体封止されており、この
透明樹脂５６の外側にアウタリード５７が配置されてい
る。2. Description of the Related Art Conventionally, in this type of solid-state image pickup device,
There is a structure as shown in FIG. In the illustrated solid-state imaging device 50, 51 is a semiconductor chip, and this semiconductor chip 51 is mounted on a die pad 52 of a lead frame. A plurality of electrode pads 53 are provided on the upper surface of the semiconductor chip 51, and each electrode pad 53 is connected to an inner lead 55 of a lead frame through a bonding wire 54. All of these are integrally sealed with a transparent resin 56, and outer leads 57 are arranged outside the transparent resin 56.
【０００３】従来の固体撮像装置５０においては、半導
体チップ５１の電極パッド５３とリードフレームのイン
ナリード５５とが以下の方法によって接続されている。
まず第１の工程では、ボンディングツールの先端にボン
ディングワイヤ５４を導出させるとともに、このボンデ
ィングワイヤ５４の一端を半導体チップ５１の電極パッ
ド５３に接合させる。次いで第２の工程では、上記ボン
ディングツールからボンディングワイヤ５４を繰り出し
ながら、そのボンディングツールの先端を垂直に所定の
高さまで上昇させる。続いて第３の工程では、上記第２
の工程と同様にボンディングツールからボンディングワ
イヤ５４を繰り出しながら、そのボンディングツールを
略円弧状に移動させる。さらに第４の工程では、ボンデ
ィングツールの先端をインナリード５５上に配置した状
態で、このインナリード５５の上面にボンディングワイ
ヤ５４の他端を接合させる。以上の工程により、半導体
チップ５１の電極パッド５３とリードフレームのインナ
リード５５とがボンディングワイヤ５４を通して電気的
に接続される。In the conventional solid-state image pickup device 50, the electrode pad 53 of the semiconductor chip 51 and the inner lead 55 of the lead frame are connected by the following method.
First, in the first step, the bonding wire 54 is led out to the tip of the bonding tool, and one end of the bonding wire 54 is bonded to the electrode pad 53 of the semiconductor chip 51. Next, in the second step, the tip of the bonding tool is vertically raised to a predetermined height while paying out the bonding wire 54 from the bonding tool. Then, in the third step, the second step
While the bonding wire 54 is being paid out from the bonding tool in the same manner as the step of 1, the bonding tool is moved in a substantially arc shape. Further, in the fourth step, the other end of the bonding wire 54 is bonded to the upper surface of the inner lead 55 with the tip of the bonding tool placed on the inner lead 55. Through the above steps, the electrode pads 53 of the semiconductor chip 51 and the inner leads 55 of the lead frame are electrically connected through the bonding wires 54.
【０００４】[0004]
【発明が解決しようとする課題】ところで、この種の固
体撮像装置を小型化するには、ダイパッド５２にインナ
リード５５をより近づけること、言い換えるとダイパッ
ド５２とインナリード５５間の間隔Ｌを出来るだけ縮め
ることが最も有効であるとされている。しかしながら実
際にダイパッド５２とインナリード５５間の間隔Ｌを縮
めた状態で、通常のワイヤボンディング方法、つまり半
導体チップ５１側を第１ボンドとしインナリード５５側
を第２ボンドとしたワイヤボンディングを行うと、半導
体チップ５１のエッジ５１ａとボンディングワイヤ５４
との間にクリアランスが得られず、両者間の接触によっ
て電気的なショートを招いてしまう。By the way, in order to miniaturize this type of solid-state image pickup device, the inner lead 55 should be brought closer to the die pad 52, in other words, the distance L between the die pad 52 and the inner lead 55 should be as small as possible. It is said that shortening is the most effective. However, when the normal wire bonding method, that is, the wire bonding with the semiconductor chip 51 side as the first bond and the inner lead 55 side as the second bond, is performed in a state where the distance L between the die pad 52 and the inner lead 55 is actually reduced. , The edge 51a of the semiconductor chip 51 and the bonding wire 54
No clearance can be obtained between the two, and an electrical short circuit is caused by the contact between the two.
【０００５】また仮に、図５に示すようにワイヤ高さＨ
を高くして上述のショートを回避できたとしても、ボン
ディングワイヤ５４の立ち上がり部分に照射した光（図
中二点鎖線で表示）が半導体チップ５１の有効画素部５
１ｂに反射して起こる、いわゆる金線フレアを誘発し、
そのうえパッケージの高さも高くなる。Assuming that the wire height H is as shown in FIG.
Even if the above-mentioned short circuit can be avoided by raising the value of the effective pixel portion 5 of the semiconductor chip 51, the light irradiated to the rising portion of the bonding wire 54 (indicated by a chain double-dashed line in the figure) is effective.
Inducing so-called gold wire flare that is reflected by 1b,
Moreover, the height of the package is increased.
【０００６】さらに、リードフレームのディプレス加工
によりダイパッド５２とインナリード５５との間に大き
な段差を設けて、エッジ５１ａとボンディングワイヤ５
４との間にクリアランスを確保しようとしても、リード
フレームの曲げ加工上、確保できる段差は、ダイパッド
５２とインナリード５５間の間隔Ｌが縮められた分だけ
小さくなるため、これをもって上記問題を解決するには
限界があった。Further, a large step is provided between the die pad 52 and the inner lead 55 by depressing the lead frame, and the edge 51a and the bonding wire 5 are formed.
Even if an attempt is made to secure a clearance with the lead frame 4, the step difference that can be secured due to the bending process of the lead frame is reduced by the amount by which the distance L between the die pad 52 and the inner lead 55 is shortened, which solves the above problem. There was a limit to it.
【０００７】本発明は、上記問題を解決するためになさ
れたもので、ダイパッドとインナリードとが近接した状
態でも、半導体チップのエッジとボンディングワイヤと
の間にクリアランスが確保される固体撮像装置を提供す
ることを目的とする。The present invention has been made to solve the above problems, and provides a solid-state image pickup device in which a clearance is secured between the edge of a semiconductor chip and a bonding wire even when the die pad and the inner lead are in close proximity to each other. The purpose is to provide.
【０００８】[0008]
【課題を解決するための手段】本発明は、上記目的を達
成するためになされたもので、リードフレームのダイパ
ッド上に搭載され且つ上面に電極パッドが設けられた半
導体チップと、この半導体チップの電極パッドとリード
フレームのインナリードとを接続するボンディングワイ
ヤと、これら全体を一体封止した透明樹脂とから成り、
半導体チップの上面とインナリードの上面との間に所定
の段差が設けられた固体撮像装置であって、そのボンデ
ィングワイヤが、インナリードの上面から略垂直に立ち
上げられるとともに、その立ち上げられた位置から略円
弧状に延出して半導体チップの電極パッドに接続された
ものである。SUMMARY OF THE INVENTION The present invention has been made to achieve the above object, and is a semiconductor chip mounted on a die pad of a lead frame and provided with an electrode pad on the upper surface, and a semiconductor chip of this semiconductor chip. A bonding wire that connects the electrode pad and the inner lead of the lead frame, and a transparent resin that integrally seals the whole of them.
A solid-state imaging device having a predetermined step between an upper surface of a semiconductor chip and an upper surface of an inner lead, the bonding wire of which is raised substantially vertically from the upper surface of the inner lead and is raised. It extends from the position in a substantially arc shape and is connected to the electrode pad of the semiconductor chip.
【０００９】また、リードフレームのダイパッド上に搭
載され且つ上面に電極パッドが設けられた半導体チップ
と、この半導体チップの電極パッドとリードフレームの
インナリードとを接続するボンディングワイヤと、これ
ら全体を一体封止した透明樹脂とから成り、半導体チッ
プの上面とインナリードの上面との間に所定の段差が設
けられた固体撮像装置のワイヤボンディング方法であっ
て、ボンディングツールの先端にボンディングワイヤを
導出させるとともに、このボンディングワイヤの一端を
インナリードの上面に接合させる工程と、ボンディング
ツールからボンディングワイヤを繰り出しながら、その
ボンディングツールの先端を垂直に上昇させる工程と、
ボンディングツールからボンディングワイヤを繰り出し
ながら、そのボンディングツールを略円弧状に移動させ
る工程と、ボンディングツールの先端を半導体チップの
電極パッド上に配置した状態で、この半導体チップの電
極パッドにボンディングワイヤの他端を接合させる工程
とからなるものである。Further, a semiconductor chip mounted on the die pad of the lead frame and provided with electrode pads on the upper surface thereof, a bonding wire for connecting the electrode pad of the semiconductor chip and the inner lead of the lead frame, and the entirety thereof are integrated. A wire bonding method for a solid-state imaging device, comprising a transparent resin that has been sealed and having a predetermined step between the upper surface of a semiconductor chip and the upper surface of an inner lead, wherein a bonding wire is led to the tip of a bonding tool. Together with the step of joining one end of this bonding wire to the upper surface of the inner lead, and the step of vertically raising the tip of the bonding tool while feeding the bonding wire from the bonding tool,
While unwinding the bonding wire from the bonding tool, the step of moving the bonding tool in a substantially arc shape, and with the tip of the bonding tool placed on the electrode pad of the semiconductor chip And a step of joining the ends.
【００１０】[0010]
【作用】本発明の固体撮像装置においては、インナリー
ドの上面からボンディングワイヤが半導体チップの上面
とほぼ同じ高さまで垂直に立ち上げら、そこから略円弧
状に延出して半導体チップの電極パッドに接続されてい
るので、半導体チップのエッジとボンディングワイヤと
の間には必ずクリアランスが確保される。また、上記構
成により半導体チップの電極パッド側のボンディングワ
イヤの立ち上がり部分は緩やかな円弧状に形成されるた
め、その立ち上がり部分に照射される光は半導体チップ
の有効画素部とは別方向に反射される。In the solid-state image pickup device of the present invention, the bonding wire rises vertically from the upper surface of the inner lead to almost the same height as the upper surface of the semiconductor chip, and then extends in a substantially arc shape from the bonding wire to the electrode pad of the semiconductor chip. Since they are connected, a clearance is always ensured between the edge of the semiconductor chip and the bonding wire. Further, since the rising portion of the bonding wire on the electrode pad side of the semiconductor chip is formed in a gentle arc shape by the above configuration, the light irradiated to the rising portion is reflected in a direction different from the effective pixel portion of the semiconductor chip. It
【００１１】[0011]
【実施例】図１は本発明に係わる固体撮像装置の一実施
例を示す側面概略図であり、図２はその要部拡大図であ
る。図示した固体撮像装置１０において、１１は半導体
チップであり、この半導体チップ１１はリードフレーム
のダイパッド１２上に搭載されている。半導体チップ１
１の上面には複数の電極パッド１３が設けられており、
それらの各電極パッド１３はボンディングワイヤ１４を
通してリードフレームのインナリード１５に接続されて
いる。そして、これら全体は透明樹脂１６によって一体
封止されており、この透明樹脂１６の外側にアウタリー
ド１７が配置されている。1 is a schematic side view showing an embodiment of a solid-state image pickup device according to the present invention, and FIG. 2 is an enlarged view of a main part thereof. In the illustrated solid-state imaging device 10, 11 is a semiconductor chip, and this semiconductor chip 11 is mounted on a die pad 12 of a lead frame. Semiconductor chip 1
A plurality of electrode pads 13 are provided on the upper surface of 1.
Each of these electrode pads 13 is connected to an inner lead 15 of the lead frame through a bonding wire 14. All of these are integrally sealed with a transparent resin 16, and outer leads 17 are arranged outside the transparent resin 16.
【００１２】上述の構成の中で、リードフレームのダイ
パッド１２とインナリード１５との間には、いわゆるデ
ィプレス加工によって若干の段差が設けられている。こ
の段差は、上述の従来例でも説明したようにリードフレ
ームの曲げ加工上あまり大きく設定することはできず、
その結果、ダイパッド１２上に搭載された半導体チップ
１１の上面とインナリード１５の上面との間には、必ず
所定の段差Ｖ（図２）が設けられる。In the above structure, a slight step is provided between the die pad 12 of the lead frame and the inner lead 15 by so-called depressing. This step can not be set too large due to the bending process of the lead frame as described in the above-mentioned conventional example,
As a result, a predetermined step V (FIG. 2) is always provided between the upper surface of the semiconductor chip 11 mounted on the die pad 12 and the upper surface of the inner lead 15.
【００１３】本実施例の固体撮像装置１０においては、
半導体チップ１１の電極パッド１３とリードフレームの
インナリード１５とを接続するボンディングワイヤ１４
が以下のように構成されている。すなわちボンディング
ワイヤ１４は、まずインナリード１５の上面から上述し
た段差Ｖ分だけ略垂直に立ち上げられている。そして、
その立ち上げられた位置Ｐからさらに略円弧状に延出し
て半導体チップ１１の電極パッド１３に接続されてい
る。In the solid-state image pickup device 10 of this embodiment,
Bonding wire 14 for connecting the electrode pad 13 of the semiconductor chip 11 and the inner lead 15 of the lead frame
Is configured as follows. That is, the bonding wire 14 is first erected substantially vertically from the upper surface of the inner lead 15 by the above step V. And
Further extending from the raised position P in a substantially arc shape, it is connected to the electrode pad 13 of the semiconductor chip 11.
【００１４】このようにボンディングワイヤ１４が構成
されることにより、リードフレームのダイパッド１２と
インナリード１５とが近接した状態、換言すると従来よ
りもダイパッド１２とインナリード１５間の間隔が縮め
られた状態においても、半導体チップ１１のエッジ１１
ａとボンディングワイヤ１４との間にはクリアランスが
得られるようになり、これによって両者間の接触による
電気的なショートが回避される。With the bonding wire 14 thus configured, the die pad 12 of the lead frame and the inner lead 15 are in a state of being close to each other, in other words, the distance between the die pad 12 and the inner lead 15 is narrower than in the conventional case. Also in the edge 11 of the semiconductor chip 11
A clearance can be obtained between a and the bonding wire 14, so that an electrical short circuit due to contact between the two can be avoided.
【００１５】また、本実施例の固体撮像装置１０におい
ては、半導体チップ１１の電極パッド１３側におけるボ
ンディングワイヤ１４の立ち上がり部分が緩やかな円弧
状に形成されるため、その立ち上がり部分に照射される
光は、図３に示すように半導体チップ１１の有効画素部
１１ｂとは別方向に向けて反射するようになる。Further, in the solid-state image pickup device 10 of this embodiment, since the rising portion of the bonding wire 14 on the electrode pad 13 side of the semiconductor chip 11 is formed in a gentle arc shape, the light irradiated to the rising portion is 3 is reflected in a direction different from that of the effective pixel portion 11b of the semiconductor chip 11 as shown in FIG.
【００１６】続いて、上記固体撮像装置のワイヤボンデ
ィング方法について説明する。まず第１の工程では、図
示せぬボンディングツールの先端にボンディングワイヤ
１４を導出させるとともに、このボンディングワイヤ１
４の一端をインナリード１５の上面に接合させる。ここ
で、ボンディングワイヤ１４の接合手段としては、例え
ばキャピラリを用いたボールボンディングや、ウエッジ
ツールを用いた超音波ワイヤボンディング等を採用する
ことができる。Next, a wire bonding method for the solid-state image pickup device will be described. First, in the first step, the bonding wire 14 is led out to the tip of a bonding tool (not shown), and the bonding wire 1
One end of 4 is joined to the upper surface of the inner lead 15. Here, as the bonding means of the bonding wire 14, for example, ball bonding using a capillary, ultrasonic wire bonding using a wedge tool, or the like can be adopted.
【００１７】次いで第２の工程では、上記ボンディング
ツールからボンディングワイヤ１４を繰り出しながら、
そのボンディングツールの先端を半導体チップ１１の上
面とほぼ同じ高さまで垂直に上昇させる。これによりボ
ンディングワイヤ１４はインナリード１５の上面から段
差Ｖ分だけ略垂直に立ち上げられる。Next, in the second step, while paying out the bonding wire 14 from the bonding tool,
The tip of the bonding tool is vertically lifted to almost the same height as the upper surface of the semiconductor chip 11. As a result, the bonding wire 14 is raised substantially vertically from the upper surface of the inner lead 15 by the step difference V.
【００１８】続いて第３の工程では、上記第２の工程と
同様にボンディングツールからボンディングワイヤ１４
を繰り出しながら、そのボンディングツールを略円弧状
に移動させる。これによりボンディングワイヤ１４は、
上記第２の工程で立ち上げられた位置Ｐから緩やかな円
弧状のループを形成する。Subsequently, in the third step, the bonding tool 14 and the bonding wire 14 are removed as in the second step.
While unwinding, the bonding tool is moved in a substantially arc shape. As a result, the bonding wire 14
A gentle arc-shaped loop is formed from the position P raised in the second step.
【００１９】さらに第４の工程では、ボンディングツー
ルの先端を半導体チップ１１の電極パッド１３上に配置
した状態で、この半導体チップ１１の電極パッド１３に
ボンディングワイヤ１４の他端を接合させる。ここで、
ボンディングワイヤ１４の接合手段としては、例えばキ
ャピラリを用いたステッチボンドや、上述したウエッジ
ツールによる手段等を採用することができる。以上の工
程により、半導体チップ１１の電極パッド１３とリード
フレームのインナリード１５とがボンディングワイヤ１
４を通して電気的に接続される。In the fourth step, the other end of the bonding wire 14 is bonded to the electrode pad 13 of the semiconductor chip 11 with the tip of the bonding tool placed on the electrode pad 13 of the semiconductor chip 11. here,
As the joining means of the bonding wire 14, for example, stitch bonding using a capillary, the above-mentioned means using a wedge tool, or the like can be adopted. Through the above steps, the electrode pad 13 of the semiconductor chip 11 and the inner lead 15 of the lead frame are bonded to each other by the bonding wire 1.
4 electrically connected.
【００２０】このように本実施例のワイヤボンディング
方法においては、従来例の場合と反対に、インナリード
１５側を第１ボンドとし半導体チップ１１側を第２ボン
ドとした、いわゆる逆ボンド方式を採用しており、これ
に加えて、インナリード１５の上面から一旦ボンディン
グワイヤ１４を段差Ｖ分だけ垂直に立ち上げ、そこから
ボンディングツールを円弧状に移動させてループを形成
しているので、半導体チップ１１のエッジ１１ａとボン
ディングワイヤ１４との間には必ず所定のクリアランス
が確保される。As described above, in the wire bonding method of this embodiment, contrary to the case of the conventional example, a so-called reverse bond method is adopted in which the inner lead 15 side is the first bond and the semiconductor chip 11 side is the second bond. In addition to this, the bonding wire 14 is once vertically raised from the upper surface of the inner lead 15 by the step V, and the bonding tool is moved in an arc shape from there to form a loop. A predetermined clearance is always ensured between the edge 11a of 11 and the bonding wire 14.
【００２１】ちなみに、本発明者の試作結果によれば、
ダイパッド１２とインナリード１５間の距離が０．２７
ｍｍ、同段差（ディプレス量）が０．３ｍｍ、半導体チ
ップ１１の上面とインナリード１５の上面との段差Ｖが
０．３ｍｍという寸法条件の下で、チップエッジ１１ａ
とボンディングワイヤ１４との間に数１０μｍのクリア
ランスが確保されることが確認されている。Incidentally, according to the results of the trial production by the present inventor,
The distance between the die pad 12 and the inner lead 15 is 0.27
mm, the step (depress amount) is 0.3 mm, and the step V between the upper surface of the semiconductor chip 11 and the upper surface of the inner lead 15 is 0.3 mm.
It has been confirmed that a clearance of several tens of μm is secured between the bonding wire 14 and the bonding wire 14.
【００２２】[0022]
【発明の効果】以上、説明したように本発明によれば、
ダイパッドとインナリードとが近接した状態でも、半導
体チップのエッジとボンディングワイヤとの間にクリア
ランスを確保しつつ、半導体チップの電極パッドとイン
ナリードとを接続することができる。これにより、固体
撮像装置の平面寸法を大幅に小さくすることが可能とな
り、これは固体撮像装置の小型化を図る上できわめて有
効である。さらに本発明においては、半導体チップの電
極パッド側におけるボンディングワイヤの立ち上がり部
分が緩やかな円弧状に形成されることから、その立ち上
がり部分に照射される光は半導体チップの有効画素部と
は別方向に向けて反射するようになり、これにより金線
フレアが防止される。As described above, according to the present invention,
Even when the die pad and the inner lead are in close proximity to each other, the electrode pad of the semiconductor chip and the inner lead can be connected while ensuring a clearance between the edge of the semiconductor chip and the bonding wire. As a result, the plane size of the solid-state image pickup device can be significantly reduced, which is extremely effective in reducing the size of the solid-state image pickup device. Further, in the present invention, since the rising portion of the bonding wire on the electrode pad side of the semiconductor chip is formed in a gentle arc shape, the light irradiated to the rising portion is directed in a direction different from the effective pixel portion of the semiconductor chip. It is reflected toward the wire, which prevents gold wire flare.
【図１】本発明に係わる固体撮像装置の一実施例を示す
側面概略図である。FIG. 1 is a schematic side view showing an embodiment of a solid-state imaging device according to the present invention.
【図２】図１の要部拡大図である。FIG. 2 is an enlarged view of a main part of FIG.
【図３】実施例での金線フレアの影響を説明する図であ
る。FIG. 3 is a diagram for explaining the influence of gold wire flare in the example.
【図４】従来構造を示す側面概略図である。FIG. 4 is a schematic side view showing a conventional structure.
【図５】従来例での金線フレアの影響を説明する図であ
る。FIG. 5 is a diagram for explaining the influence of gold wire flare in the conventional example.
１０ 固体撮像装置 １１ 半導体チップ １２ ダイパッド １３ 電極パッド １４ ボンディングワイヤ １５ インナリード １６ 透明樹脂 Ｖ 段差 10 Solid-State Imaging Device 11 Semiconductor Chip 12 Die Pad 13 Electrode Pad 14 Bonding Wire 15 Inner Lead 16 Transparent Resin V Step
Claims (2)
れ且つ上面に電極パッドが設けられた半導体チップと、
前記半導体チップの電極パッドと前記リードフレームの
インナリードとを接続するボンディングワイヤと、これ
ら全体を一体封止した透明樹脂とから成り、前記半導体
チップの上面と前記インナリードの上面との間に所定の
段差が設けられた固体撮像装置であって、 前記ボンディングワイヤは、前記インナリードの上面か
ら略垂直に立ち上げられるとともに、その立ち上げられ
た位置から略円弧状に延出して前記半導体チップの電極
パッドに接続されていることを特徴とする固体撮像装
置。1. A semiconductor chip mounted on a die pad of a lead frame and provided with an electrode pad on its upper surface,
A bonding wire that connects the electrode pad of the semiconductor chip and the inner lead of the lead frame, and a transparent resin that integrally seals the whole of the bonding wire, and a predetermined distance between the upper surface of the semiconductor chip and the upper surface of the inner lead. Of the semiconductor chip, wherein the bonding wire is raised substantially vertically from the upper surface of the inner lead, and extends from the raised position in a substantially arc shape. A solid-state imaging device characterized by being connected to an electrode pad.
れ且つ上面に電極パッドが設けられた半導体チップと、
前記半導体チップの電極パッドと前記リードフレームの
インナリードとを接続するボンディングワイヤと、これ
ら全体を一体封止した透明樹脂とから成り、前記半導体
チップの上面と前記インナリードの上面との間に所定の
段差が設けられた固体撮像装置のワイヤボンディング方
法であって、 ボンディングツールの先端にボンディングワイヤを導出
させるとともに、このボンディングワイヤの一端を前記
インナリードの上面に接合させる工程と、 前記ボンディングツールから前記ボンディングワイヤを
繰り出しながら、そのボンディングツールの先端を上昇
させる工程と、 前記ボンディングツールから前記ボンディングワイヤを
繰り出しながら、そのボンディングツールを略円弧状に
移動させる工程と、 前記ボンディングツールの先端を前記半導体チップの電
極パッド上に配置した状態で、この半導体チップの電極
パッドに前記ボンディングワイヤの他端を接合させる工
程とからなることを特徴とする固体撮像装置のワイヤボ
ンディング方法。2. A semiconductor chip mounted on a die pad of a lead frame and provided with an electrode pad on its upper surface,
A bonding wire that connects the electrode pad of the semiconductor chip and the inner lead of the lead frame, and a transparent resin that integrally seals the whole of the bonding wire, and a predetermined distance between the upper surface of the semiconductor chip and the upper surface of the inner lead. A wire bonding method for a solid-state imaging device provided with a step, wherein a step of leading a bonding wire to the tip of the bonding tool and bonding one end of the bonding wire to the upper surface of the inner lead, and Raising the tip of the bonding tool while feeding the bonding wire, moving the bonding tool in a substantially arc shape while feeding the bonding wire from the bonding tool, and moving the tip of the bonding tool forward. And a step of joining the other end of the bonding wire to the electrode pad of the semiconductor chip in a state of being arranged on the electrode pad of the semiconductor chip.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4196178A JPH0621413A (en) | 1992-06-29 | 1992-06-29 | Solid-state image sensing device and wire bonding method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4196178A JPH0621413A (en) | 1992-06-29 | 1992-06-29 | Solid-state image sensing device and wire bonding method thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0621413A true JPH0621413A (en) | 1994-01-28 |
Family
ID=16353501
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4196178A Pending JPH0621413A (en) | 1992-06-29 | 1992-06-29 | Solid-state image sensing device and wire bonding method thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0621413A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001111019A (en) * | 1999-08-04 | 2001-04-20 | Sharp Corp | Two-dimensional image detector |
| JP2007103967A (en) * | 1999-08-04 | 2007-04-19 | Sharp Corp | Two-dimensional image detector |
-
1992
- 1992-06-29 JP JP4196178A patent/JPH0621413A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001111019A (en) * | 1999-08-04 | 2001-04-20 | Sharp Corp | Two-dimensional image detector |
| JP2007103967A (en) * | 1999-08-04 | 2007-04-19 | Sharp Corp | Two-dimensional image detector |
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