JPH06120229A - Formation of bump electrode in semiconductor component and semiconductor component having bump electrode - Google Patents
Formation of bump electrode in semiconductor component and semiconductor component having bump electrodeInfo
- Publication number
- JPH06120229A JPH06120229A JP26762692A JP26762692A JPH06120229A JP H06120229 A JPH06120229 A JP H06120229A JP 26762692 A JP26762692 A JP 26762692A JP 26762692 A JP26762692 A JP 26762692A JP H06120229 A JPH06120229 A JP H06120229A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor component
- gold
- silver
- bump electrode
- electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、半導体素子を備えた半
導体チップ等の半導体部品を、回路基板又はリードフレ
ーム等に対して、金属製のバンプ電極を介して接続する
場合において、前記半導体部品における電極パッドに対
して、金製のバンプ電極を形成する方法、及びバンプ電
極付き半導体部品に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor component such as a semiconductor chip provided with a semiconductor element, which is connected to a circuit board, a lead frame or the like via a metal bump electrode. The method of forming a bump electrode made of gold on the electrode pad, and a semiconductor component with a bump electrode.
【０００２】[0002]
【従来の技術】従来、この種のバンプ電極は、当該バン
プ電極による接続の信頼性を確保することのために、金
のメッキによって形成するのが一般的であったが、この
方法には、多数の工程を必要とすることにより、コスト
が大幅にアップするばかりか、メッキ液の処理等の公害
上の問題があった。2. Description of the Related Art Heretofore, this type of bump electrode has generally been formed by gold plating in order to ensure the reliability of connection by the bump electrode. Since a large number of steps are required, not only the cost is greatly increased, but also there is a problem on pollution such as treatment of the plating solution.
【０００３】そこで、先行技術としての特開平１−２５
１６４３号公報は、バンプ電極の形成に、前記金属メッ
キによる方法に代えて、当該バンプ電極を、半導体部品
における電極パッドに対して、金ペーストをスクリーン
印刷にて塗着したのち、適宜温度に加熱・焼成すること
によって形成すると言う方法を提案している。Therefore, Japanese Patent Laid-Open No. 1-25 as a prior art.
No. 1643 discloses that bump electrodes are formed by applying a gold paste to an electrode pad of a semiconductor component by screen printing instead of the metal plating method and then heating the bump electrodes to an appropriate temperature.・ We propose a method of forming by firing.
【０００４】[0004]
【発明が解決しようとする課題】しかし、この先行技術
の方法は、従来の金属メッキによる方法に比べて、コス
トを大幅に低減できる利点を有するが、その反面、スク
リーン印刷にて塗着した金ペーストを、加熱・焼成する
に際しては、可成り高い温度にしなければならず、この
ように高い温度に加熱すると、半導体部品の表面におけ
る各種アルミ配線にヒロック（突起）が成長するから、
各種アルミ配線に対する絶縁性が阻害されて、半導体部
品における不良品の発生率が増大すると言う問題があっ
た。However, this prior art method has the advantage that the cost can be significantly reduced as compared with the conventional metal plating method, but on the other hand, the gold applied by screen printing is used. When the paste is heated and fired, it has to be heated to a considerably high temperature. When heated to such a high temperature, hillocks (protrusions) grow on various aluminum wiring on the surface of the semiconductor component.
There is a problem that the insulation rate for various aluminum wirings is hindered and the incidence of defective products in semiconductor components increases.
【０００５】本発明は、半導体部品における電極パッド
に対して、金製のバンプ電極を形成する場合において、
加熱・焼成の温度が４００℃より低い場合には、ヒロッ
クの成長がない点に着目し、不良品発生率の増大を招来
することがないようにしたバンプ電極の形成方法を提供
することを技術的課題とするものである。According to the present invention, when a gold bump electrode is formed on an electrode pad of a semiconductor component,
When the heating / baking temperature is lower than 400 ° C., it is noted that there is no growth of hillocks, and a bump electrode forming method that does not cause an increase in defective product generation rate is provided. It is a specific subject.
【０００６】[0006]
【課題を解決するための手段】この技術的課題を達成す
るため本発明は、半導体部品における電極パッドに、金
粒子を主成分とする金ペーストに粒径１ミクロン以下の
銀粒子を混合するか粒径１ミクロン以下の銀粒子を主成
分とする銀ペーストを混合して成る銀混合の金ペースト
を、前記電極パッドの部分に抜き窓を備えたスクリーン
マスクを使用したスクリーン印刷にて塗着したのち、４
００℃以下の温度で加熱・焼成すると言う方法を採用し
た。In order to achieve this technical object, the present invention relates to a method of mixing silver particles having a particle size of 1 micron or less with an electrode pad in a semiconductor component and a gold paste containing gold particles as a main component. A silver-mixed gold paste obtained by mixing a silver paste containing silver particles having a particle size of 1 micron or less as a main component was applied by screen printing using a screen mask having a window at the electrode pad portion. Later, 4
A method of heating and firing at a temperature of 00 ° C or lower was adopted.
【０００７】[0007]
【作 用】金ペーストにおける金粒子は、４００℃よ
りも可成り高い温度で加熱・焼成しないと、一体的に結
合することがないと共に、電極パッドに対して結合する
ことはないが、この金ペーストに、前記のように、粒径
を１ミクロン以下にした銀粒子を混合するか又は粒径を
１ミクロン以下にした銀粒子を主成分とする銀ペースト
を混合することにより、４００℃以下の温度での加熱・
焼成により、前記銀粒子の一部又は一部分が固溶状態に
なって、金粒子に対して溶着すると共に、電極パッドに
対しても溶着することになり、換言すると、金ペースト
における金粒子を、粒径が１ミクロン以下の銀粒子をバ
インダーとして、４００℃以下の温度での加熱・焼成に
よって、互いに一体的に係合できると共に、電極パッド
に対して結合することができるのである。[Operation] The gold particles in the gold paste will not bond together and will not bond to the electrode pad unless they are heated and fired at a temperature considerably higher than 400 ° C. As described above, the paste is mixed with silver particles having a particle size of 1 micron or less, or by mixing a silver paste containing silver particles having a particle size of 1 micron or less as a main component. Heating at temperature
By firing, a part or a part of the silver particles becomes a solid solution state, and is welded to the gold particles as well as to the electrode pad. In other words, the gold particles in the gold paste are By using silver particles having a particle size of 1 micron or less as a binder and heating and firing at a temperature of 400 ° C. or less, they can be integrally engaged with each other and can be bonded to the electrode pad.
【０００８】[0008]
【発明の効果】従って、本発明によると、金をベースと
するバンプ電極を、半導体部品にヒロックが成長するこ
とを確実に抑制した状態で形成することができるから、
金製のバンプ電極を、スクリーン印刷にて低コストで形
成する場合における不良品の発生率を大幅に低減するこ
とができる効果を有する。As described above, according to the present invention, the gold-based bump electrode can be formed in a state in which the growth of hillocks on the semiconductor component is surely suppressed.
This has the effect of significantly reducing the incidence of defective products when gold bump electrodes are formed by screen printing at low cost.
【０００９】また、「請求項２」によると、接続に対し
て信頼性の高いバンプ電極を有する半導体部品を提供す
ることができる効果を有する。Further, according to the second aspect, there is an effect that it is possible to provide a semiconductor component having a bump electrode which is highly reliable for connection.
【００１０】[0010]
【実施例】以下、本発明の実施例を図面に基づいて説明
する。図１は、半導体部品１を示し、この半導体部品１
の上面には、各種の半導体素子（図示せず）に対する複
数個のアルミ製電極パッド２とパシベーション膜３とが
形成されており、更に、前記電極パッド２の表面には、
従来の場合と同様に、チタン層及び銅層等から成るバリ
ヤ皮膜（図示せず）が形成されている。Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows a semiconductor component 1, and this semiconductor component 1
A plurality of aluminum electrode pads 2 and a passivation film 3 for various semiconductor elements (not shown) are formed on the upper surface of the electrode pad 2. Further, on the surface of the electrode pad 2,
As in the conventional case, a barrier film (not shown) including a titanium layer and a copper layer is formed.
【００１１】そして、前記半導体部品１の上面に、図２
に示すように、前記各電極パッド２の部分に抜き窓５を
穿設して成る板厚さ５０ミクロンのスクリーンマスク４
を重ね合わせ、このスクリーンマスク４の上面に対し
て、粒径１ミクロン以下の金粒子を主成分とする従来公
知の金ペーストに粒径１ミクロン以下の銀粒子を適宜比
率（例えば、金粒子に対して、２０重量パーセントの銀
粒子）で混合して成る銀混合の金ペースト６を供給す
る。Then, on the upper surface of the semiconductor component 1, as shown in FIG.
As shown in FIG. 5, a screen mask 4 having a plate thickness of 50 microns is formed by punching a window 5 in each of the electrode pads 2.
On the upper surface of the screen mask 4 and a conventionally known gold paste containing gold particles having a particle size of 1 micron or less as a main component and silver particles having a particle size of 1 micron or less in an appropriate ratio (for example, to the gold particles). On the other hand, a silver mixed gold paste 6 formed by mixing 20% by weight of silver particles) is supplied.
【００１２】なお、この場合において、粒径１ミクロン
以下の金粒子を主成分とする金ペーストに対して、粒径
１ミクロン以下の銀粒子を主成分とする従来公知の銀ペ
ーストを適宜比率で混合するようにしても良い。次い
で、前記スクリーンマスク４の上面に沿ってスキージ７
を移動することにより、前記銀混合の金ペースト６を、
前記抜き窓５内に充填する。In this case, a conventionally known silver paste containing silver particles having a particle size of 1 micron or less as a main component is appropriately mixed with a gold paste containing gold particles having a particle size of 1 micron or less as a main component. It may be mixed. Next, a squeegee 7 is attached along the upper surface of the screen mask 4.
By moving the silver mixed gold paste 6
The inside of the draft window 5 is filled.
【００１３】そして、前記スクリーンマスク４を、図３
に示すように、取り除き、銀混合の金ペースト６の乾燥
を行ったのち、半導体部品１の全体を、加熱炉に入れ
て、３５０℃の温度で５分間にわたって加熱すると言う
焼成を行う。この加熱・焼成により、前記銀粒子の一部
又は一部分が固溶状態になって、金粒子に対して溶着す
ると共に、電極パッド２に対しても溶着することによ
り、半導体部品１における各電極パッド２に対して、図
４に示すように、高さ寸法が約２０ミクロンのバンプ電
極８を形成することができるのである。The screen mask 4 is shown in FIG.
As shown in FIG. 5, after removing and drying the silver-mixed gold paste 6, the whole semiconductor component 1 is put into a heating furnace and baked at a temperature of 350 ° C. for 5 minutes. By this heating / firing, a part or a part of the silver particles are brought into a solid solution state and welded to the gold particles and also to the electrode pads 2, so that each electrode pad in the semiconductor component 1 2, the bump electrode 8 having a height of about 20 μm can be formed as shown in FIG.
【図１】本発明の実施例において、半導体部品の縦断正
面図である。FIG. 1 is a vertical sectional front view of a semiconductor component according to an embodiment of the present invention.
【図２】前記半導体部品の上面における各電極パッドに
対してスクリーンマスクを使用してペーストを塗着して
いる状態の縦断正面図である。FIG. 2 is a vertical sectional front view showing a state in which a paste is applied to each electrode pad on the upper surface of the semiconductor component by using a screen mask.
【図３】前記ペーストの塗着したあとにおいて前記スク
リーンマスクを取り除いた状態の縦断正面図である。FIG. 3 is a vertical sectional front view showing a state in which the screen mask is removed after the paste is applied.
【図４】前記の加熱・焼成にて、前記各電極パッドにバ
ンプ電極を形成した状態の縦断正面図である。FIG. 4 is a vertical cross-sectional front view of a state where bump electrodes are formed on each of the electrode pads by the heating and firing described above.
１ 半導体部品 ２ 電極パッド ３ パシベーション膜 ４ スクリーンマスク ５ 抜き孔 ６ 銀混合の金ペースト ７ スキージ ８ バンプ電極 DESCRIPTION OF SYMBOLS 1 Semiconductor component 2 Electrode pad 3 Passivation film 4 Screen mask 5 Holes 6 Silver paste of silver mixture 7 Squeegee 8 Bump electrode
Claims (2)
を主成分とする金ペーストに粒径１ミクロン以下の銀粒
子を混合するか粒径１ミクロン以下の銀粒子を主成分と
する銀ペーストを混合して成る銀混合の金ペーストを、
前記電極パッドの部分に抜き窓を備えたスクリーンマス
クを使用したスクリーン印刷にて塗着したのち、４００
℃以下の温度で加熱・焼成することを特徴とする半導体
部品におけるバンプ電極の形成方法。1. An electrode pad in a semiconductor component is prepared by mixing a gold paste containing gold particles as a main component with silver particles having a particle size of 1 micron or less, or a silver paste containing silver particles having a particle size of 1 micron or less as a main component. The silver paste of silver mixed
After applying by screen printing using a screen mask having a window on the electrode pad, 400
A method for forming a bump electrode in a semiconductor component, which comprises heating and firing at a temperature of ℃ or less.
１」の方法によって形成したバンプ電極を備えているこ
とを特徴とするバンプ電極付き半導体部品。2. A semiconductor component with bump electrodes, characterized in that the electrode pads on the surface are provided with bump electrodes formed by the method of claim 1.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP26762692A JPH06120229A (en) | 1992-10-06 | 1992-10-06 | Formation of bump electrode in semiconductor component and semiconductor component having bump electrode |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP26762692A JPH06120229A (en) | 1992-10-06 | 1992-10-06 | Formation of bump electrode in semiconductor component and semiconductor component having bump electrode |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH06120229A true JPH06120229A (en) | 1994-04-28 |
Family
ID=17447302
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP26762692A Pending JPH06120229A (en) | 1992-10-06 | 1992-10-06 | Formation of bump electrode in semiconductor component and semiconductor component having bump electrode |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH06120229A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007123905A (en) * | 2005-10-27 | 2007-05-17 | Lg Innotek Co Ltd | Light emitting diode element, its manufacturing method, and its anchoring structure |
| JP2010076123A (en) * | 2008-09-24 | 2010-04-08 | Dainippon Printing Co Ltd | Method of manufacturing substrate sheet with conductive bump |
| US20140273338A1 (en) * | 2013-03-15 | 2014-09-18 | Applied Materials, Inc. | Methods of forming solar cells and solar cell modules |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02191332A (en) * | 1989-01-19 | 1990-07-27 | Toshiba Corp | Electronic component |
-
1992
- 1992-10-06 JP JP26762692A patent/JPH06120229A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02191332A (en) * | 1989-01-19 | 1990-07-27 | Toshiba Corp | Electronic component |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007123905A (en) * | 2005-10-27 | 2007-05-17 | Lg Innotek Co Ltd | Light emitting diode element, its manufacturing method, and its anchoring structure |
| US8343784B2 (en) | 2005-10-27 | 2013-01-01 | Lg Innotek Co., Ltd. | Light emitting diode device, manufacturing method of the light emitting diode device and mounting structure of the light emitting diode device |
| JP2010076123A (en) * | 2008-09-24 | 2010-04-08 | Dainippon Printing Co Ltd | Method of manufacturing substrate sheet with conductive bump |
| US20140273338A1 (en) * | 2013-03-15 | 2014-09-18 | Applied Materials, Inc. | Methods of forming solar cells and solar cell modules |
| US9040409B2 (en) * | 2013-03-15 | 2015-05-26 | Applied Materials, Inc. | Methods of forming solar cells and solar cell modules |
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