JPH04282887A - Manufacture of printed wiring board - Google Patents
Manufacture of printed wiring boardInfo
- Publication number
- JPH04282887A JPH04282887A JP4390891A JP4390891A JPH04282887A JP H04282887 A JPH04282887 A JP H04282887A JP 4390891 A JP4390891 A JP 4390891A JP 4390891 A JP4390891 A JP 4390891A JP H04282887 A JPH04282887 A JP H04282887A
- Authority
- JP
- Japan
- Prior art keywords
- copper
- solder
- etching
- conducted
- printed wiring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 7
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 36
- 229910052802 copper Inorganic materials 0.000 claims abstract description 26
- 239000010949 copper Substances 0.000 claims abstract description 26
- 238000005530 etching Methods 0.000 claims abstract description 21
- 238000000034 method Methods 0.000 claims abstract description 8
- 229910000679 solder Inorganic materials 0.000 abstract description 20
- 239000011889 copper foil Substances 0.000 abstract description 10
- ORTQZVOHEJQUHG-UHFFFAOYSA-L copper(II) chloride Chemical compound Cl[Cu]Cl ORTQZVOHEJQUHG-UHFFFAOYSA-L 0.000 abstract description 5
- 230000007547 defect Effects 0.000 abstract description 2
- 229960003280 cupric chloride Drugs 0.000 abstract 2
- 238000003475 lamination Methods 0.000 abstract 2
- 230000002950 deficient Effects 0.000 abstract 1
- 238000010030 laminating Methods 0.000 description 4
- 238000007747 plating Methods 0.000 description 3
- 238000005553 drilling Methods 0.000 description 2
- 238000000576 coating method Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3457—Solder materials or compositions; Methods of application thereof
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4007—Surface contacts, e.g. bumps
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/425—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
- H05K3/427—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in metal-clad substrates
Abstract
Description
【0001】0001
【産業上の利用分野】本発明はプリント配線板の製造方
法に関し、特に表面実装に使用されるパッドに凹部を形
成するプリント配線板の製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a printed wiring board, and more particularly to a method of manufacturing a printed wiring board in which recesses are formed in pads used for surface mounting.
【0002】0002
【従来の技術】従来の表面実装用パッドをもつプリント
配線板の製造方法は、銅張り積層板に穴あけをし、パネ
ル銅めっきをほどこし、これに感光性レジストを使用し
て所定のパターンを形成し銅をエッチングすることで、
表面が平滑な銅のパッドを形成した。[Prior Art] The conventional manufacturing method for printed wiring boards with surface mounting pads involves drilling holes in a copper-clad laminate, applying panel copper plating, and forming a predetermined pattern on this using a photosensitive resist. By etching the copper,
A copper pad with a smooth surface was formed.
【0003】その後、パッド上にプリフラックス処理、
あるいは、半田コート処理をほどこす方法が一般的であ
った。[0003] After that, preflux treatment is performed on the pad.
Alternatively, a common method was to apply a solder coating process.
【0004】0004
【発明が解決しようとする課題】近年、表面実装のプリ
ント配線板が増加している中で、半田ペースト印刷のみ
では実装時の半田不足が生じている。さらに、少しでも
半田量を確保しようとプリント配線板に半田コートをほ
どこすことも実施されているが、これらの従来の技術に
より製造される表面実装用パッドの表面は平滑であり、
実装時の半田量の確保に問題点があった。Problems to be Solved by the Invention In recent years, as the number of surface-mounted printed wiring boards has increased, solder paste printing alone has caused a shortage of solder during mounting. Furthermore, in order to secure as much solder as possible, printed wiring boards are sometimes coated with solder, but the surfaces of surface mounting pads manufactured using these conventional techniques are smooth;
There was a problem in securing the amount of solder during mounting.
【0005】本発明の目的は、実装時に十分に半田量が
確保でき、接続不良のないプリント配線板の製造方法を
提供することにある。[0005] An object of the present invention is to provide a method for manufacturing a printed wiring board that can secure a sufficient amount of solder during mounting and is free from poor connections.
【0006】[0006]
【課題を解決するための手段】本発明のプリント配線板
の製造方法は、表面実装用パッドに銅のエッチング工法
により実装部品のリード固定用の凹部を形成する工程を
含んで構成される。[Means for Solving the Problems] The method of manufacturing a printed wiring board of the present invention includes the step of forming recesses for fixing leads of mounted components in surface mounting pads by a copper etching method.
【0007】[0007]
【実施例】次に、本発明の実施例について図面を参照し
て説明する。Embodiments Next, embodiments of the present invention will be described with reference to the drawings.
【0008】図1(a)〜(i)は本発明の第1の実施
例を説明する工程順に示した断面図である。FIGS. 1(a) to 1(i) are sectional views showing a first embodiment of the present invention in order of steps.
【0009】第1の実施例は、まず、図1(a)に示す
ように、銅はり積層板を用意する。In the first embodiment, first, as shown in FIG. 1(a), a copper beam laminate is prepared.
【0010】次に、図1(b)に示すように、銅はり積
層板に穴あけ孔2を穿孔する。Next, as shown in FIG. 1(b), holes 2 are bored in the copper beam laminate.
【0011】次に、図1(c)に示すように、無電解銅
めっき層3を施しスルーホールを形成する。Next, as shown in FIG. 1(c), an electroless copper plating layer 3 is applied to form through holes.
【0012】次に、図1(d)に示すように、ドライフ
ィルムによりラミネート,露光,現像を行い表面に1回
目のエッチングマスク4を形成する。Next, as shown in FIG. 1(d), a first etching mask 4 is formed on the surface by laminating, exposing and developing a dry film.
【0013】次に、図1(e)に示すように、塩化第2
銅液にて1回目の銅のエッチングを行い銅箔1表面に深
さ約20μmの凹部5を形成する。Next, as shown in FIG. 1(e), dichloride
First copper etching is performed using a copper solution to form a recess 5 with a depth of about 20 μm on the surface of the copper foil 1.
【0014】次に、図1(f)に示すように、ドライフ
ィルムによりラミネート,露光,現像を行い2回目のエ
ッチングマスク6を形成する。Next, as shown in FIG. 1(f), a second etching mask 6 is formed by laminating, exposing, and developing a dry film.
【0015】次に、図1(g)に示すように、塩化第2
銅液にて2回目の銅のエッチングを行い銅箔1のパター
ンを形成する。Next, as shown in FIG. 1(g), dichloride
A second copper etching is performed using a copper solution to form a pattern of the copper foil 1.
【0016】次に、図1(h)に示すように、銅箔1を
除去した部分にホトSRを用いてホトSRマスク7を形
成する。Next, as shown in FIG. 1(h), a photo-SR mask 7 is formed using photo-SR on the portion where the copper foil 1 has been removed.
【0017】次に、図1(i)に示すように、図1(e
)の工程で銅のエッチングにより形成された凹部5に半
田をトラップし、半田コート8を施す。Next, as shown in FIG. 1(i), FIG.
In step ), solder is trapped in the recess 5 formed by copper etching, and a solder coat 8 is applied.
【0018】図2(a)〜(i)は本発明の第2の実施
例を説明する工程順に示した断面図である。FIGS. 2(a) to 2(i) are cross-sectional views showing a second embodiment of the present invention in order of steps.
【0019】第2の実施例は、図2(a)〜(c)に示
すように、スルーホール形成工程までは、図1(a)〜
(c)に示す第1の実施例と同じである。In the second embodiment, as shown in FIGS. 2(a) to 2(c), the steps up to the through hole forming process are as shown in FIGS. 1(a) to 2(c).
This is the same as the first embodiment shown in (c).
【0020】次に、図2(d)に示すように、ドライフ
ィルム4によりラミネート,露光,現像を行い銅箔1の
パターン形成用の1回目のエッチングマスク4を形成す
る。Next, as shown in FIG. 2(d), a first etching mask 4 for forming a pattern on the copper foil 1 is formed by laminating, exposing and developing using a dry film 4.
【0021】次に、2図(e)に示すように、塩化第2
銅液にて銅のエッチングを行い、銅箔1のパターンを形
成する。Next, as shown in Figure 2(e), chloride chloride
Copper is etched using a copper solution to form a pattern of copper foil 1.
【0022】次に、図2(f)に示すように、ドライフ
ィルムによりラミネート,露光,現像を行い2回目のエ
ッチングマスク6を形成する。Next, as shown in FIG. 2(f), a second etching mask 6 is formed by laminating, exposing and developing a dry film.
【0023】次に、図2(g)に示すように、塩化第2
銅液にて2回目のエッチングを行い銅箔1表面に深さ約
20μmの凹部5を形成する。Next, as shown in FIG. 2(g), dichloride
A second etching is performed using a copper solution to form a recess 5 with a depth of about 20 μm on the surface of the copper foil 1.
【0024】次に、図2(h)に示すように、銅箔1を
除去した部分にホトSRを用いてホトSRマスク7を形
成する。Next, as shown in FIG. 2(h), a photo-SR mask 7 is formed using photo-SR on the portion where the copper foil 1 has been removed.
【0025】次に図2(i)に示すように、図2(g)
の工程で銅のエッチングにより形成された凹部5に半田
をトラップし、半田コート8を施す。Next, as shown in FIG. 2(i), FIG. 2(g)
In the process, solder is trapped in the recesses 5 formed by copper etching, and a solder coat 8 is applied.
【0026】[0026]
【発明の効果】以上説明したように本発明は、銅エッチ
ングにより表面実装パッド上に約20μmの深さの半田
をトラップする凹部を設けたため、半田不足による実装
時に未接続の不良発生率が極端にへり、約10%以上の
改善がみられるという効果を有する。Effects of the Invention As explained above, in the present invention, a concave portion with a depth of about 20 μm for trapping solder is provided on the surface mounting pad by copper etching, so that the occurrence of unconnected defects during mounting due to insufficient solder is extremely high. It has the effect of showing an improvement of about 10% or more.
【0027】また、銅エッチングにより表面実装パッド
巾0.3mmの部分に半径50μmの凹部を形成するこ
とにより、半田が安定供給することが可能となった。Furthermore, by forming a concave portion with a radius of 50 μm in a surface mounting pad width of 0.3 mm by copper etching, it became possible to stably supply solder.
【図1】本発明の第1の実施例を説明する工程順に示し
た断面図である。FIG. 1 is a cross-sectional view showing a first embodiment of the present invention in order of steps.
【図2】本発明の第2の実施例を説明する工程順に示し
た断面図である。FIG. 2 is a cross-sectional view showing a second embodiment of the present invention in order of steps.
1 銅箔 2 穴あけ孔 3 電解銅めっき層 4,6 エッチングマスク 5 凹部 7 ホトSRマスク 8 半田コート 1 Copper foil 2 Drilling hole 3 Electrolytic copper plating layer 4,6 Etching mask 5 Recessed part 7 Photo SR mask 8 Solder coat
Claims (1)
法により実装部品のリード固定用の凹部を形成する工程
を含むことを特徴とするプリント配線板の製造方法。1. A method for manufacturing a printed wiring board, comprising the step of forming a recess for fixing a lead of a mounted component in a surface mounting pad by a copper etching method.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4390891A JPH04282887A (en) | 1991-03-11 | 1991-03-11 | Manufacture of printed wiring board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4390891A JPH04282887A (en) | 1991-03-11 | 1991-03-11 | Manufacture of printed wiring board |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH04282887A true JPH04282887A (en) | 1992-10-07 |
Family
ID=12676817
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP4390891A Pending JPH04282887A (en) | 1991-03-11 | 1991-03-11 | Manufacture of printed wiring board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH04282887A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100712460B1 (en) * | 2003-03-11 | 2007-04-27 | 니폰덴신뎅와 가부시키가이샤 | Semiconductor optical modulator |
CN103796449A (en) * | 2014-01-24 | 2014-05-14 | 广州兴森快捷电路科技有限公司 | Method for manufacturing high-thickness-to-diameter-ratio circuit board plated filled via hole |
CN104349609A (en) * | 2013-08-08 | 2015-02-11 | 北大方正集团有限公司 | Printed circuit board and manufacturing method thereof |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0236075B2 (en) * | 1983-10-11 | 1990-08-15 | Intaanashonaru Bijinesu Mashiinzu Corp | |
JPH03255696A (en) * | 1990-03-05 | 1991-11-14 | Nec Corp | Surface mounting printed wiring board and manufacture thereof |
-
1991
- 1991-03-11 JP JP4390891A patent/JPH04282887A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0236075B2 (en) * | 1983-10-11 | 1990-08-15 | Intaanashonaru Bijinesu Mashiinzu Corp | |
JPH03255696A (en) * | 1990-03-05 | 1991-11-14 | Nec Corp | Surface mounting printed wiring board and manufacture thereof |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100712460B1 (en) * | 2003-03-11 | 2007-04-27 | 니폰덴신뎅와 가부시키가이샤 | Semiconductor optical modulator |
CN104349609A (en) * | 2013-08-08 | 2015-02-11 | 北大方正集团有限公司 | Printed circuit board and manufacturing method thereof |
CN103796449A (en) * | 2014-01-24 | 2014-05-14 | 广州兴森快捷电路科技有限公司 | Method for manufacturing high-thickness-to-diameter-ratio circuit board plated filled via hole |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 19961203 |