JPH04239194A - Printed board - Google Patents

Printed board

Info

Publication number
JPH04239194A
JPH04239194A JP3002015A JP201591A JPH04239194A JP H04239194 A JPH04239194 A JP H04239194A JP 3002015 A JP3002015 A JP 3002015A JP 201591 A JP201591 A JP 201591A JP H04239194 A JPH04239194 A JP H04239194A
Authority
JP
Japan
Prior art keywords
hole
printed circuit
circuit board
filled
printed board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3002015A
Other languages
Japanese (ja)
Other versions
JPH0831695B2 (en
Inventor
Noboru Takayama
高山 登
Takashi Kobayashi
小林 崇司
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Priority to JP3002015A priority Critical patent/JPH0831695B2/en
Publication of JPH04239194A publication Critical patent/JPH04239194A/en
Publication of JPH0831695B2 publication Critical patent/JPH0831695B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0094Filling or covering plated through-holes or blind plated vias, e.g. for masking or for mechanical reinforcement
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4007Surface contacts, e.g. bumps

Abstract

PURPOSE:To realize good soldering of a surface package part and to promote high density without using solder resist in a multilayer printed board. CONSTITUTION:Two or more wiring layers (A, B, C, D) are laminated on a printed board, and a through-hole 14 is shaped in the laminated body and conductive plating 24 is applied thereto. Thermosetting resin 26 is filled in the through- hole 14 of the printed board, and conductive plating 30 is attached to a surface of the filled through--hole part.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】0001

【産業上の利用分野】本発明はプリント基板、特に回路
部品を実装するための配線層を複数有する積層プリント
基板の構造に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed circuit board, and more particularly to the structure of a laminated printed circuit board having a plurality of wiring layers for mounting circuit components.

【0002】0002

【従来の技術】各種の回路部品を面実装したプリント配
線層を複数層形成する多層化プリント基板が周知であり
、この多層化プリント基板には各層間での電気的接続を
行うスルーホールが形成される。
[Prior Art] A multilayer printed circuit board is well known in which a plurality of printed wiring layers on which various circuit components are surface-mounted is formed, and through holes are formed in this multilayer printed circuit board for electrical connection between each layer. be done.

【0003】図3には、従来のプリント基板におけるス
ルーホール形成工程が示されており、図(a)に示され
るように、2層のプリント配線層B,Cをサンドイッチ
状に挟み、かつ表裏にもプリント配線層A,Dを重ねた
4層のプリント基板にスルーホールを形成する場合には
、図(b)のようにまず所定の位置に貫通孔が穿設され
る。次に、図(c)のようにスルーホール14の周囲か
らホール内に渡って、無電解メッキ法により銅(Cu)
層16が形成され、その後に図(d)のように、不用な
領域の銅層16がエッチングにより除去される。このよ
うにして、スルーホール14が形成されることになり、
このスルーホール14は第1のプリント配線層A、第2
のプリント配線層B及び第4のプリント配線層Dと電気
的に接続されることになる。
FIG. 3 shows a conventional process for forming through holes in a printed circuit board. As shown in FIG. 3, two printed wiring layers B and C are sandwiched, and the front and back When a through hole is formed in a four-layer printed circuit board made up of printed wiring layers A and D, the through hole is first bored at a predetermined position as shown in Figure (b). Next, as shown in Figure (c), copper (Cu) is applied from the periphery of the through hole 14 into the hole by electroless plating.
A layer 16 is formed, and then the copper layer 16 in unnecessary areas is removed by etching, as shown in Figure (d). In this way, the through hole 14 is formed,
This through hole 14 is formed between the first printed wiring layer A, the second printed wiring layer A, and the second printed wiring layer A.
It is electrically connected to the printed wiring layer B and the fourth printed wiring layer D.

【0004】0004

【発明が解決しようとする課題】ところで、上記のスル
ーホール14を有するプリント基板では、回路部品を半
田付けで実装する際に、この半田付け不良をなくすため
ソルダーレジストを用いる。すなわち、図4に示される
ように、プリント基板10のスルーホール14の近傍に
面実装部品(SMD−Surface Mount D
evice)18を実装する場合には、この面実装部品
18の実装位置から少し離れた位置に耐熱性の優れた、
例えばエポキシ系のソルダーレジスト20をストッパと
して取付け、このソルダーレジスト20にて半田22の
流れを止めて面実装部品18の半田付け接続が行われる
。従って、上記ソルダーレジスト20により半田22が
スルーホール14へ流入することが防止され、半田付け
不良を起こすことがなくなる。
By the way, in the printed circuit board having the above-described through holes 14, a solder resist is used to eliminate soldering defects when circuit components are mounted by soldering. That is, as shown in FIG. 4, a surface mount component (SMD-Surface Mount D
When mounting the surface mount component 18, a heat resistant
For example, an epoxy-based solder resist 20 is attached as a stopper, and the solder resist 20 stops the flow of the solder 22, and the surface-mounted component 18 is soldered and connected. Therefore, the solder resist 20 prevents the solder 22 from flowing into the through holes 14, thereby preventing soldering defects.

【0005】しかしながら、上記ソルダーレジスト20
を取付けるために面実装部品18の半田付けランドを広
く設定しなければならず、またスルーホール14の周囲
には、図示のように部品を実装できない禁止領域(デッ
トスペース)100が存在し、部品実装の高密度化を図
ることができないという問題があった。
However, the solder resist 20
In order to attach the surface mount component 18, the soldering land of the surface mount component 18 must be set wide, and around the through hole 14 there is a prohibited area (dead space) 100 where components cannot be mounted as shown in the figure. There was a problem in that it was not possible to achieve higher mounting density.

【0006】更に、ソルダーレジスト20の取付けは比
較的煩雑であり、またソルダーレジスト20の存在によ
りプリント配線層を形成する際に不都合が生じるという
問題もあった。
Furthermore, the installation of the solder resist 20 is relatively complicated, and the presence of the solder resist 20 causes problems when forming a printed wiring layer.

【0007】本発明は上記問題点に鑑みてなされたもの
であり、その目的は、ソルダーレジストを用いることな
く面実装部品の半田付けを良好に行い、かつ高密度化を
促進することができるプリント基板を提供することにあ
る。
The present invention has been made in view of the above-mentioned problems, and its object is to provide a printed circuit board that can successfully solder surface-mounted components without using a solder resist and that can promote high density. The purpose is to provide the substrate.

【0008】[0008]

【課題を解決するための手段】上記目的を達成するため
に、本発明は、2層以上の配線層が積層され、この積層
体に穿設されかつ導電性メッキが付されたスルーホール
を有するプリント基板において、上記スルーホールに熱
硬化性樹脂を充填し、この充填スルーホール部の表面に
導電性メッキを付着させたことを特徴とする。
[Means for Solving the Problems] In order to achieve the above object, the present invention has two or more wiring layers stacked together, and a through hole drilled in the stack and coated with conductive plating. The printed circuit board is characterized in that the through-hole is filled with a thermosetting resin, and a conductive plating is attached to the surface of the filled through-hole.

【0009】[0009]

【作用】上記の構成によれば、スルーホール内に例えば
導電性の熱硬化性樹脂が充填された後に、電解メッキに
より充填スルーホール部に例えば銅の導電性メッキが付
着されることになり、従ってソルダーレジストを用いる
ことなく回路部品を容易に実装できると共に、充填スル
ーホール部の上にも回路部品を直接接続することが可能
となる。
[Function] According to the above structure, after the through hole is filled with, for example, a conductive thermosetting resin, conductive plating of, for example, copper is adhered to the filled through hole portion by electrolytic plating. Therefore, it is possible to easily mount circuit components without using a solder resist, and it is also possible to directly connect circuit components onto the filled through-hole portions.

【0010】0010

【実施例】図1には、本発明の実施例に係るプリント基
板の製造工程が示されており、図示のプリント基板10
はガラスエポキシ樹脂等の有機基材からなる基板12に
4層のプリント配線層A,B,C,Dが積層されている
。図(a)に示されるように、プリント基板の所定位置
にスルーホール14が形成され、このスルーホール14
内からその周囲には第1の銅層24が無電解メッキ法に
より付着されるなお、無電解メッキ後に電解メッキを施
すことも可能である。。そして、図(b)に示されるよ
うに上記スルーホール14内にはカーボン系又は金属性
の導電性粉末を混入した熱硬化性樹脂(導電性ペースト
)26を充填して硬化させる。
[Embodiment] FIG. 1 shows the manufacturing process of a printed circuit board according to an embodiment of the present invention.
Four printed wiring layers A, B, C, and D are laminated on a substrate 12 made of an organic base material such as glass epoxy resin. As shown in Figure (a), a through hole 14 is formed at a predetermined position on the printed circuit board.
A first copper layer 24 is deposited from the inside to the periphery by electroless plating. However, it is also possible to perform electrolytic plating after electroless plating. . Then, as shown in Figure (b), the through holes 14 are filled with a thermosetting resin (conductive paste) 26 mixed with carbon-based or metallic conductive powder and hardened.

【0011】上記導電性粉末入りの熱硬化性樹脂26が
硬化した後には、図(c)に示されるようにスルーホー
ル14を中心とした領域に第2の銅層28a,28bを
プリント基板10の表裏に約10μの厚さで形成する。 この場合の第2の銅層28a,28bは、スルーホール
14内に導電性の熱硬化性樹脂26を充填したので、電
解メッキ法により短時間に付着させることができる。そ
して、最後に図(d)に示されるように、第1の銅層2
4及び第2の銅層28a,28bの両者の不用な部分を
エッチングにより除去し、プリント基板10の表裏のス
ルーホール14の位置に所定の大きさのスルーホールラ
ンド30a,30bを設ける。
After the thermosetting resin 26 containing the conductive powder is cured, second copper layers 28a and 28b are formed on the printed circuit board 10 in the area centered on the through hole 14, as shown in FIG. It is formed to a thickness of about 10μ on the front and back sides. In this case, the second copper layers 28a and 28b can be attached in a short time by electrolytic plating because the through holes 14 are filled with the conductive thermosetting resin 26. And finally, as shown in figure (d), the first copper layer 2
4 and the second copper layers 28a, 28b are removed by etching, and through-hole lands 30a, 30b of a predetermined size are provided at the positions of the through-holes 14 on the front and back of the printed circuit board 10.

【0012】図2は、上記図1のようにして製作したプ
リント基板10に面実装部品を実装した状態が示されて
おり、実施例のプリント基板10の表面では、熱硬化性
樹脂26が充填されたスルーホール14上に形成された
スルーホールランド30aと端子32との間に面実装部
品34が半田22により実装され、また裏面ではスルー
ホールランド30bと端子36との間に面実装部品38
が半田22により実装される。この実施例によれば、ソ
ルダーレジスト20を用いずに半田付けすることができ
、また従来では回路部品を取付けることができずデッド
スペースとなっていたスルーホール部(14)を実装領
域として有効に活用でき、部品の実装密度を高めること
が可能となる。
FIG. 2 shows a state in which surface mount components are mounted on the printed circuit board 10 manufactured as shown in FIG. A surface mount component 34 is mounted by solder 22 between the through hole land 30a formed on the through hole 14 and the terminal 32, and a surface mount component 38 is mounted between the through hole land 30b and the terminal 36 on the back side.
is mounted with solder 22. According to this embodiment, soldering can be performed without using the solder resist 20, and the through-hole portion (14), which conventionally was a dead space where circuit components could not be mounted, can be effectively used as a mounting area. This makes it possible to increase the mounting density of components.

【0013】上記図2においては、スルーホールランド
30a,30bに直接面実装部品34,38を実装する
ようにしたが、従来の図4のように、スルーホール部(
14)の近傍に回路部品を配設してもよく、この場合に
はソルダーレジスト20を取付けるための領域を確保す
る必要がなく、本発明はスルーホール14の位置に関係
なく部品の実装位置を設定することができる。
In FIG. 2, the surface mount components 34 and 38 are mounted directly on the through-hole lands 30a and 30b, but unlike the conventional method shown in FIG.
14). In this case, there is no need to secure an area for attaching the solder resist 20, and the present invention allows the mounting position of the component to be determined regardless of the position of the through hole 14. Can be set.

【0014】上記実施例では、スルーホール14の充填
部材として導電性の熱硬化性樹脂26を用い、第2の銅
層28を電解メッキ法により付着させたが、この充填部
材としては導電性以外の樹脂とし、時間はかかってしま
うが無電解メッキ法により第2の銅層28を付着させる
ことも可能である。
In the above embodiment, the conductive thermosetting resin 26 was used as the filling member for the through hole 14, and the second copper layer 28 was attached by electrolytic plating. It is also possible to attach the second copper layer 28 by electroless plating, although it is time consuming.

【0015】また、実施例では4層の積層プリント基板
について説明したが、これに限らず他の多層化プリント
基板に適応することができ、例えば基板の表裏のみにプ
リント配線層を形成した2層のプリント基板に設けられ
たスルーホールに対して同様に適応することができる。
Further, in the embodiment, a four-layer laminated printed circuit board has been described, but the present invention is not limited to this and can be applied to other multilayer printed circuit boards. For example, a two-layer printed circuit board in which printed wiring layers are formed only on the front and back of the board It can be similarly applied to through holes provided in printed circuit boards.

【0016】[0016]

【発明の効果】以上説明したように、本発明によれば、
スルーホールに熱硬化性樹脂を充填し、この充填スルー
ホール部の表面にメッキを付着させるようにしたので、
ソルダーレジストを用いることなく、またスルーホール
の位置に左右されることなく面実装部品を容易に半田付
けすることができる。しかも、充填スルーホール上にも
回路部品を実装することができ、回路部品の実装密度を
高密度化することが可能となる。
[Effects of the Invention] As explained above, according to the present invention,
We filled the through-hole with thermosetting resin and applied plating to the surface of the filled through-hole.
Surface mount components can be easily soldered without using a solder resist and without being affected by the position of through holes. Furthermore, circuit components can be mounted even on the filled through holes, making it possible to increase the mounting density of circuit components.

【図面の簡単な説明】[Brief explanation of the drawing]

【図1】本発明の実施例に係るプリント基板の製造工程
を示す図である。
FIG. 1 is a diagram showing a manufacturing process of a printed circuit board according to an embodiment of the present invention.

【図2】実施例のプリント基板に回路部品を実装した状
態を示す図である。
FIG. 2 is a diagram showing a state in which circuit components are mounted on the printed circuit board of the embodiment.

【図3】従来のプリント基板の製造工程を示す図である
FIG. 3 is a diagram showing a conventional printed circuit board manufacturing process.

【図4】従来のプリント基板に回路部品を実装した状態
を示す図である。
FIG. 4 is a diagram showing a state in which circuit components are mounted on a conventional printed circuit board.

【符号の説明】[Explanation of symbols]

10  プリント基板 14  スルーホール 18,34,38  面実装部品 20  ソルダーレジスト 22  半田 24  第1の銅層 26  熱硬化性樹脂 28a,28b  第2の銅層 10 Printed circuit board 14 Through hole 18, 34, 38 Surface mount parts 20 Solder resist 22 Solder 24 First copper layer 26 Thermosetting resin 28a, 28b Second copper layer

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】2層以上の配線層が積層され、この積層体
に穿設されかつ導電性メッキが付されたスルーホールを
有するプリント基板において、上記スルーホールに熱硬
化性樹脂を充填し、この充填スルーホール部の表面に導
電性メッキを付着させたことを特徴とするプリント基板
1. A printed circuit board in which two or more wiring layers are laminated, and a through hole is formed in the laminated body and is coated with conductive plating, the through hole being filled with a thermosetting resin, A printed circuit board characterized by having conductive plating adhered to the surface of the filled through-hole section.
JP3002015A 1991-01-11 1991-01-11 Printed board Expired - Lifetime JPH0831695B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3002015A JPH0831695B2 (en) 1991-01-11 1991-01-11 Printed board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3002015A JPH0831695B2 (en) 1991-01-11 1991-01-11 Printed board

Publications (2)

Publication Number Publication Date
JPH04239194A true JPH04239194A (en) 1992-08-27
JPH0831695B2 JPH0831695B2 (en) 1996-03-27

Family

ID=11517529

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3002015A Expired - Lifetime JPH0831695B2 (en) 1991-01-11 1991-01-11 Printed board

Country Status (1)

Country Link
JP (1) JPH0831695B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09148698A (en) * 1995-11-28 1997-06-06 Sharp Corp Double-sided printed wiring board and its manufacture

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6397000A (en) * 1986-10-13 1988-04-27 イビデン株式会社 Multilayer printed interconnection board and manufacture of the same
JPH0189779U (en) * 1987-12-07 1989-06-13

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6397000A (en) * 1986-10-13 1988-04-27 イビデン株式会社 Multilayer printed interconnection board and manufacture of the same
JPH0189779U (en) * 1987-12-07 1989-06-13

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09148698A (en) * 1995-11-28 1997-06-06 Sharp Corp Double-sided printed wiring board and its manufacture

Also Published As

Publication number Publication date
JPH0831695B2 (en) 1996-03-27

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