JPH04159755A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPH04159755A
JPH04159755A JP28492490A JP28492490A JPH04159755A JP H04159755 A JPH04159755 A JP H04159755A JP 28492490 A JP28492490 A JP 28492490A JP 28492490 A JP28492490 A JP 28492490A JP H04159755 A JPH04159755 A JP H04159755A
Authority
JP
Japan
Prior art keywords
aluminum wiring
wiring
film
insulating film
semiconductor substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP28492490A
Other languages
Japanese (ja)
Inventor
Suehiro Tomiyasu
冨安 末広
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Kyushu Ltd
Original Assignee
NEC Kyushu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Kyushu Ltd filed Critical NEC Kyushu Ltd
Priority to JP28492490A priority Critical patent/JPH04159755A/en
Publication of JPH04159755A publication Critical patent/JPH04159755A/en
Pending legal-status Critical Current

Links

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE:To prevent decreases in yield and quality and to form by an increase of a lowest limit in the number of steps by providing aluminum wiring of a columnar shape formed only in a contact hole and surrounded at its periphery by an insulating film, and arbitrary aluminum wiring connected thereto. CONSTITUTION:An insulating film 5 for insulating a semiconductor substrate 1 from aluminum wiring 4a is adhered onto the wiring 4a of a contact with an insulating film 2. Then, the film 5 is etched until the wiring 4a is exposed, and aluminum wiring 4b is again adhered to the film 5 and the wiring 4a. A photoresist film 3c is patterned and with the film 3a as a protective film, the necessary wiring 4b is formed by etching. Thus, a problem of disconnection of the aluminum wiring scarcely occurs, it can largely contribute to improvements in the yield and the quality of a semiconductor device, and a microscopic product can be obtained by a minimum increase in the number of steps.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体装置に関し、特に半導体基板とアルミニ
ウノ\配線とのコンタクトを有する半導体装置に関する
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device, and more particularly to a semiconductor device having a contact between a semiconductor substrate and an aluminum wire.

〔従来の技術〕[Conventional technology]

従来、半導体基板とアルミニウム配線とのコンタクト構
造は、半導体基板上に絶縁膜を有し、その絶縁膜にフォ
トエツチング工程を経てコンタクトホールを形成し、ア
ルミニウム膜を付着し、アルミニウム配線をパターンニ
ングして、半導体基板とアルミニウム配線とのコンタク
トを形成することによりコンタクト構造を有する半導体
装置を得ていた。
Conventionally, the contact structure between a semiconductor substrate and aluminum wiring has an insulating film on the semiconductor substrate, a contact hole is formed in the insulating film through a photo-etching process, an aluminum film is attached, and the aluminum wiring is patterned. A semiconductor device having a contact structure has been obtained by forming a contact between a semiconductor substrate and an aluminum wiring.

〔発゛明が解決しようとする課題〕[The problem that the invention seeks to solve]

この従来の半導体装置では、半導体基板とアルミニウム
配線の間の絶縁性を高める為に、厚い絶縁膜を必要とし
、その為にコンタクト部のアスペクト比が高くなって、
コンタクト部でのアルミニウム配線の断線を引き起こし
、歩留・品質低下の大きな原因になっていた。
In this conventional semiconductor device, a thick insulating film is required to improve the insulation between the semiconductor substrate and the aluminum wiring, and as a result, the aspect ratio of the contact part becomes high.
This caused the aluminum wiring to break at the contact area, which was a major cause of a decline in yield and quality.

本発明の目的は、半導体基板とアルミニウム配線の間の
絶縁性を落すことなく、コンタクト部のアスペクト比を
低くし、アルミニウム配線の断線を生じにくくでき、歩
留・品質低下を防ぐことができ、かつ製作にあたっては
最低限の工数増で実施できる半導体装置を提供すること
にある。
The purpose of the present invention is to lower the aspect ratio of the contact portion without reducing the insulation between the semiconductor substrate and the aluminum wiring, to make the aluminum wiring less likely to break, and to prevent a decrease in yield and quality. Another object of the present invention is to provide a semiconductor device that can be manufactured with a minimum increase in man-hours.

〔課題を解決するための手段〕[Means to solve the problem]

本発明の半導体装置は、コンタクI・部の絶縁膜に囲ま
れた円柱形のアルミニウム配線と、これと接続される他
のアルミニウム配線とを有することを特徴として構成さ
れる。
The semiconductor device of the present invention is characterized by having a cylindrical aluminum wiring surrounded by an insulating film in a contact I section and another aluminum wiring connected to the cylindrical aluminum wiring.

〔実施例〕〔Example〕

第1図(a)〜(j)は本発明の一実施例およびその製
造方法を説明する為に工程順に示した半導体装置の断面
図である。この実施例の半導体基板とアルミニウム配線
のコンタクト形成方法は、半導体基板1の表面に絶縁膜
2を付着さぜ(第1図(a))、この絶縁膜2をパター
ンニングする為に絶縁膜2表面にフォトレジスト膜3a
をパターンニングしく第1図(b))、そのフォトレジ
スト膜3aを保護膜としてエツチング処理を行ない、前
述の半導体基板]、とアルミニウム配線4aのコンタク
1一部を形成するく第1図(C))。露出しな半導体基
板1と絶縁M2上にアルミニウム配線4aを付着させ(
第1図(d))、このアルミニウム配線4aをパターン
ニングする為にアルミニウム配線4aの表面にフォトレ
ジスト膜31Dをパターンニングして(第1図(e))
、次いで、フォトレジスト を行ない、半導体基板1とアルミニウム配線4aとのコ
ンタクト部を形成する。絶縁膜2とコンタクト部のアル
ミニウム配線4a上に半導体基板1とアルミニウム配線
4aとの絶縁を行なう為の絶縁膜5を付着させ(第1図
(f))、次に、絶縁膜5をアルミニウム配線4aが露
出するまでエツチング処理を行ないく第1図(g))、
絶縁膜5とアルミニウム配線4aの表面にアルミニウム
配線4bを再度付着させ(第1図(h))、フォトレジ
スト膜3cをパターンニングいて(第1図(i))−こ
のフォトレジスト膜3cを保護膜として、エツチング処
理を行なって必要とするアルミニウム配線4bを形成す
る。
FIGS. 1A to 1J are cross-sectional views of a semiconductor device shown in the order of steps to explain an embodiment of the present invention and its manufacturing method. The method of forming contact between a semiconductor substrate and aluminum wiring in this embodiment is to deposit an insulating film 2 on the surface of a semiconductor substrate 1 (FIG. 1(a)), and then pattern the insulating film 2. Photoresist film 3a on the surface
1(b)), and etching is performed using the photoresist film 3a as a protective film to form a part of the contact 1 between the aforementioned semiconductor substrate and the aluminum wiring 4a (FIG. 1(C)). )). Aluminum wiring 4a is attached on the exposed semiconductor substrate 1 and insulation M2 (
In order to pattern the aluminum wiring 4a, a photoresist film 31D is patterned on the surface of the aluminum wiring 4a (Fig. 1(e)).
Then, photoresist is applied to form a contact portion between the semiconductor substrate 1 and the aluminum wiring 4a. An insulating film 5 for insulating the semiconductor substrate 1 and the aluminum wiring 4a is deposited on the insulating film 2 and the aluminum wiring 4a of the contact portion (FIG. 1(f)), and then the insulating film 5 is attached to the aluminum wiring 4a. The etching process is performed until 4a is exposed (Fig. 1(g)),
The aluminum wiring 4b is attached again to the surface of the insulating film 5 and the aluminum wiring 4a (FIG. 1(h)), and the photoresist film 3c is patterned (FIG. 1(i)) - this photoresist film 3c is protected. As a film, an etching process is performed to form a necessary aluminum wiring 4b.

以上の工程により第1図(j)に示すような本発明の一
実施例の半導体装置を得ることができる。
Through the above steps, a semiconductor device according to an embodiment of the present invention as shown in FIG. 1(j) can be obtained.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、半導体基板とアルミニウ
ム配線とのコンタクトをアスペクト比の低い絶縁膜でと
ることにより、アルミ配線の断線の問題が生じに<<、
半導体装置の歩留,品質向上に大きく貢献できる。
As explained above, the present invention prevents the problem of disconnection of the aluminum wiring by making contact between the semiconductor substrate and the aluminum wiring using an insulating film with a low aspect ratio.
It can greatly contribute to improving the yield and quality of semiconductor devices.

また、現状の製造方法より、最小限の工程数の増加で、
これからの微細な製品を得ることができる。
In addition, compared to the current manufacturing method, with a minimum increase in the number of steps,
You can get fine products from this.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図(a)〜(j>は、本発明の一実施例およびその
製造方法を説明するために工程順に示した断面図である
。 ]・・・半導体基板、2・・・絶縁膜、3a,3b。 3C・・・フォトレジスト膜、4a,4b・・・アルミ
ニー5= ラム配線、5・・・絶縁膜。 追 1  閃
1(a) to (j>) are cross-sectional views shown in the order of steps to explain an embodiment of the present invention and its manufacturing method. ]...Semiconductor substrate, 2...Insulating film, 3a, 3b. 3C... Photoresist film, 4a, 4b... Aluminum 5 = RAM wiring, 5... Insulating film. Addendum 1 Flash

Claims (1)

【特許請求の範囲】[Claims] 半導体基板と、該半導体基板上に形成された絶縁膜と、
該絶縁膜上にパターンニングされたアルミニウム配線と
を有し、前記アルミニウム配線と前記半導体基板とのコ
ンタクトが形成されてなる半導体装置において、前記半
導体基板上に形成された絶縁膜と、該絶縁膜に形成され
たコンタクトホールと、該コンタクトホール部のみに形
成され周囲を絶縁膜に囲まれた円柱形のアルミニウム配
線と該円柱形のアルミニウム配線に接続された任意のア
ルミニウム配線とを有することを特徴とする半導体装置
a semiconductor substrate; an insulating film formed on the semiconductor substrate;
A semiconductor device comprising an aluminum wiring patterned on the insulating film, and a contact between the aluminum wiring and the semiconductor substrate is formed, the insulating film formed on the semiconductor substrate, and the insulating film. A contact hole formed in the contact hole, a cylindrical aluminum wiring formed only in the contact hole and surrounded by an insulating film, and an arbitrary aluminum wiring connected to the cylindrical aluminum wiring. semiconductor device.
JP28492490A 1990-10-23 1990-10-23 Semiconductor device Pending JPH04159755A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP28492490A JPH04159755A (en) 1990-10-23 1990-10-23 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP28492490A JPH04159755A (en) 1990-10-23 1990-10-23 Semiconductor device

Publications (1)

Publication Number Publication Date
JPH04159755A true JPH04159755A (en) 1992-06-02

Family

ID=17684825

Family Applications (1)

Application Number Title Priority Date Filing Date
JP28492490A Pending JPH04159755A (en) 1990-10-23 1990-10-23 Semiconductor device

Country Status (1)

Country Link
JP (1) JPH04159755A (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5893261A (en) * 1981-11-30 1983-06-02 Toshiba Corp Manufacture of semiconductor device
JPS6025255A (en) * 1983-07-22 1985-02-08 Nec Corp Manufacture of semiconductor device
JPS61248471A (en) * 1985-04-26 1986-11-05 Hitachi Ltd Semiconductor device
JPH01209743A (en) * 1988-02-17 1989-08-23 Mitsubishi Electric Corp Manufacture of semiconductor device

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5893261A (en) * 1981-11-30 1983-06-02 Toshiba Corp Manufacture of semiconductor device
JPS6025255A (en) * 1983-07-22 1985-02-08 Nec Corp Manufacture of semiconductor device
JPS61248471A (en) * 1985-04-26 1986-11-05 Hitachi Ltd Semiconductor device
JPH01209743A (en) * 1988-02-17 1989-08-23 Mitsubishi Electric Corp Manufacture of semiconductor device

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