JPH0382063A - Mounting of semiconductor element on heat sink - Google Patents
Mounting of semiconductor element on heat sinkInfo
- Publication number
- JPH0382063A JPH0382063A JP21892589A JP21892589A JPH0382063A JP H0382063 A JPH0382063 A JP H0382063A JP 21892589 A JP21892589 A JP 21892589A JP 21892589 A JP21892589 A JP 21892589A JP H0382063 A JPH0382063 A JP H0382063A
- Authority
- JP
- Japan
- Prior art keywords
- heat sink
- mounting
- semiconductor element
- container
- hic
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 9
- 238000000034 method Methods 0.000 claims description 7
- 101000993376 Homo sapiens Hypermethylated in cancer 2 protein Proteins 0.000 abstract 2
- 102100031613 Hypermethylated in cancer 2 protein Human genes 0.000 abstract 2
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 abstract 1
- 238000004191 hydrophobic interaction chromatography Methods 0.000 description 9
- 239000004677 Nylon Substances 0.000 description 3
- 238000009434 installation Methods 0.000 description 3
- 229920001778 nylon Polymers 0.000 description 3
- 238000010079 rubber tapping Methods 0.000 description 3
- 238000005452 bending Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000003292 glue Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Cooling Or The Like Of Electrical Apparatus (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は放熱板を必要とするトランジスタ・ダイオード
・ＨＩＣなどの半導体素子の放熱板への取付は方法に関
する。DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a method for attaching semiconductor elements such as transistors, diodes, and HICs that require a heat sink to a heat sink.
従来、トランジスタ・ダイオード・ＨＩＣの放熱板への
取付は方法としては、第２図に示すようなものがある０
図中１はタッピングネジ、２は止めバンド、３は放熱板
、４はプリント板、５はトランジスタ、６は絶縁板であ
る０本取付は方法の場合トランジスタを止めバンドで放
熱板に固定し止めバンドを放熱板にタッピングネジによ
ってネジ止めする取付けとなっている。Conventionally, there is a method for mounting transistors, diodes, and HICs on heat sinks as shown in Figure 2.
In the figure, 1 is a tapping screw, 2 is a retaining band, 3 is a heat sink, 4 is a printed board, 5 is a transistor, and 6 is an insulating board.If the installation method is 0, fix the transistor to the heat sink with a retaining band. The band is attached to the heat sink using tapping screws.
上述した従来の取付は方法は、トランジスタの放熱板へ
の取付は位置を支持するものがない為に、トランジスタ
が放熱板の所定位置に正確に設置されず、プリント板に
実装する際に、トランジスタのリード線がプリント板の
穴位置と合わず、トランジスタのり一４ド線が曲ってし
まうといった損傷や実装し難いといった欠点がある。In the conventional mounting method described above, since there is no support for the position of the transistor when mounting it on the heat sink, the transistor is not placed accurately in the specified position on the heat sink. There are drawbacks such as damage such as lead wires not matching the holes in the printed circuit board, bending of the transistor glue wires, and difficulty in mounting.
本発明のトランジスタ・ダイオード・ＨＩＣの放熱板へ
の取付は方法は、トランジスタ・ダイオード・ＨＩＣを
放熱板に対して密着した状態で収められ、しかも放熱板
への取付は支持穴を二点以上もつ容器（ホルダー）を有
する。The method for attaching the transistor, diode, and HIC to the heat sink of the present invention is to fit the transistor, diode, and HIC in close contact with the heat sink, and to attach the transistor, diode, and HIC to the heat sink by having two or more support holes. It has a container (holder).
次に本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.
第１図は本発明の一実施例である。１はナイロンリベッ
ト、２は容器（ホルダー）、３はＨＩＣ１４は絶縁板、
５は放熱板である０本取付は方法の場合、ＨＩＣが放熱
板に対し密着した状態で収められ、また上側及び左右に
放熱板への取付は位置を支持する取付は穴を設けた容器
（ホルダー〉を用いてＨＩＣを放熱板に固定し、容器（
ホルダー）を放熱板にナイロンリベットによって取付け
る事によってＨＩＣを確実に放熱板の所定位置に取付け
るこ、とが出来る。FIG. 1 shows an embodiment of the present invention. 1 is a nylon rivet, 2 is a container (holder), 3 is a HIC14 insulating plate,
5 is a heat sink.In the case of the 0-piece installation method, the HIC is placed in close contact with the heat sink, and when it is installed on the top and left and right sides of the heat sink, a container with holes is used to support the position. Fix the HIC to the heat sink using the holder (
By attaching the holder) to the heat sink using nylon rivets, the HIC can be reliably attached to the specified position on the heat sink.
以上説明したように本発明は、トランジスタ・ＨＩＣを
放熱板に取付ける場合に、容器（ホルダー）を用いるこ
とによってプリント板への実装の際に起りやすいリード
線の損傷防止及び実装を容易にする効果がある。As explained above, the present invention uses a container (holder) when attaching a transistor/HIC to a heat sink, thereby preventing damage to the lead wires that tends to occur when mounting on a printed circuit board, and facilitating mounting. There is.
第１図（Ａ）および（Ｂ）は本発明の一実施例を示すＨ
ＩＣの放熱板への取付は分解斜視図および斜視図、第２
図は従来のトランジスタの放熱板への取付けを示した取
付は図である。
第１図 １・・・ナイロンリベット、２・・・容器（ホ
ルダー）、３・・・ＨＩＣ１４・・・絶縁板、５・・・
放熱板。
第２図 １・・・タッピングネジ、２・・・止めバンド
、３・・・放熱板、４・・・プリント板、５・・・トラ
ンジスタ。FIGS. 1(A) and 1(B) show an embodiment of the present invention.
The installation of the IC on the heat sink is shown in the exploded perspective view and perspective view, Part 2.
The figure shows the attachment of a conventional transistor to a heat sink. Fig. 1 1... Nylon rivet, 2... Container (holder), 3... HIC14... Insulating plate, 5...
Heat sink. Fig. 2 1... Tapping screw, 2... Stopping band, 3... Heat sink, 4... Printed board, 5... Transistor.
Claims (1)
しかも放熱板への取付け支持穴を二点以上持つ容器によ
って確実に半導体素子を放熱板の所定位置へ取付ける事
を特徴とする半導体素子の放熱板への取付け方法。Semiconductor elements are housed in close contact with the heat sink,
Moreover, the method for attaching a semiconductor element to a heat sink is characterized in that the semiconductor element is reliably attached to a predetermined position on the heat sink using a container having two or more mounting support holes for the heat sink.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP21892589A JPH0382063A (en) | 1989-08-24 | 1989-08-24 | Mounting of semiconductor element on heat sink |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP21892589A JPH0382063A (en) | 1989-08-24 | 1989-08-24 | Mounting of semiconductor element on heat sink |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0382063A true JPH0382063A (en) | 1991-04-08 |
Family
ID=16727474
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP21892589A Pending JPH0382063A (en) | 1989-08-24 | 1989-08-24 | Mounting of semiconductor element on heat sink |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0382063A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5376587A (en) * | 1991-05-03 | 1994-12-27 | International Business Machines Corporation | Method for making cooling structures for directly cooling an active layer of a semiconductor chip |
| US7663885B2 (en) * | 2007-03-06 | 2010-02-16 | Funai Electric Co., Ltd. | IC fixing structure |
| US20100127391A1 (en) * | 2008-11-21 | 2010-05-27 | Tsuyoshi Hasegawa | Fixture for semiconductor device and assembly of semiconductor device |
-
1989
- 1989-08-24 JP JP21892589A patent/JPH0382063A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5376587A (en) * | 1991-05-03 | 1994-12-27 | International Business Machines Corporation | Method for making cooling structures for directly cooling an active layer of a semiconductor chip |
| US7663885B2 (en) * | 2007-03-06 | 2010-02-16 | Funai Electric Co., Ltd. | IC fixing structure |
| US20100127391A1 (en) * | 2008-11-21 | 2010-05-27 | Tsuyoshi Hasegawa | Fixture for semiconductor device and assembly of semiconductor device |
| US8629555B2 (en) * | 2008-11-21 | 2014-01-14 | Kabushiki Kaisha Toshiba | Fixture for semiconductor device and assembly of semiconductor device |
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