JPH0370238B2 - - Google Patents
Info
- Publication number
- JPH0370238B2 JPH0370238B2 JP56025729A JP2572981A JPH0370238B2 JP H0370238 B2 JPH0370238 B2 JP H0370238B2 JP 56025729 A JP56025729 A JP 56025729A JP 2572981 A JP2572981 A JP 2572981A JP H0370238 B2 JPH0370238 B2 JP H0370238B2
- Authority
- JP
- Japan
- Prior art keywords
- pair
- circuit
- drive circuit
- transistors
- waveform
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 230000000295 complement effect Effects 0.000 claims description 3
- 230000008878 coupling Effects 0.000 claims 1
- 238000010168 coupling process Methods 0.000 claims 1
- 238000005859 coupling reaction Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 6
- 230000010354 integration Effects 0.000 description 3
- 230000003796 beauty Effects 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 238000007493 shaping process Methods 0.000 description 2
- WHXSMMKQMYFTQS-UHFFFAOYSA-N Lithium Chemical compound [Li] WHXSMMKQMYFTQS-UHFFFAOYSA-N 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 229910052744 lithium Inorganic materials 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 230000005236 sound signal Effects 0.000 description 1
Description
【発明の詳細な説明】
本発明はコイルなしで圧電ブザーを駆動し、例
えば電子ウオツチ又はクロツクやポケツト電卓の
如き小型の電子機器に用いるに適した駆動回路に
関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a drive circuit that drives a piezoelectric buzzer without a coil and is suitable for use in small electronic devices such as electronic watches, clocks, and pocket calculators.
従来、圧電セラミツクの薄板を振動板と貼合せ
た、いわゆる圧電ブザーの駆動回路は、圧電素子
の各面の電極と有鉄心コイルの両端を並列にし、
これをバイポーラトランジスタのエミツタ・コレ
クタと直列にして電源の両端に接続し、ベースに
駆動用の音響信号を与えていた。トランジスタに
よる電流の断続がコイルにブザー駆動のための高
電圧を誘起させるものである。一方最近では電子
ウオツチや電卓その他の小型電子機器においては
音の多様さ、美しさと共に回路の更なる集積化と
極度のコストダウンが要求されている。前記従来
回路はコイルの誘起電圧がスパイク波形であるこ
と、駆動回路の信号入力が唯1つであること、コ
イル素子とパイポーラ素子の存在のいずれも上記
要求に対して不利である。 Conventionally, the drive circuit for a so-called piezoelectric buzzer, in which a thin plate of piezoelectric ceramic is bonded to a diaphragm, has the electrodes on each side of the piezoelectric element parallel to both ends of the iron-core coil.
This was connected in series with the emitter and collector of a bipolar transistor and connected to both ends of the power supply, giving the base an acoustic signal for driving. Intermittent current flow by the transistor induces a high voltage in the coil to drive the buzzer. On the other hand, in recent years, electronic watches, calculators, and other small electronic devices are required to have greater variety and beauty in sound, as well as further integration of circuits and extreme cost reductions. In the conventional circuit, the induced voltage of the coil has a spike waveform, the drive circuit has only one signal input, and the presence of a coil element and a bipolar element are all disadvantageous to the above requirements.
本発明は、一対の相補型MOSトランジスタを
それぞれ電源の高電位側と低電位側に接続し、各
対のPチヤネルトランジスタとNチヤネルトラン
ジスタの結合点に2端子型圧電素子の各端子をそ
れぞれ結合し、更に前記各対のトランジスタに対
して異なる周波数又は波形の音響信号を供給する
ようにしたことを特徴とする圧電ブザー駆動回路
であつて、この構成によつて従来技術の欠点を除
き、音の多様さと美しさ、回路の集積化と低コス
ト化を同時に達成することを目的とするものであ
る。以下図面に基いて本発明の各実施例を説明す
る。 The present invention connects a pair of complementary MOS transistors to the high potential side and low potential side of a power supply, respectively, and connects each terminal of a two-terminal piezoelectric element to the connection point of each pair of P channel transistor and N channel transistor. The piezoelectric buzzer driving circuit is further characterized in that an acoustic signal of a different frequency or waveform is supplied to each pair of transistors, and with this configuration, the drawbacks of the prior art can be eliminated and the sound signal can be improved. The aim is to simultaneously achieve the diversity and beauty of circuits, increase circuit integration, and reduce costs. Embodiments of the present invention will be described below based on the drawings.
第1図は本発明の駆動回路1を用いた水晶アラ
ームウオツチのブロツク回路図である。2は水晶
発振器、3は分周器、4は例えば時と分を数えそ
のデータを保持する計時回路、5はアラームセツ
ト時刻のメモリーと、該メモリーの値と計時回路
4のデータとが一致したときアラーム動作信号6
を出力する目安回路、7は信号6を受けたとき、
分周器の途中出力8を通過させるゲート回路、9
及び10はブザー駆動回路1の異なる周波数の2
つの音響周波数の入力信号φ1とφ2のそれぞれを
作成する副分周器である。各分周器の出力を更に
適当なパルス巾にする波形整形器は図示しない
が、あつても差支えない。ブザー駆動回路1はP
チヤネルトランジスタ11及び13、Nチヤネル
トランジスタ12及び14より成り、一対の相補
型MOSインバータが直流電源VDDとVSS間に接続
され、圧電ブザー15がCMOSトランジスタの
結合点に結線されている。φ1及びφ2が各インバ
ータの入力信号となる。電源としては銀電池やリ
チウム電池、あるいはそれらを昇圧回路で昇圧し
たものが用いられる。 FIG. 1 is a block circuit diagram of a crystal alarm watch using a drive circuit 1 of the present invention. 2 is a crystal oscillator, 3 is a frequency divider, 4 is a clock circuit that counts, for example, hours and minutes and holds the data; 5 is a memory for alarm set time, and the value in this memory matches the data in clock circuit 4. When alarm operation signal 6
A reference circuit that outputs 7, when receiving signal 6,
Gate circuit 9 for passing intermediate output 8 of the frequency divider
and 10 are 2 of different frequencies of the buzzer drive circuit 1.
This is a sub-frequency divider that creates input signals φ 1 and φ 2 of two acoustic frequencies, respectively. A waveform shaper for further adjusting the output of each frequency divider to an appropriate pulse width is not shown, but it may be provided. Buzzer drive circuit 1 is P
Consisting of channel transistors 11 and 13 and N-channel transistors 12 and 14, a pair of complementary MOS inverters are connected between DC power supplies VDD and VSS , and a piezoelectric buzzer 15 is connected to the connection point of the CMOS transistors. φ 1 and φ 2 become input signals for each inverter. As a power source, a silver battery, a lithium battery, or a battery boosted by a booster circuit is used.
第2図は駆動回路の入力信号φ1,φ2と、圧電
ブザー15の端子電圧φ1−φ2の一例を示したも
のである。φ1とφ2の周波数を僅か異ならせてあ
るので、φ1−φ2のパルス巾は時間と共に変化し、
発音強度も同様に変化し、耳にはビート音として
聞える。これは単調な音色に変化をつけるもので
あり、従来用いられるパルスによる変調音よりも
柔く心地より変調音が得られる。第3図の波形実
施例は信号φ1とφ2の周波数比を3対2とし(一
般には簡単な整数比とする)、それらの和音をφ1
−φ2として出力した場合である。第4図は同じ
周波数比の2つの正弦波A,Bを混合した波形A
−Bを示すが、この理想的な和音波形と、第3図
の矩形波で作られたφ1−φ2波形とは大体似てお
り、これで駆動されるブザーが和音(もちろん高
調波は含まれるが)を出力することが理解でき
る。この混合作用もスパイク波形の出る従来の駆
動回路に前もつて混合した入力信号を与えた場合
比しはるかになめらかな和音を出力するに適して
いる。 FIG. 2 shows an example of the input signals φ 1 and φ 2 of the drive circuit and the terminal voltage φ 1 -φ 2 of the piezoelectric buzzer 15. Since the frequencies of φ 1 and φ 2 are slightly different, the pulse width of φ 1 − φ 2 changes with time,
The sound intensity changes in the same way, and the sound is heard as a beat sound to the ear. This adds variation to a monotonous tone, and provides a softer and more pleasant modulated sound than the conventionally used modulated sound using pulses. In the waveform example shown in FIG. 3, the frequency ratio of the signals φ 1 and φ 2 is 3:2 (generally a simple integer ratio), and their chord is φ 1
This is the case where it is output as −φ 2 . Figure 4 shows a waveform A that is a mixture of two sine waves A and B with the same frequency ratio.
-B, but this ideal harmonic waveform is roughly similar to the φ 1 - φ 2 waveform created with the rectangular wave in Figure 3, and the buzzer driven by this waveform plays a chord (of course, the harmonics are not It is understandable that it outputs (including the following). This mixing effect is also suitable for outputting a much smoother chord than when a premixed input signal is applied to a conventional drive circuit that generates a spike waveform.
第5図は発音強度に強弱の制御をするため、信
号φ1,φ2の波形整形回路としてアンドゲート1
6と17を駆動回路1の入力部に附した他の実施
例部分ブロツク図である。それらの原入力信号
φ3,φ4,φ5,φ6の例を第6図に示す。φ3とφ4は
周波数比2対1の音響信号であり、φ5とφ6が論
理“1”レベルの定常入力である場合、これらが
駆動回路1にそのまま印加されてφ3−φ4の如き
オクターブ和音の駆動波形となる。しかるにφ5
及びφ6にやはり副分周器と波形整形回路によつ
て作成したパルス巾を変化させるための補正信号
φ5及びφ6(周波数はφ4に同じ)を加えると、各ア
ンドゲート16,17の出力φ1,φ2は図示のよ
うに変化を受け、駆動出力φ1−φ2はやはりオク
ターブ和音波形ではあるが、パルス巾が細くな
る。即ち音色は近似であるが音量は低下する。信
号φ5,φ6の印加の有無を使用者が任意に行える
ようにするか、アラームセツト時間帯や使用機能
により自動的に異ならしめ、使用法を多様化させ
便利にできる。 Figure 5 shows an AND gate 1 as a waveform shaping circuit for signals φ 1 and φ 2 in order to control the sound intensity.
6 is a partial block diagram of another embodiment in which numerals 6 and 17 are attached to the input section of the drive circuit 1. FIG. Examples of these original input signals φ 3 , φ 4 , φ 5 , and φ 6 are shown in FIG. φ 3 and φ 4 are acoustic signals with a frequency ratio of 2:1, and when φ 5 and φ 6 are steady inputs at a logic “1” level, they are applied as they are to the drive circuit 1, and the signal φ 3 −φ 4 is generated. The driving waveform is an octave chord like this. However, φ5
And when correction signals φ 5 and φ 6 (same frequency as φ 4 ) are added to φ 6 for changing the pulse width also created by the sub frequency divider and waveform shaping circuit, each AND gate 16, 17 The outputs φ 1 and φ 2 are changed as shown in the figure, and the drive output φ 1 −φ 2 is still an octave sum sound waveform, but the pulse width becomes narrower. In other words, the tone is similar, but the volume is lower. The application of the signals φ 5 and φ 6 can be applied or not applied at will by the user, or can be automatically changed depending on the alarm set time period or the function used, thereby making it possible to diversify the usage and make it more convenient.
更に他の音量変化の実施例としては、図示しな
いが、音響駆動信号を可聴周波数以上の高周波で
断続させ、その断続の有無または程度で音量を制
御する。更にCMOSトランジスタのゲート入力
を結合せず分離し、それらの端子に異なる信号を
与える利用法をとつてもよい。 As another example of changing the volume, although not shown, the acoustic drive signal is intermittent at a high frequency higher than the audible frequency, and the volume is controlled by the presence or absence or degree of the intermittent. Furthermore, the gate inputs of the CMOS transistors may be separated without being combined, and different signals may be applied to these terminals.
以上各実施例による説明で明らかなように、本
発明により圧電ブザーの音色や音量の多様化がは
かれると同時に、信号を混合するための格別な混
合回路も必要とせず、コイル素子も不要であるこ
とと相俟つて回路の集積化に適した構成であるた
め、装置の小型化や低廉化が達成できる効果があ
る。 As is clear from the above description of each embodiment, the present invention allows diversification of the tone and volume of the piezoelectric buzzer, and at the same time, does not require a special mixing circuit for mixing signals and does not require a coil element. In addition, since the structure is suitable for circuit integration, it is possible to reduce the size and cost of the device.
第1図は本発明の一実施例を示す回路ブロツク
図、第2図、第3図、第4図は各々第1図の入力
信号の波形図、第5図は他の実施例の部分回路ブ
ロツク図、第6図は第5図の入力信号波形図であ
る。
1……ブザー駆動回路、11,12,13,1
4……一対のCMOSトランジスタ、15……圧
電ブザー、φ1,φ2……駆動入力信号。
FIG. 1 is a circuit block diagram showing one embodiment of the present invention, FIGS. 2, 3, and 4 are waveform diagrams of the input signals shown in FIG. 1, and FIG. 5 is a partial circuit of another embodiment. The block diagram, FIG. 6, is an input signal waveform diagram of FIG. 1... Buzzer drive circuit, 11, 12, 13, 1
4...Pair of CMOS transistors, 15...Piezoelectric buzzer, φ1 , φ2 ...Drive input signals.
Claims (1)
電源の高電位側と低電位側に接続し、各対のPチ
ヤネルトランジスタとNチヤネルトランジスタの
結合点に2端子型圧電素子の各端子をそれぞれ結
合すると共に、互に異なる周波数を出力する複数
の音響信号作成手段を設け、該音響信号作成手段
の各出力端を前記各対のトランジスタの入力端に
選択的に結合したことによつて、前記各対のトラ
ンジスタに対して異なる周波数又は波形の音響信
号を供給するようにしたことを特徴とする圧電ブ
ザー駆動回路。1. Connect a pair of complementary MOS transistors to the high potential side and low potential side of a power supply, respectively, and connect each terminal of a two-terminal piezoelectric element to the connection point of each pair of P channel transistor and N channel transistor, and By providing a plurality of acoustic signal generating means that output mutually different frequencies, and selectively coupling each output terminal of the acoustic signal generating means to the input terminal of each pair of transistors, the transistors of each pair 1. A piezoelectric buzzer drive circuit, characterized in that the piezoelectric buzzer drive circuit is configured to supply acoustic signals of different frequencies or waveforms to the piezoelectric buzzer.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56025729A JPS57139797A (en) | 1981-02-24 | 1981-02-24 | Piezo-electric buzzer driving circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56025729A JPS57139797A (en) | 1981-02-24 | 1981-02-24 | Piezo-electric buzzer driving circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS57139797A JPS57139797A (en) | 1982-08-28 |
JPH0370238B2 true JPH0370238B2 (en) | 1991-11-06 |
Family
ID=12173887
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56025729A Granted JPS57139797A (en) | 1981-02-24 | 1981-02-24 | Piezo-electric buzzer driving circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57139797A (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP6035825B2 (en) * | 2012-04-06 | 2016-11-30 | 日本特殊陶業株式会社 | Alarm buzzer |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS53129074A (en) * | 1977-04-18 | 1978-11-10 | Ricoh Watch | Alarm drive device for electronic timepiece |
JPS556313A (en) * | 1978-06-27 | 1980-01-17 | Seiko Instr & Electronics | Piezoelectric speaker driving circuit |
-
1981
- 1981-02-24 JP JP56025729A patent/JPS57139797A/en active Granted
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS53129074A (en) * | 1977-04-18 | 1978-11-10 | Ricoh Watch | Alarm drive device for electronic timepiece |
JPS556313A (en) * | 1978-06-27 | 1980-01-17 | Seiko Instr & Electronics | Piezoelectric speaker driving circuit |
Also Published As
Publication number | Publication date |
---|---|
JPS57139797A (en) | 1982-08-28 |
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