JPH0359800A - Alarm receiver - Google Patents
Alarm receiverInfo
- Publication number
- JPH0359800A JPH0359800A JP19599589A JP19599589A JPH0359800A JP H0359800 A JPH0359800 A JP H0359800A JP 19599589 A JP19599589 A JP 19599589A JP 19599589 A JP19599589 A JP 19599589A JP H0359800 A JPH0359800 A JP H0359800A
- Authority
- JP
- Japan
- Prior art keywords
- receiver
- power supply
- power
- voltage
- time
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000012545 processing Methods 0.000 claims abstract description 25
- 238000001514 detection method Methods 0.000 claims abstract description 18
- 230000006870 function Effects 0.000 abstract description 10
- 239000003990 capacitor Substances 0.000 description 8
- 238000000034 method Methods 0.000 description 6
- 230000007423 decrease Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000012544 monitoring process Methods 0.000 description 2
- 230000002159 abnormal effect Effects 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000007689 inspection Methods 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 238000011084 recovery Methods 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
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- Alarm Systems (AREA)
Abstract
Description
【発明の詳細な説明】
［産業上の利用分野コ
本発明は、ＣＰＵを含む制御回路部により各種の制御処
理を行なう警報受信機に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an alarm receiver that performs various control processes by a control circuit section including a CPU.
［従来の技術］
近年、火災監視等を行なう警報受信機の制御性能を向上
するために受信制御処理にＣＰＵが採用され、ＣＰＵに
よるプログラム制御に従って、火災受信時の警報及び制
御処理、各種のスイッチ操作に応じた制御処理等を行な
うようにしている。[Prior Art] In recent years, in order to improve the control performance of alarm receivers that monitor fires, CPUs have been adopted for reception control processing, and according to program control by the CPU, alarm and control processing at the time of fire reception, and various switches Control processing and the like are performed according to the operation.
また警報受信機は、通常、ＡＣｌｏｏＶの商用電源で動
作するが、停電による機能停止を回避するためにバッテ
リイによる予備電源を内蔵しており、商用電源ＡＣ１０
０Ｖが断たれると自動的に予備電源に切替わるようにし
ている。In addition, although the alarm receiver normally operates on AClooV commercial power, it has a built-in backup power source with a battery to avoid function stoppage due to power outage.
When 0V is cut off, it automatically switches to the backup power source.
［発明が解決しようとする課題］
ところで、通常の監視状態にあっては、商用電源及び予
備電源の両方がダウンしてしまう可能性は少ないが、例
えば設備の立上げ時や保守点検時等においては、スイッ
チ操作により警報停止、移報停止等の各種の機能設定を
行なった状態で、商用電源及び予備電源を外すことがあ
り、商用電源及び予備電源が断たれると、そのとき設定
している各種の受信機状態は失われてしまう。[Problem to be solved by the invention] By the way, under normal monitoring conditions, there is a small possibility that both the commercial power source and the standby power source will go down, but for example, when starting up equipment or during maintenance and inspection, etc. The commercial power supply and standby power supply may be disconnected while various function settings such as alarm stop and transfer stop have been made by operating the switch, and if the commercial power supply and standby power supply are cut off, the settings at that time The various receiver states present will be lost.
このため電源を復旧させた際に、再度、必要な機能設定
状態を作り出すためにスイッチ操作を行なわなければな
らない煩しさがあった。For this reason, when the power is restored, there is the inconvenience of having to operate the switch again to create the necessary function setting state.
本発明は、このような従来の問題点に鑑みてなされたも
ので、商用電源及び予備電源の両方がダウンしても、電
源復旧時にダウン前の受信機状態を回復できるようにし
た警報受信機を提供することを目的とする。The present invention has been made in view of such conventional problems, and provides an alarm receiver that is capable of recovering the receiver state before the failure when the power is restored even if both the commercial power source and the backup power source go down. The purpose is to provide
［課題を解決するための手段］
まず本発明は、受信機の制御処理を実行するＣＰＵを備
えた制御回路部と、該制御回路部で処理される各種のデ
ータを格納可能な不揮発性メモリと、前記制御回路部に
電源を供給すると共に電源入力が断たれても所定時間は
出力電源電圧を維持可能な定電圧回路とを備えた警報受
信機を対象とする。[Means for Solving the Problems] First, the present invention includes a control circuit section including a CPU that executes control processing of a receiver, and a nonvolatile memory capable of storing various data processed by the control circuit section. The object of the present invention is an alarm receiver equipped with a constant voltage circuit that supplies power to the control circuit section and can maintain an output power supply voltage for a predetermined time even if the power input is cut off.
このような警報受信機につき本発明にあっては、商用電
源及び予備電源の出力電圧を監視し、該出力電圧の所定
電圧以下への低下を検出する電源断検出手段と；該電源
断検出手段からの検出信号を受けた時に、その時の受信
機処理データを前記不揮発性メモリに書込む退避制御手
段と；電源投入時に前記不揮発性メモリの格納データに
基づいて受信機状態を初期設定する初期設定手段と；を
設けるようにしたものである。In the present invention, for such an alarm receiver, a power outage detection means for monitoring the output voltage of the commercial power source and the standby power source and detecting a drop in the output voltage below a predetermined voltage; a save control means for writing the receiver processing data at that time into the nonvolatile memory when receiving a detection signal from the nonvolatile memory; and an initial setting for initializing the receiver state based on the data stored in the nonvolatile memory when power is turned on; A means and; are provided.
［作用］
このような構成を備えた本発明の警報受信機によれば、
商用電源及び予備電源の両方がダウンしても、そのとき
スイッチ操作等により設定されている受信機状態の処理
データを制御回路部への電源電圧が異常になる前にＥ２
ＰＲＯＭ等の不揮発性メモリに書込むこととなり、電源
復旧時に不揮発性メモリに退避したデータに基づく初期
設定を行なうことで、電源ダウンが起きてもダウン前の
受信機状態に回復することができ、再度のスイッチ操作
による受信機状態の再設定を不要にできる。[Function] According to the alarm receiver of the present invention having such a configuration,
Even if both the commercial power supply and the standby power supply go down, the processing data of the receiver status set by switch operation etc. at that time is sent to E2 before the power supply voltage to the control circuit section becomes abnormal.
By writing to a non-volatile memory such as PROM, and performing initial settings based on the data saved in the non-volatile memory when the power is restored, even if the power goes down, the receiver state can be restored to the state before the power went down. This eliminates the need to reset the receiver status by operating the switch again.
［実施例］
第１図は本発明の一実施例を示した実施例構成図である
。[Embodiment] FIG. 1 is a block diagram showing an embodiment of the present invention.
第１図において、１０はＣＰＵであり、ＣＰＵ１０に対
しては火災感知器を接続している感知器回線からの火災
信号を受信する火災受信部１２、代表火災灯、地区灯等
の各種の表示灯を備えた表示部１４及び受信機操作に必
要な各種のスイッチを備えた操作部１６のそれぞれが接
続される。In FIG. 1, 10 is a CPU, and for the CPU 10 there is a fire receiving section 12 that receives fire signals from a detector line to which a fire detector is connected, and various displays such as a representative fire light, a district light, etc. A display section 14 equipped with a light and an operation section 16 equipped with various switches necessary for operating the receiver are connected to each other.
また、ＣＰＵＩ Ｏに対しては、ＣＰＵｌ０により処理
される各種のデータを格納可能な不揮発性メモリとして
Ｅ２ＦＲＯＭ１８を接続している。Further, an E2FROM 18 is connected to the CPUIO as a non-volatile memory capable of storing various data processed by the CPUIO.
勿論、ＣＰＵｌ０はプログラムを格納したＲＯＭや制御
データを一時記憶するＲＡＭを備えることは勿論である
。Of course, the CPU 10 includes a ROM that stores programs and a RAM that temporarily stores control data.
ＣＰＵｌ０に対する電源供給は、通常時は商用ＡＣ１０
０ボルトを整流した定電圧出力により行なわれる。The power supply to CPUl0 is normally commercial AC10.
This is done using a constant voltage output that is rectified from 0 volts.
即ち、電源トランス２０を介して得られた交流電源入力
をダイオードブリッジ２２により整流した後、定電圧回
路２４で受信機電源電圧■。＝２４ボルトを発生してい
る。定電圧回路２４の出力電圧は電源切替回路２６を介
してＣＰＵ用定電圧回路２８に与えられ、ＣＰＵ用定電
圧回路２８で電源電圧ｖ０＝５ボルトの定電圧出力に変
換している。ＣＰＵ用定電圧回路２８の入力と出力のそ
れぞれにはコンデンサＣ１，Ｃ２が設けられ、コンデン
サＣ１はダイオードＤ１を介して２４ボルトに充電され
、またコンデンサＣ２は定電圧回路２８の出力により５
ボルトに充電されている。コンデンサＣ１，Ｃ２は入力
電源が断たれてもコンデンサＣ１，Ｃ２の充電電圧によ
りＣＰＵＩ Ｏに対する電源供給を所定時間維持する。That is, after the AC power input obtained through the power transformer 20 is rectified by the diode bridge 22, the receiver power supply voltage is changed to the receiver power supply voltage (■) by the constant voltage circuit 24. = Generates 24 volts. The output voltage of the constant voltage circuit 24 is given to the CPU constant voltage circuit 28 via the power supply switching circuit 26, and is converted into a constant voltage output of the power supply voltage v0=5 volts by the CPU constant voltage circuit 28. Capacitors C1 and C2 are provided at the input and output of the CPU constant voltage circuit 28, respectively, the capacitor C1 is charged to 24 volts via the diode D1, and the capacitor C2 is charged to 5 volts by the output of the constant voltage circuit 28.
Volt is charged. Even if the input power is cut off, the capacitors C1 and C2 maintain the power supply to the CPU I O for a predetermined time by the charging voltage of the capacitors C1 and C2.
また、ダイオードＤ１は入力電源遮断時のコンデンサＣ
１゜Ｃ２の入力側への放電を阻止するために設けている
。In addition, diode D1 is connected to capacitor C when input power is cut off.
This is provided to prevent discharge of 1°C2 to the input side.
このような商用電源側に対しバッテリイーを使用した予
備電源３０が設けられ、予備電源３０には電源トランス
２０の２次出力をダイオードブリッジ３２で整流した直
流電圧が抵抗ＲＯを介して供給され、商用電源正常時に
あっては予備電源３０を充電状態としている。A backup power source 30 using a battery e is provided for such a commercial power source side, and a DC voltage obtained by rectifying the secondary output of the power transformer 20 with a diode bridge 32 is supplied to the backup power source 30 via a resistor RO. When the commercial power supply is normal, the standby power supply 30 is in a charging state.
予備電源３０は２４ボルトの直流電圧を発生し、電源切
替回路２６に出力している。電源切替回路２６は商用電
源の遮断を検出して、予備電源３０に切替える機能を有
する。The backup power supply 30 generates a 24 volt DC voltage and outputs it to the power supply switching circuit 26 . The power supply switching circuit 26 has a function of detecting interruption of the commercial power supply and switching to the backup power supply 30.
３４は電源断検出回路であり、予備電源３０の出力電圧
を入力して商用電源及び予備電源からの出力電圧を監視
し、ツェナダイオードＺＤで定まる所定の閾値電圧ｖ
ｔｈ、例えばＶｌｈ＝１７ボルト以下に低下したことを
検出して電源断検出信号をＣＰＵｌ０に出力する。即ち
、電源断検出回路３４は抵抗Ｒ１，Ｒ２，Ｒ３、コンデ
ンサＣ３、トランジスタ３６及びツェナダイオードＺＤ
を備えた電圧検出用のスイッチングコンパレータで構成
される。34 is a power failure detection circuit which inputs the output voltage of the backup power supply 30, monitors the output voltage from the commercial power supply and the backup power supply, and detects a predetermined threshold voltage v determined by the Zener diode ZD.
It detects that th has decreased to, for example, Vlh=17 volts or less, and outputs a power-off detection signal to CPU10. That is, the power failure detection circuit 34 includes resistors R1, R2, R3, capacitor C3, transistor 36, and Zener diode ZD.
It consists of a switching comparator for voltage detection.
ＣＰＵｌ０には通常の受信機制御処理を行なう機能に加
え、電源検出回路３４より検出信号を受けたときに、そ
の時の受信機処理データをＥ２ＦＲＯＭ１８に書込んだ
後に制御処理を中止する退避制御手段としての機能と、
電源投入時にＥ２ＦＲＯＭ１８の格納データに基づいて
受信機状態を初期設定する初期設定手段としての制御機
能を有する。In addition to the function of performing normal receiver control processing, the CPU10 also functions as a save control means that, when receiving a detection signal from the power supply detection circuit 34, writes the receiver processing data at that time to the E2FROM 18 and then cancels the control processing. and the functions of
It has a control function as an initial setting means that initializes the receiver state based on the data stored in the E2FROM 18 when the power is turned on.
次に第２図の動作フロー図を参照して商用電源及び予備
電源が断たれた時の制御処理を説明する。Next, the control processing when the commercial power source and standby power source are cut off will be explained with reference to the operational flowchart of FIG. 2.
今、商用電源ＡＣ１００ボルトを切り離すと同時に、予
備電源３０を交換等のために取り外したとすると、予備
電源３０からの電源電圧が断たれる。ここでは、例えば
第３図の特性Ａに示すように電源ダウンを生じたｔｏか
ら電源電圧が低下する。Now, if the commercial power source AC 100 volts is disconnected and at the same time the backup power source 30 is removed for replacement or the like, the power supply voltage from the backup power source 30 is cut off. Here, for example, as shown in characteristic A in FIG. 3, the power supply voltage decreases from to when the power supply shuts down.
商用電源及び予備電源が断たれた時の電源電圧の低下は
電源断検出回路３４で監視されており、予備電源３０の
出力電圧が電源断検出回路３４に設定された閾値電圧Ｖ
ｌｈ＝１７ボルト以下となると、ツェナダイオードＺＤ
が非導通となり、トランジスタがそれまでのオンからオ
フとなることでＣＰＵＩ Ｏに対し電源断検出信号が出
力される。The drop in power supply voltage when the commercial power source and standby power supply are cut off is monitored by the power cutoff detection circuit 34, and the output voltage of the standby power supply 30 is set to the threshold voltage V set in the power cutoff detection circuit 34.
When lh=17 volts or less, Zener diode ZD
becomes non-conductive, and the transistor turns off from on, so that a power-off detection signal is output to the CPU IO.
即ち、ＣＰＵｌ０は第３図の時刻ｔ１で電源断検出信号
を受けると第２図のステップＳ１に示すように１７ボル
ト以下となったことを判別し、ステップＳ２に進み、そ
の時の受信機処理データ、例えば現在持っている操作部
１６のスイッチ操作に基づくスイッチデータをＥ２ＰＲ
ＯＭ１８に書込む。That is, when CPUl0 receives the power-off detection signal at time t1 in FIG. 3, it determines that the voltage is 17 volts or less as shown in step S1 in FIG. For example, the switch data based on the switch operation of the operation unit 16 that is currently held is E2PR.
Write to OM18.
このＥ２ ＰＲＯＭ１８に対するスイッチデータ等の受
信機処理データの書込みが終了するとステップＳ３に進
み、プログラム中止処理を行なって一連の処理を終了す
る。ここでプログラムの中止処理を行なうことによって
電源が完全に無（なるまでにＣＰＵが誤動作することを
防止できる。When the writing of receiver processing data such as switch data to the E2 PROM 18 is completed, the process proceeds to step S3, where a program abort process is performed and the series of processes ends. By performing program abort processing here, it is possible to prevent the CPU from malfunctioning until the power supply is completely turned off.
ここで、第３図の特性Ｂに示すように、時刻ｔ１で電源
断が検出されてから、コンデンサＣ１゜Ｃ２により５ボ
ルトの定電圧出力を維持できる時間が時刻ｔ２までの５
Ｑｍｓであったとすると、時刻ｔ２を過ぎるとＣＰＵｌ
０に対する電源電圧が低下をはじめ、時刻ｔ３でＣＰＵ
ｌ０が正常に動作するための限界電圧、例えば４．８ボ
ルト以下となる。Here, as shown in characteristic B in Fig. 3, the time period during which a constant voltage output of 5 volts can be maintained by the capacitors C1 and C2 after the power failure is detected at time t1 is 5 volts until time t2.
Qms, after time t2 the CPU
The power supply voltage with respect to 0 begins to decrease, and at time t3 the CPU
The limit voltage for normal operation of l0 is, for example, 4.8 volts or less.
従って、第２図のステップ８２．８３に示す処理データ
のＥ２ＦＲＯＭ１８への書込み及びプログラム中止処理
は、時刻ｔ３以前に終了している必要があり、安全性を
考慮して例えば電源断検出の時刻ｔ１から一定電圧５ボ
ルトを維持できる時刻ｔ２までの例えば５Ｑｍｓ内に終
了させる必要がある。Therefore, the writing of processing data to the E2FROM 18 and the program abort processing shown in steps 82 and 83 in FIG. 2 must be completed before time t3. It is necessary to complete the process within, for example, 5 Qms from 1 to time t2 at which a constant voltage of 5 volts can be maintained.
このため、全ての受信機処理データをＥ２ＦＲＯＭ１８
に書込むことが望ましいが、Ｅ２ＦＲＯＭ１８に対する
書込み速度と時刻ｔ１〜ｔ２で定まる書込み許容時間と
を考慮し、最小限であっても操作部１６によるスイッチ
の設定状態をＥ２ＦＲＯＭ１８に書込むことが望ましい
。勿論、余裕があればスイッチ設定状態以外の処理デー
タについてもＥ２ＦＲＯＭ１８に書込むことができる。Therefore, all receiver processing data is stored in the E2FROM18.
However, in consideration of the write speed to the E2FROM 18 and the allowable write time determined by times t1 to t2, it is desirable to write the setting state of the switch by the operation unit 16 to the E2FROM 18, even if it is the minimum. Of course, processing data other than switch setting states can also be written to the E2FROM 18 if there is room.
尚、上記実施例にあっては予備電源３０の出力電圧を電
源断検出回路３４で監視していたが、電源切替回路２６
の出力電圧を監視するようにしてもよい。In the above embodiment, the output voltage of the backup power supply 30 was monitored by the power failure detection circuit 34, but the power supply switching circuit 26
The output voltage may be monitored.
［発明の効果］
以上説明してきたように本発明によれば、商用電源及び
予備電源の両方がダウンしても、その時のスイッチ操作
等により設定されている受信機状態の処理データをＥ２
ＦＲＯＭ等の不揮発性メモリに書込んだ後に処理を中止
することとなり、電源復旧時に不揮発性メモリに対した
データに基づく初期設定を行なうことで、電源ダウンが
起きてもダウン前の受信機状態に自動的に回復でき、再
度のスイッチ操作による受信機状態の設定を不要にでき
る。[Effects of the Invention] As explained above, according to the present invention, even if both the commercial power supply and the standby power supply go down, the processing data of the receiver state set by the switch operation at that time etc. is transferred to E2.
Processing is canceled after writing to non-volatile memory such as FROM, and by performing initial settings based on the data in the non-volatile memory when power is restored, even if a power failure occurs, the receiver state can be returned to the state before the power failure. Recovery is possible automatically, making it unnecessary to set the receiver status by operating a switch again.
第１図は本発明の一実施例を示した実施例構成図；第２
図は本発明による電源断検出時の退避処理を示した動作
フロー図；
第３図は電源ダウン時の電源電圧の時間変化説明図であ
る。
１０：ＣＰＵ
１２：火災受信部
１４：表示部
１６：操作部
１８ ： Ｅ’ ＦＲＯＭ
２０：電源トランス
２２．３２：ダイオードブリッジ
２４：定電圧回路
２６：電源切替回路
２９：ＣＰＵ用定電圧回路
３０；予備電源
３４：電源断検出回路
（不揮発性メモリ）Fig. 1 is an embodiment configuration diagram showing one embodiment of the present invention; Fig. 2
The figure is an operational flowchart showing the saving process when a power outage is detected according to the present invention; FIG. 10: CPU 12: Fire receiving section 14: Display section 16: Operation section 18: E' FROM 20: Power transformer 22.32: Diode bridge 24: Constant voltage circuit 26: Power supply switching circuit 29: Constant voltage circuit for CPU 30; Backup power supply 34: Power failure detection circuit (nonvolatile memory)
Claims (1)
路部と、該制御回路部で処理される各種のデータを格納
可能な不揮発性メモリと、前記制御回路部へ電源を供給
すると共に電源入力が断たれても所定時間は出力電源電
圧を維持可能な定電圧回路とを備えた警報受信機に於い
て、 商用電源及び予備電源からの出力電圧を監視し、該出力
電圧の所定電圧以下への低下を検出する電源断検出手段
と； 該電源断検出手段からの検出信号を受けた時に、その時
の受信機処理データを前記不揮発性メモリに書込む退避
制御手段と； 電源投入時に前記不揮発性メモリの格納データに基づい
て受信機状態を初期設定する初期設定手段と； を設けたことを特徴とする警報受信機。[Claims] 1. A control circuit section including a CPU that executes control processing of the receiver, a nonvolatile memory capable of storing various data processed by the control circuit section, and a control circuit section that includes a CPU that executes control processing of the receiver; An alarm receiver equipped with a constant voltage circuit that can supply power and maintain the output power supply voltage for a predetermined time even if the power input is cut off, monitors the output voltage from the commercial power supply and standby power supply, and detects the power-off detection means for detecting a drop in the output voltage below a predetermined voltage; save control means for writing the receiver processing data at that time into the nonvolatile memory when receiving a detection signal from the power-off detection means; An alarm receiver comprising: initial setting means for initializing the receiver state based on data stored in the non-volatile memory when power is turned on; and;
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19599589A JPH0359800A (en) | 1989-07-28 | 1989-07-28 | Alarm receiver |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19599589A JPH0359800A (en) | 1989-07-28 | 1989-07-28 | Alarm receiver |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0359800A true JPH0359800A (en) | 1991-03-14 |
Family
ID=16350473
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP19599589A Pending JPH0359800A (en) | 1989-07-28 | 1989-07-28 | Alarm receiver |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0359800A (en) |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5258833A (en) * | 1975-11-08 | 1977-05-14 | Mitsubishi Electric Corp | Non-interrupting power supply device |
| JPS57130130A (en) * | 1981-02-05 | 1982-08-12 | Nissan Motor Co Ltd | Power supply and stop delay circuit for microcomputer |
| JPS60131038A (en) * | 1983-12-16 | 1985-07-12 | 日本電信電話株式会社 | Power supply control system |
| JPS63155213A (en) * | 1986-12-18 | 1988-06-28 | Fujitsu Ltd | Power source control system for semiconductor disk device |
| JPS63217455A (en) * | 1987-03-05 | 1988-09-09 | Yokogawa Electric Corp | Ram back-up system |
-
1989
- 1989-07-28 JP JP19599589A patent/JPH0359800A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5258833A (en) * | 1975-11-08 | 1977-05-14 | Mitsubishi Electric Corp | Non-interrupting power supply device |
| JPS57130130A (en) * | 1981-02-05 | 1982-08-12 | Nissan Motor Co Ltd | Power supply and stop delay circuit for microcomputer |
| JPS60131038A (en) * | 1983-12-16 | 1985-07-12 | 日本電信電話株式会社 | Power supply control system |
| JPS63155213A (en) * | 1986-12-18 | 1988-06-28 | Fujitsu Ltd | Power source control system for semiconductor disk device |
| JPS63217455A (en) * | 1987-03-05 | 1988-09-09 | Yokogawa Electric Corp | Ram back-up system |
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