JPH0350405B2 - - Google Patents

Info

Publication number
JPH0350405B2
JPH0350405B2 JP61005643A JP564386A JPH0350405B2 JP H0350405 B2 JPH0350405 B2 JP H0350405B2 JP 61005643 A JP61005643 A JP 61005643A JP 564386 A JP564386 A JP 564386A JP H0350405 B2 JPH0350405 B2 JP H0350405B2
Authority
JP
Japan
Prior art keywords
copper
plating
circuit
paste
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP61005643A
Other languages
Japanese (ja)
Other versions
JPS62163302A (en
Inventor
Sandai Iwasa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Asahi Chemical Laboratory Co Ltd
Original Assignee
Asahi Chemical Laboratory Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Asahi Chemical Laboratory Co Ltd filed Critical Asahi Chemical Laboratory Co Ltd
Priority to JP61005643A priority Critical patent/JPS62163302A/en
Priority to US06/940,733 priority patent/US4724040A/en
Priority to NL8700053A priority patent/NL8700053A/en
Priority to FR878700273A priority patent/FR2593015B1/en
Priority to KR1019870000191A priority patent/KR900003158B1/en
Priority to GB8700716A priority patent/GB2186433B/en
Priority to DE19873700912 priority patent/DE3700912A1/en
Publication of JPS62163302A publication Critical patent/JPS62163302A/en
Publication of JPH0350405B2 publication Critical patent/JPH0350405B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
    • H05K1/162—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed capacitors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4664—Adding a circuit layer by thick film methods, e.g. printing techniques or by other techniques for making conductive patterns by using pastes, inks or powders
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/09—Use of materials for the conductive, e.g. metallic pattern
    • H05K1/092—Dispersed materials, e.g. conductive pastes or inks
    • H05K1/095—Dispersed materials, e.g. conductive pastes or inks for polymer thick films, i.e. having a permanent organic polymeric binder
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
    • H05K1/167—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed resistors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/02—Fillers; Particles; Fibers; Reinforcement materials
    • H05K2201/0203—Fillers and particles
    • H05K2201/0206—Materials
    • H05K2201/0209—Inorganic, non-metallic particles
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0335—Layered conductors or foils
    • H05K2201/0347—Overplating, e.g. for reinforcing conductors or bumps; Plating over filled vias
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09763—Printed component having superposed conductors, but integrated in one circuit layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4685—Manufacturing of cross-over conductors

Description

【発明の詳細な説明】 技術分野 本発明は、基板に抵抗回路を形成する方法に係
り、特に新規開発された金属めつき性の良好な銅
導電ペーストを有用に利用し、基板の片面に少な
くとも２層の互いに電気的に絶縁されまた部分的
に接続された導電回路を形成することができ、し
かも第２層導電回路に印刷塗布の可能な抵抗ペー
ストを用いて半田付けの不要な超薄型の抵抗回路
を形成する方法に関する。DETAILED DESCRIPTION OF THE INVENTION Technical Field The present invention relates to a method of forming a resistive circuit on a substrate, and in particular, utilizes a newly developed copper conductive paste with good metal plating properties to form a resistive circuit on one side of the substrate. It is possible to form a conductive circuit in which two layers are electrically insulated from each other and partially connected, and the second layer conductive circuit uses a printable resistive paste, making it ultra-thin and does not require soldering. The present invention relates to a method of forming a resistive circuit.

従来技術 従来、銅貼積層基板に抵抗回路を形成するに
は、リード線付の抵抗器又はチツプ型の抵抗器を
銅箔回路に半田付けする方法が採用されていた。
このため完成品としての基板の厚さが大きくなる
ばかりでなく、抵抗器の取付けや半田付け作業に
多くの工数がかかり、また抵抗器自体のコストも
かなり高いため、抵抗回路を含むプリント配線基
板が高価となる欠点があつた。またこのような従
来例によると、プリント配線基板の実装密度が低
く、軽量化、製造工程の省力化も極めて困難であ
り、半田付け作業が不可欠のため、誤配線や抵抗
器の挿入ミスが生ずるおそれがあつた。Prior Art Conventionally, in order to form a resistance circuit on a copper-clad laminated board, a method has been adopted in which a resistor with a lead wire or a chip-type resistor is soldered to a copper foil circuit.
This not only increases the thickness of the finished board, but also requires a lot of man-hours to install and solder the resistor, and the cost of the resistor itself is quite high. The disadvantage was that it was expensive. Furthermore, according to such conventional examples, the mounting density of the printed wiring board is low, making it extremely difficult to reduce weight and save labor in the manufacturing process, and since soldering work is essential, incorrect wiring and resistor insertion errors occur. I was afraid.

また従来、銅箔を用いたプリント基板において
は、そこに形成される導電回路がある程度以上複
雑となると、該導電回路のある部分と他の部分と
を電気的に接続する必要性が生ずるが、従来技術
ではプリント基板の片面に２層以上の導電回路を
工業的に形成することはできなかつたので、この
ような必要性がある場合には、プリント基板の両
面を用い、該両面に形成された銅箔エツチング回
路をスルホールを用いて電気的に接続したいわゆ
る両面スルホール基板を用いる以外に方法がなか
つた。 Conventionally, in printed circuit boards using copper foil, when the conductive circuit formed there becomes complicated beyond a certain level, it becomes necessary to electrically connect one part of the conductive circuit to another part. With conventional technology, it has not been possible to industrially form two or more layers of conductive circuits on one side of a printed circuit board, so if there is such a need, it is possible to use both sides of the printed circuit board and to form them on both sides. There was no other option than to use a so-called double-sided through-hole board in which a copper foil etched circuit was electrically connected using through-holes.

しかし、この両面スルホール基板によると、基
板の両面に銅箔を貼り、かつエツチング加工を施
し、なおかつNC装置等を用いて多数の穴あけ加
工を行わなければならないため、材料費、製造費
が多くかかり、生産性が悪いという欠点があつ
た。 However, with this double-sided through-hole board, copper foil must be pasted on both sides of the board, etching processing must be performed, and a large number of holes must be drilled using NC equipment, etc., resulting in high material and manufacturing costs. However, it had the disadvantage of poor productivity.

そこで上記した従来方法の欠点を改良するもの
として、プリント基板の片面に２層以上の導電回
路を工業的に形成する技術の確立が望まれるが、
そのためには導電性及び金属めつき性、特に銅め
つき性が良好な安価な銅導電ペーストの開発が必
要とされた。しかしながら、この銅導電ペースト
によると、ペーストを硬化させるための加熱が必
要となるが、銅はその特性から銀等の貴金属とは
逆に極めて酸化し易いため、この加熱によつてペ
ースト中の銅粉末が酸化して電気抵抗が大きくな
ると共に半田付性が悪化するという欠点があり、
実用化が困難とされていた。また加熱硬化された
銅導電ペーストに金属めつきを施すには、通常そ
の表面をキヤタリスト（触媒）を用いて活性化
し、バインダとしての樹脂層から銅粉の粒子を露
出させ、いわゆるめつきの核を作る工程が必要と
され、多くの工数がかかる欠点があつた。 Therefore, in order to improve the drawbacks of the conventional methods described above, it is desired to establish a technology for industrially forming two or more layers of conductive circuits on one side of a printed circuit board.
To this end, it was necessary to develop an inexpensive copper conductive paste with good conductivity and metal plating properties, especially copper plating properties. However, this copper conductive paste requires heating to harden the paste, but due to its characteristics, copper is extremely easily oxidized, contrary to noble metals such as silver, so this heating The disadvantage is that the powder oxidizes, increasing electrical resistance and deteriorating solderability.
It was considered difficult to put it into practical use. In addition, in order to apply metal plating to heat-cured copper conductive paste, the surface is usually activated using a catalyst to expose the copper powder particles from the binder resin layer and remove the so-called plating core. The drawback was that it required a manufacturing process and took a lot of man-hours.

なお、実公昭55−42460には、片面に２層以上
の導電回路を形成するため、絶縁被膜層に高絶縁
性レジストポリブタジエンを用い、銅被膜で被覆
する下地回路に例えばフエノール樹脂20％、銅粉
63％及び溶剤17％からなる接着剤ペーストを用
い、該接着剤ペーストに無電解めつき法で20μｍ
まで肉付けを行い、銅被膜を被着させる考案が開
示されてはいるが、上記のような理由により、該
考案が工業的に実施された例はないのが現状であ
る。 In addition, in order to form two or more layers of conductive circuits on one side, in Utility Model Publication No. 55-42460, highly insulating resist polybutadiene is used for the insulating coating layer, and for example, 20% phenol resin and copper are used for the base circuit covered with the copper coating. powder
Using an adhesive paste consisting of 63% and 17% solvent, the adhesive paste was coated with a thickness of 20 μm by electroless plating.
Although an idea has been disclosed in which the copper coating is applied by adding flesh to the surface, for the reasons mentioned above, there is currently no example of this idea being implemented industrially.

また特公昭57−31320には、セラミツク多層配
線板の製造方法が開示されているが、該従来例
は、基板がセラミツクに限定されている上、金仕
上げの表層導体層ができるようにしたセラミツク
多層配線板を対象としており、セラミツク基板に
対してはるかに安価で処理の容易なポリマ基板を
対象としたものではなく、「安価に製造できる」
とは記載されているものの、それはセラミツク基
板という範疇においてであり、ポリマ基板に比べ
ればはるかに高価であつて、到底民生用の機器に
は使用できないという欠点があつた。またセラミ
ツク基板では、高温焼成が行われるので、抵抗ペ
ーストを用いた場合には、該抵抗ペーストがこの
焼成温度に耐えられないという欠点があつた。従
つて該従来例によつては、ポリマ基板に抵抗回路
を抵抗ペーストを用いて形成することは不可能で
あつた。 In addition, Japanese Patent Publication No. 57-31320 discloses a method for manufacturing a ceramic multilayer wiring board, but in this conventional example, the substrate is limited to ceramic, and the surface conductor layer with a gold finish is formed using ceramic. It is intended for multilayer wiring boards, and not for polymer substrates, which are much cheaper and easier to process than ceramic substrates.
However, this was in the category of ceramic substrates, which were much more expensive than polymer substrates, and had the disadvantage that they could not be used in consumer devices. Furthermore, since ceramic substrates are fired at high temperatures, when a resistive paste is used, there is a drawback that the resistive paste cannot withstand this firing temperature. Therefore, in the conventional example, it was impossible to form a resistance circuit on a polymer substrate using a resistance paste.

本願出願人においては、上記のような欠点をす
べて除去し得る銅導電ペーストを開発すべく、多
年にわたり研究を行つて来たが、遂にこれを完成
し、その工業化に成功したものである。それは、
銅粉末と合成樹脂に加えて特殊添加剤として例え
ばアントラセンを微量添加したもので、(株)アサヒ
化学研究所製銅導電ペーストACP−020、ACP−
030及びACP−007Pとして実用化の段階に至らし
めたものである。ACP−020なる銅導電ペースト
は、銅粉末80重量％、合成樹脂20重量％を主成分
とし、導電性の極めて良好なものであるが、半田
付性がやや劣るものである。ACP−030なる銅導
電ペーストは、銅粉末85重量％、合成樹脂15重量
％を主成分とし、導電性はACP−020より若干劣
るが半田付性が良好なものである。またACP−
007Pなる銅導電ペーストは、このACP−030を改
良し、キヤタリストなしで金属めつき、例えば銅
の化学めつきをその硬化塗膜の上に施すことがで
きるようにしたもので、金属めつき性の非常に優
れたものである。 The applicant of the present application has been conducting research for many years in order to develop a copper conductive paste that can eliminate all of the above-mentioned drawbacks, and has finally completed this and succeeded in commercializing it. it is,
Copper conductive paste ACP-020, ACP- manufactured by Asahi Chemical Laboratory Co., Ltd. is made by adding a small amount of special additives such as anthracene in addition to copper powder and synthetic resin.
It has reached the stage of practical use as 030 and ACP-007P. The copper conductive paste called ACP-020 mainly consists of 80% by weight of copper powder and 20% by weight of synthetic resin, and has extremely good conductivity, but has somewhat poor solderability. The copper conductive paste called ACP-030 mainly contains 85% by weight of copper powder and 15% by weight of synthetic resin, and although its conductivity is slightly inferior to that of ACP-020, it has good solderability. Also ACP−
Copper conductive paste 007P is an improved version of ACP-030 that allows metal plating, such as copper chemical plating, to be applied on the cured coating without the need for catalysts, and has excellent metal plating properties. It is very good.

目 的 本発明は、上記した従来例の欠点を除くと共
に、上記新開発された金属めつき性の良好な銅導
電ペーストを有効に用いるためになされたもので
あつて、その目的とするところは、銅貼積層ポリ
マ基板に形成された銅箔からなる第１層導電回路
のうち第２層導電回路と電気的に接続する必要が
ある部分にのみ上記新開発された金属めつき性の
良好な銅導電ペーストを塗布して加熱硬化させ、
その上に銅の化学めつき等の金属めつきを施し、
該銅導電ペーストの導電性を銅箔と同程度に向上
させて、第２層導電回路となし、銅箔を用いたプ
リント基板等のポリマ基板の片面に電気的に接続
された少なくとも２層の導電回路を形成すること
であり、またこれによつて従来の両面スルホール
基板で達成し得たと同等の回路密度のものであれ
ば片面にすべての回路を形成できるようにし、銅
箔の貼付及びエツチング加工の材料及び工数を1/
２に削減し、また高価なNC装置によるスルホー
ルの穴あけ加工を不要とし、プリント基板におけ
る導電回路の形成工程を飛躍的に簡略化し、また
完成品としてのプリント基板のコストを従来品の
約1/2に低減させることである。また他の目的は、
上記のような第２層導電回路の電気的に接続され
ていない両部分に導電性の良好な端子用導電ペー
ストを塗布して加熱硬化させて一対の端子部を形
成し、該一対の端子部に所定の電気抵抗値を有す
る抵抗ペーストを塗布して加熱硬化させて第２層
導電回路に抵抗回路を形成することにより、従来
の抵抗器、その基板への挿入又は接着作業及び半
田付け作業を不要とすることであり、またこれに
よつて超薄型の抵抗回路を提供し、しかもプリン
ト配線基板の実装密度の向上、軽量化及び製造工
程の省力化を図り、また誤配線や抵抗器の挿入ミ
スのおそれをなくし、プリント配線基板の抵抗回
路の信頼性を向上させ、コストの低減を図ること
である。Purpose The present invention has been made to eliminate the drawbacks of the conventional examples described above and to effectively use the newly developed copper conductive paste with good metal plating properties. Of the first layer conductive circuit made of copper foil formed on the copper laminated polymer substrate, the newly developed metal plate with good metal plating properties is applied only to the part that needs to be electrically connected to the second layer conductive circuit. Apply copper conductive paste and heat harden it.
On top of that, metal plating such as copper chemical plating is applied,
The conductivity of the copper conductive paste is improved to the same level as copper foil to form a second layer conductive circuit, and at least two layers are electrically connected to one side of a polymer substrate such as a printed circuit board using copper foil. The purpose of this is to form conductive circuits and thereby allow all circuitry to be formed on one side with circuit densities comparable to those achieved with conventional double-sided through-hole boards, making it easier to apply and etch copper foil. Processing materials and man-hours reduced by 1/
It also eliminates the need for through-hole drilling using expensive NC equipment, dramatically simplifies the process of forming conductive circuits on printed circuit boards, and reduces the cost of finished printed circuit boards to about 1/1 of that of conventional products. 2. In addition, other purposes are
A conductive paste for terminals with good conductivity is applied to both parts of the second layer conductive circuit which are not electrically connected as described above, and is cured by heating to form a pair of terminal parts. By applying a resistor paste having a predetermined electrical resistance value to the resistor and curing it by heating to form a resistor circuit on the second layer conductive circuit, it is possible to eliminate the conventional resistor, its insertion into the board, the adhesion work, and the soldering work. By doing so, we can provide an ultra-thin resistor circuit, improve the mounting density of printed wiring boards, reduce weight, and save labor in the manufacturing process, and also eliminate the need for incorrect wiring and resistor failure. The purpose is to eliminate the risk of insertion errors, improve the reliability of the resistance circuit of the printed wiring board, and reduce costs.

構 成 要するに本発明は、銅貼積層ポリマ基板にエツ
チング加工を施して銅箔により複数の第１層導電
回路を形成し、該第１層導電回路と第２層導電回
路とを電気的に接続する必要がある部分を残して
前記ポリマ基板に耐めつきレジストを塗布し、前
記複数の第１層導電回路にその一部が互いに電気
的に接続しないようにして金属めつき性の良好な
銅導電ペーストを塗布して加熱硬化させ、この状
態で前記ポリマ基板を清浄にして後、これを金属
めつき液に浸し、前記銅導電ペーストの表面に金
属めつきを施し、該金属めつき層と該銅導電ペー
ストとにより前記第２層導電回路を形成し、該第
２層導電回路の電気的に接続されていない両部分
に導電性の良好な端子用導電ペーストを塗布して
加熱硬化させて一対の端子部を形成し、該一対の
端子部に所定の電気抵抗値を有する抵抗ペースト
を塗布して加熱硬化させ、前記第２層導電回路間
に抵抗回路を形成することを特徴とするものであ
る。Configuration In short, the present invention etches a copper-clad laminated polymer substrate to form a plurality of first layer conductive circuits using copper foil, and electrically connects the first layer conductive circuits and the second layer conductive circuits. A plating-resistant resist is applied to the polymer substrate, leaving only the areas where it is necessary, and the plurality of first-layer conductive circuits are coated with copper with good metal plating properties so that some of them are not electrically connected to each other. A conductive paste is applied and cured by heating, and after cleaning the polymer substrate in this state, it is immersed in a metal plating solution, metal plating is applied to the surface of the copper conductive paste, and the metal plating layer is The second layer conductive circuit is formed with the copper conductive paste, and a terminal conductive paste with good conductivity is applied to both parts of the second layer conductive circuit that are not electrically connected and cured by heating. A resistance circuit is formed between the second layer conductive circuits by forming a pair of terminal parts, applying a resistance paste having a predetermined electrical resistance value to the pair of terminal parts, and heating and curing the paste. It is.

以下本発明を図面に示す実施例に基いて説明す
る。まず第１図に示すように、ポリマ基板１に銅
箔８を貼り付けて銅貼積層ポリマ基板３を形成
し、第２図に示すように、該銅貼積層基板３の表
面のうち第１層導電回路C1（第３図）を形成しな
い部分３ａを残して耐エツチングレジスト７を塗
布して加熱硬化させ、これにエツチング加工を施
して第３図に示すように複数の第１層導電回路
C1を銅箔８により形成する。そして第１層導電
回路C1と第２層導電回路C2（第６図）とを電気的
に接続する必要がある部分を残して銅貼積層ポリ
マ基板３に耐めつきレジスト６（例えば(株)アサヒ
化学研究所製耐めつきレジストCR−2001）を塗
布し、例えば150℃で30分間加熱して硬化させる。 The present invention will be explained below based on embodiments shown in the drawings. First, as shown in FIG. 1, a copper foil 8 is pasted on a polymer substrate 1 to form a copper laminated polymer substrate 3, and as shown in FIG. An etching-resistant resist 7 is applied, leaving the portion 3a where the layer conductive circuit C1 (Fig. 3) is not formed, and hardened by heating, and then etched to form a plurality of first-layer conductive layers as shown in Fig. 3. circuit
C 1 is formed of copper foil 8. Then, a plating resist 6 (for example , ( A plating resist CR-2001 manufactured by Asahi Kagaku Kenkyusho Co., Ltd.) is applied and cured by heating, for example, at 150° C. for 30 minutes.

そして複数の第１層導電回路C1にその一部が
互いに電気的に接続しないようにしてめつき性の
良好な銅導電ペースト９（例えば(株)アサヒ化学研
究所製銅導電ペーストACP−007P）をスクリー
ン印刷により塗布して、温度150℃にて30乃至60
分間加熱して硬化させる。 Then, a copper conductive paste 9 with good plating properties is applied to the plurality of first layer conductive circuits C 1 so that some of them are not electrically connected to each other (for example, copper conductive paste ACP-007P manufactured by Asahi Chemical Research Institute Co., Ltd.). ) was applied by screen printing and applied at a temperature of 150℃ for 30 to 60 minutes.
Heat for minutes to harden.

そしてこの状態で銅貼積層ポリマ基板３にめつ
き前処理を施す。このめつき前処理は、例えばカ
性ソーダ（NaOH）の４乃至５重量％の水溶液
で数分間洗浄し、塩酸（HCl）５乃至10重量％の
水溶液で数分間表面処理を行う。この表面処理に
よつて銅導電ペースト９の表面にはそのバインダ
の間から銅粉の粒子が多数表面に現われ、銅めつ
きを行うための核が容易に形成される。従つて通
常の無電解銅めつきにおけるようなキヤタリスト
処理は不要である。 In this state, the copper-clad laminated polymer substrate 3 is subjected to plating pretreatment. This pre-plating treatment includes, for example, cleaning for several minutes with a 4 to 5% by weight aqueous solution of caustic soda (NaOH), and surface treatment for several minutes with a 5 to 10% by weight aqueous solution of hydrochloric acid (HCl). By this surface treatment, many particles of copper powder appear between the binders on the surface of the copper conductive paste 9, and nuclei for copper plating are easily formed. Therefore, catalyst treatment as in ordinary electroless copper plating is not necessary.

次に、銅貼積層ポリマ基板３を化学銅めつき浴
に浸して銅導電ペースト９の表面に、第６図に示
すように、化学銅めつきを施し、この結果銅めつ
き層１０が形成され、該銅めつき層によつて第２
層導電回路C2が形成され、該第２層導電回路C2
は第１層導電回路C1と電気的に接続される。こ
の化学銅めつき浴は、PH11乃至13、温度65乃至75
℃で銅めつき層１０の厚さは5μｍ以上とする。
この場合のめつき速度は毎時1.5乃至3μｍである。 Next, the copper laminated polymer substrate 3 is immersed in a chemical copper plating bath to apply chemical copper plating to the surface of the copper conductive paste 9, as shown in FIG. 6, and as a result, a copper plating layer 10 is formed. and the second layer is formed by the copper plating layer.
A layer conductive circuit C 2 is formed, the second layer conductive circuit C 2
is electrically connected to the first layer conductive circuit C1 . This chemical copper plating bath has a pH of 11 to 13 and a temperature of 65 to 75.
℃, the thickness of the copper plating layer 10 is 5 μm or more.
The plating speed in this case is 1.5 to 3 μm per hour.

このようにして銅めつき層１０と銅導電ペース
ト９とにより第２層導電回路C2を銅貼積層ポリ
マ基板３の片面に形成することができ、次いで第
７図に示すように、第２層導電回路C2の電気的
に接続されていない両部分に導電性の良好な端子
用導電ペースト１９（例えば銀ペースト）を塗布
して加熱硬化させて一対の端子部２０を形成し、
該一対の端子部に第８図に示すように、所定の電
気抵抗値を有する抵抗ペースト１４を塗布して加
熱硬化させ、第２層導電回路C2間に抵抗回路１
３を形成する。 In this way, a second layer conductive circuit C2 can be formed on one side of the copper-plated laminated polymer substrate 3 using the copper plating layer 10 and the copper conductive paste 9, and then, as shown in FIG. A terminal conductive paste 19 (for example, silver paste) having good conductivity is applied to both parts of the layered conductive circuit C 2 that are not electrically connected and hardened by heating to form a pair of terminal parts 20.
As shown in FIG. 8, a resistor paste 14 having a predetermined electrical resistance value is applied to the pair of terminal parts and cured by heating, and a resistor circuit 1 is inserted between the second layer conductive circuit C2.
form 3.

そして第９図に示すように、銅貼積層ポリマ基
板３の表面にオーバコート１１（例えば(株)アサヒ
化学研究所製耐めつきレジストCR−2001）を塗
布して加熱硬化させ、プリント配線基板１２が完
成する。 Then, as shown in FIG. 9, an overcoat 11 (for example, a galvanizing resist CR-2001 manufactured by Asahi Chemical Laboratory Co., Ltd.) is coated on the surface of the copper-laminated polymer board 3 and cured by heating to form a printed wiring board. 12 is completed.

なお、上記実施例においては、銅導電ペースト
９に施す金属めつきは、銅めつきとして説明した
がこれは銅めつきに限定されるものではなく、銀
めつき、金めつき等の貴金属めつきでもよいこと
は明らかである。また上記実施例においては銅貼
積層ポリマ基板３の片面に２層の導電回路C1，
C2を形成するように説明したが、これはオーバ
コート１１の上に上記のような工程を反復するこ
とによつて３層以上の導電回路を形成することが
できることは明らかである。 In the above embodiment, the metal plating applied to the copper conductive paste 9 was described as copper plating, but this is not limited to copper plating, and noble metal plating such as silver plating and gold plating can be used. It is clear that it is possible to do so. In addition, in the above embodiment, two layers of conductive circuits C 1 ,
Although the explanation has been made to form C 2 , it is clear that by repeating the above steps on the overcoat 11, three or more layers of conductive circuits can be formed.

次に、本発明に用いる上記銅導電ペースト、抵
抗ペースト、及び耐めつきレジストについて詳細
に説明する。 Next, the copper conductive paste, resistance paste, and plating resist used in the present invention will be explained in detail.

まず銅導電ペーストの一例たる(株)アサヒ化学研
究所製ACP−007Pなる銅めつき性の良好な銅導
電ペーストについて説明する。一般に銅は酸化さ
れ易い金属であり、特に粉末においては表面積が
大きいためより酸化し易い。従つて非酸化性貴金
属粉末を用いる貴金属ペーストと異なり、銅粒子
の酸化膜の除去と再酸化防止とができるペースト
組成物の設計が必要となる。銅化学めつきがし易
くて、しかも基材に対する接着性が高い銅導電ペ
ーストを設計するにはその構成成分である銅粉
末、バインダ、酸化防止用の特殊添加剤（例えば
アントラセン、アントラセンカルボン酸、アント
ラジン、アントラニル酸が有効）、分散剤及び溶
剤等の材料選択と適切な分散混練技術とが重要な
ポイントである。 First, a copper conductive paste with good copper plating properties called ACP-007P manufactured by Asahi Chemical Research Institute, Ltd., which is an example of a copper conductive paste, will be explained. Generally, copper is a metal that is easily oxidized, and in particular, copper is more easily oxidized in powder form because it has a large surface area. Therefore, unlike noble metal pastes that use non-oxidizing noble metal powders, it is necessary to design a paste composition that can remove the oxide film on copper particles and prevent re-oxidation. In order to design a copper conductive paste that is easy to chemically plate with copper and has high adhesion to the base material, the components such as copper powder, binder, and special additives for anti-oxidation (such as anthracene, anthracene carboxylic acid, The important points are the selection of materials such as anthrazine and anthranilic acid), dispersants and solvents, and appropriate dispersion and kneading techniques.

銅粉末はその製法によつて粒子の形状や粒径が
異なり、電解法（電気分解によつて粉末状に銅を
析出させる方法）では樹枝状で純度の高い粉末
が、還元法（酸化物を還元性ガスで還元させて作
る方法）では、海綿状の多孔質な微粒子が提供さ
れる。そして上記した本発明の導電回路を形成す
るためには銅導電ペーストは次のような特性を備
えていなければならない。 Copper powder differs in particle shape and particle size depending on the manufacturing method.The electrolytic method (a method of depositing copper in powder form by electrolysis) produces a dendritic, highly pure powder, while the reduction method (a method of depositing copper in the form of powder through electrolysis) produces a dendritic, highly pure powder. In the method (method of production by reduction with a reducing gas), spongy porous fine particles are provided. In order to form the above-described conductive circuit of the present invention, the copper conductive paste must have the following characteristics.

(1) スクリーン印刷性がよく、フアインパターン
が形成できること。(1) Good screen printability and ability to form fine patterns.

(2) 基板との密着性に優れていること。(2) Excellent adhesion to the substrate.

(3) 化学銅めつきの高温アルカリ浴に耐えるこ
と。(3) To withstand the high temperature alkaline bath of chemical copper plating.

(4) 銅めつきとよく密着すること。(4) Good adhesion to copper plating.

(5) 経時変化による粘度変化が少なく、安定した
印刷性が得られること。(5) Stable printability with little viscosity change over time.

このような要求を満たすため上記銅導電ペース
トは、銅粉末としては、電気分解によつて析出す
る樹枝状粉を多く含み、純度の高い電解銅粉と、
金属酸化物から還元して作つた多孔質海綿状の微
粉末等を使用している。またこれらの銅粉をフレ
ーク状に加工した粉末（粉砕粉）も使用される。 In order to meet such requirements, the copper conductive paste contains high-purity electrolytic copper powder that contains a large amount of dendritic powder precipitated by electrolysis, and
It uses porous spongy fine powder made by reducing metal oxides. Powders obtained by processing these copper powders into flakes (pulverized powders) are also used.

銅粉末のペースト中への含率を高めるために
は、粒径や形状の異なる粒子を、最密充填するよ
うに配合することが必要となる。 In order to increase the content of copper powder in the paste, it is necessary to mix particles with different particle sizes and shapes in a close-packed manner.

次に銅導電ペーストのバインダについて説明す
ると、バインダは、多量の粉末の分散ベヒクルと
して、また基板への強力な接着剤として働く必要
があり、同時に化学銅めつきのアルカリ浴に十分
耐えるものでなければならない。 Next, regarding the binder in the copper conductive paste, the binder must act as a dispersion vehicle for large quantities of powder, as a strong adhesive to the substrate, and at the same time must be sufficiently resistant to the alkaline bath of chemical copper plating. No.

そこでバインダとしては、銅粉末含率が大き
く、銅箔及びガラスエポキシ基板への密着性及び
めつきの析出性が極めて良好で、更にめつき膜の
密着性が極めて良好なエポキシ樹脂を配合したも
のを用いる。 Therefore, we selected a binder containing an epoxy resin that has a high copper powder content, has very good adhesion to copper foil and glass epoxy substrates, and has very good plating precipitation, and also has very good adhesion to the plating film. use

次に上記(株)アサヒ化学研究所製銅導電ペースト
ACP−007Pに析出した銅めつきの特性について
その一例を説明すると、色調、形状は赤褐色かつ
ペースト状であり、粘度は25℃において300乃至
500psであり、銅箔上及び樹脂基板上の接着性は
何れもテープテストに合格するものであり、銅め
つき後めつきと銅導電ペーストとの接着性はテー
プテスト合格であり、半田付性は拡がり率が96％
以上で、引張り強度（３×３mm2）は3.0Kg以上で
ある。 Next, the above-mentioned copper conductive paste made by Asahi Chemical Laboratory Co., Ltd.
An example of the characteristics of copper plating deposited on ACP-007P is that the color and shape are reddish brown and paste-like, and the viscosity is 300 to 300 at 25℃.
500 ps, the adhesion on copper foil and resin board both passed the tape test, and the adhesion between plating after copper plating and copper conductive paste passed the tape test, and the solderability has a spread rate of 96%
With the above, the tensile strength (3×3 mm 2 ) is 3.0 Kg or more.

なお、上記銅導電ペーストの構成成分及び導電
特性等についての詳細は本願出願人の出願である
特願昭55−6609（特開昭56−103260）及び特願昭
60−216041に詳細に説明されているのでその説明
は省略する。 Further, details regarding the constituent components and conductive properties of the above-mentioned copper conductive paste can be found in Japanese Patent Application No. 55-6609 (Japanese Unexamined Patent Publication No. 56-103260) filed by the present applicant.
60-216041, so the explanation will be omitted.

次に本発明に用いる抵抗ペーストについて説明
すると、抵抗ペーストの材料組成には導電材料と
して高純度精製カーボン、グラフアイト等の銅粉
末が用いられ、結合剤としてエポキシ、フエノー
ル、メラミン、アクリル等の熱硬化性樹脂が使用
される。更に抵抗ペーストの粘度調整用として揮
発性の遅い高沸点溶剤を使用する。 Next, to explain the resistance paste used in the present invention, the material composition of the resistance paste includes copper powder such as high-purity purified carbon and graphite as a conductive material, and a heat-resistant material such as epoxy, phenol, melamine, and acrylic as a binder. A curable resin is used. Furthermore, a slow volatile high boiling point solvent is used to adjust the viscosity of the resistance paste.

抵抗ペーストの製造に際しては夫々の成分に対
して数多くの特性が要求される。例えば機能性粉
体の特性としては、粒子が細かく均一なこと、純
度が高く高品質なこと、抵抗値のバラツキが少な
いこと及び粉体と配合樹脂とのなじみがよいこと
である。 When manufacturing a resistive paste, a number of properties are required for each component. For example, the characteristics of functional powder include fine and uniform particles, high purity and high quality, little variation in resistance, and good compatibility between the powder and the blended resin.

次にポリマとしての特性は、粉体との相溶性が
よいこと、常温放置しても膜張りを起こさないこ
と、常温放置しても抵抗値が変動しないこと、常
温で硬化せず加熱により速かに硬化すること、硬
化膜は温度、湿度により体積変化を起こしにくい
こと、若干のフレキシビリテーを略し、基材との
密着性に優れていること、耐熱性、耐湿性に優れ
ていること及びアンダコート、オーバコート剤と
の層間密着性に優れていることである。 Next, the properties of the polymer are that it has good compatibility with powder, does not form a film even when left at room temperature, does not change its resistance value even when left at room temperature, and does not harden at room temperature and is quickly heated when heated. The cured film is hard to change in volume due to temperature and humidity, has some flexibility, has excellent adhesion to the base material, and has excellent heat resistance and moisture resistance. and excellent interlayer adhesion with undercoat and overcoat agents.

次に溶剤特性としては、連続印刷に対しての安
定性に優れていること（版の目詰りや乳剤膜を侵
さないこと）、常温での蒸発速度が遅く水分を吸
着しないこと、常温±10℃前後で粘度が急激に変
化しないこと及び常温又は加熱時での蒸気は刺激
臭や毒性がないことである。 Next, the solvent properties are that it has excellent stability for continuous printing (does not clog the plate or attack the emulsion film), has a slow evaporation rate at room temperature and does not adsorb moisture, and has a temperature of ±10% at room temperature. The viscosity does not change rapidly around ℃, and the steam at room temperature or when heated has no irritating odor or toxicity.

このような諸条件を満たす抵抗ペーストとし
て、例えば(株)アサヒ化学研究所製抵抗ペースト
TU−1Kは、半田付け後の抵抗変化率については
半田付け温度240℃と260℃の２点で0.5％程度の
非常にわずかな変化率であり、実用に際しても信
頼性に優れたものである。またこのTU−1Kなる
抵抗ペーストは、示差熱分析曲線についても、半
田付け温度までに急激な吸熱、発熱反応を示さな
いので、そのための抵抗体の体積変化が極めて小
さいものと推定される。 As a resistance paste that satisfies these conditions, for example, resistance paste manufactured by Asahi Chemical Research Institute Co., Ltd.
The resistance change rate of TU-1K after soldering is very small, about 0.5% at the two soldering temperatures of 240°C and 260°C, and it has excellent reliability even in practical use. . Also, the differential thermal analysis curve of this TU-1K resistor paste shows no rapid endothermic or exothermic reactions up to the soldering temperature, so it is presumed that the volume change of the resistor due to this is extremely small.

次に、耐めつきレジストについて説明すると、
本発明では、(株)アサヒ化学研究所製CR−2001な
る耐めつきレジストを用いるが、この耐めつきレ
ジストは、多層配線基板回路を形成しようとする
とき、第１層導電回路に第２層導電回路を接続し
ては不都合な場合、第１層導電回路の上に耐めつ
きレジストを印刷法により被覆するが、絶縁性が
良好であると同時に、特に耐アルカリ性に優れた
性質が要求される。化学銅めつき浴と同じPH12の
アルカリ浴中、70℃にて４時間以上の酸性を持つ
耐めつきレジストとして開発されたのがこのCR
−2001なる耐めつきレジストである。 Next, I will explain about the resistant resist.
In the present invention, a plating resist called CR-2001 manufactured by Asahi Chemical Research Institute Co., Ltd. is used. If it is inconvenient to connect a layer conductive circuit, a plating-resistant resist is coated on the first layer conductive circuit by a printing method, but it requires good insulation properties and particularly excellent alkali resistance. be done. This CR was developed as a plating resist that can withstand acidity for more than 4 hours at 70℃ in an alkaline bath with a pH of 12, which is the same as a chemical copper plating bath.
-2001 is a hard-wearing resist.

これは銅導電ペーストACP−007Pと同様な、
エポキシ樹脂を主成分とするペーストで、180メ
ツシユのポリエステルスクリーンを用いて印刷
し、150℃にて30分間加熱して硬化させる。耐薬
品性、耐電圧性から15乃至30μｍ程度の厚膜が好
ましい。その主な特長は以下のようである。即
ち、基材に対する密着力が強く、また銅箔に対す
る接着性に優れており、耐アルカリ性（PH12）に
長時間浸しても硬化膜が劣化せず、ハードナは毒
性の弱いアルカリ性であるので使用上安全であ
る。またこの耐めつきレジストの使用方法は、塗
布方法についてはスクリーン印刷により、混合比
率は主剤100ｇに対して硬化剤が10ｇである。ま
た硬化条件は、温度範囲が150乃至200℃、設定時
間が30乃至15分である。 This is similar to copper conductive paste ACP-007P.
A paste whose main component is epoxy resin, printed using a 180-mesh polyester screen, and cured by heating at 150℃ for 30 minutes. A thick film of about 15 to 30 μm is preferable from the viewpoint of chemical resistance and voltage resistance. Its main features are as follows. In other words, it has strong adhesion to the base material and excellent adhesion to copper foil, and the cured film does not deteriorate even if immersed in alkali-resistant (PH12) for a long time. It's safe. The coating method for this anti-plating resist is screen printing, and the mixing ratio is 100 g of the hardening agent to 100 g of the main agent. The curing conditions include a temperature range of 150 to 200°C and a set time of 30 to 15 minutes.

また主な特性としては色調、形状は緑色かつイ
ンク状であり、密着性（クロスカツト）は100/10
０（銅箔面）、表面硬度（エンピツ使用）は8H以
上、耐溶剤性（トリクロルエチレン中）は15秒以
上、半田耐熱性（260℃）は５サイクル以上、表
面絶縁抵抗値は５×1013Ω以上、体積抵抗値は１
×1014Ω−cm、耐電圧（15μｍ）は3.5kV以上、誘
電正接（1MHz）は0.03以下である。 The main characteristics are that the color and shape are green and ink-like, and the adhesion (cross cut) is 100/10.
0 (copper foil surface), surface hardness (using pencil) is 8H or more, solvent resistance (in trichlorethylene) is 15 seconds or more, soldering heat resistance (260℃) is 5 cycles or more, surface insulation resistance is 5 x 10 13 Ω or more, volume resistance value is 1
×10 14 Ω-cm, withstand voltage (15 μm) is 3.5 kV or more, and dielectric loss tangent (1 MHz) is 0.03 or less.

効 果 本発明は、上記のように構成されるものである
から、銅貼積層ポリマ基板に形成された銅箔から
なる第１層導電回路のうち第２層導電回路と電気
的に接続する必要がある部分にのみ上記新開発さ
れた金属めつき性の良好な銅導電ペーストを塗布
して加熱硬化させ、その上に銅の化学めつき等の
金属めつきを施し、該銅導電ペーストの導電性を
銅箔と同程度に向上させて第２層導電回路とな
し、銅箔を用いたプリント基板等の基板の片面に
電気的に接続された少なくとも２層の導電回路を
形成することができ、またこの結果従来の両面ス
ルホール基板で達成し得た同等の回路密度のもの
であれば片面にすべての回路を形成することがで
きる効果があり、銅箔の貼付け及びエツチング加
工の材料及び工数を２分の１に削減し得、また高
価なNC装置によるスルホールの穴あけ加工が不
要となり、プリント基板における導電回路の形成
工程を飛躍的に簡略化し得、また完成品としての
プリント基板のコストを従来品の約２分の１に低
減させることができるという効果がある。また上
記のような第２層導電回路の電気的に接続されて
いない両部分に導電性の良好な端子用導電ペース
トを塗布して加熱硬化させて一対の端子部を形成
し、該一対の端子部に所定の電気抵抗値を有する
抵抗ペーストを塗布して加熱硬化させて第２層導
電回路に抵抗回路を形成するようにしたので、従
来の抵抗器、その基板への挿入又は接着作業及び
半田付作業を不要とすることができ、またこの結
果超薄型の抵抗回路を提供し得、しかもプリント
配線基板の実装密度の向上、軽量化及び製造工程
の省力化を図ることができ、また誤配線や抵抗器
の挿入ミスのおそれをなくし、プリント配線基板
の抵抗回路の信頼性を向上させ、コストの低減を
図ることができる等極めて優れた多くの効果があ
る。Effects Since the present invention is configured as described above, there is no need to electrically connect the first layer conductive circuit made of copper foil formed on the copper laminated polymer substrate with the second layer conductive circuit. The newly developed copper conductive paste with good metal plating properties is applied only to certain areas and cured by heating, and then metal plating such as copper chemical plating is applied on top of it to improve the conductivity of the copper conductive paste. It is possible to form a second layer conductive circuit by improving the conductivity to the same level as copper foil, and to form at least two layers of conductive circuit electrically connected to one side of a board such as a printed circuit board using copper foil. As a result, all circuits can be formed on one side with the same circuit density as conventional double-sided through-hole boards, and the materials and man-hours for copper foil attachment and etching can be reduced. It can reduce the cost by half, and eliminates the need for through-hole drilling using expensive NC equipment, dramatically simplifying the process of forming conductive circuits on printed circuit boards, and lowering the cost of printed circuit boards as finished products. It has the effect of being able to reduce the amount by about half of the product. Further, a conductive paste for terminals having good conductivity is applied to both parts of the second layer conductive circuit which are not electrically connected as described above, and is cured by heating to form a pair of terminal parts, and the terminal parts of the pair of terminals are A resistor paste having a predetermined electrical resistance value is applied to the resistor and cured by heating to form a resistor circuit on the second layer conductive circuit, which eliminates the need for conventional resistors, insertion into the circuit board, bonding work, and soldering. As a result, an ultra-thin resistor circuit can be provided, and it is possible to improve the mounting density of the printed wiring board, reduce weight, and save labor in the manufacturing process. It has many excellent effects, such as eliminating the risk of wiring or resistor insertion errors, improving the reliability of the resistance circuit on the printed wiring board, and reducing costs.

実施例 １ 紙フエノール基板にACP−007Pなる銅導電ペ
ーストを直接印刷して150℃にて所定時間加熱し
て硬化させた後、アルカリ、酸処理を行い、その
表面に化学銅めつきを施した場合において、化学
銅めつきの厚さが6μｍとなり、これに測定用端
子にリード線（錫めつき線0.5mmφ）を半田付け
した（３秒以内）。この場合、銅導電ペーストの
硬化時間が30分では半田引張り強度（Kg／３×３
mm2）は5.1Kgであり、また硬化時間が60分では5.9
Kgであつた。Example 1 A copper conductive paste called ACP-007P was directly printed on a paper phenol substrate, heated at 150°C for a predetermined period of time to harden it, and then treated with alkali and acid, and chemical copper plating was applied to the surface. In this case, the thickness of the chemical copper plating was 6 μm, and a lead wire (tinned wire 0.5 mmφ) was soldered to the measurement terminal (within 3 seconds). In this case, if the curing time of the copper conductive paste is 30 minutes, the solder tensile strength (Kg/3×3
mm 2 ) is 5.1Kg, and 5.9 at a curing time of 60 minutes.
It was Kg.

次に同様な条件で基板にガラスエポキシ基板を
用いた場合には硬化時間が30分では引張り強度は
5.9Kg、硬化時間が60分では6.2Kgであつた。 Next, if a glass epoxy substrate is used as the substrate under similar conditions, the tensile strength will be lower if the curing time is 30 minutes.
The weight was 5.9Kg, and the weight was 6.2Kg when the curing time was 60 minutes.

実施例 ２ フエノール基板にCR−2001なる耐めつきレジ
ストを印刷し、150℃にて30分間加熱して硬化さ
せ、次にACP−007Pなる銅導電ペーストを印刷
し、150℃にて所定時間加熱して硬化させた後、
アルカリ、酸処理を行い、化学銅めつきを行つ
た。化学銅めつきの厚さは6μｍであり、測定用
端子にリード線（錫めつき線0.5mmφ）を半田付
けした（３秒以内）。この場合の半田引張り強度
（Kg／３×３mm2）は銅導電ペーストの硬化時間が
30分では5.9Kg、硬化時間が60分では6.1Kgであつ
た。Example 2 A plating resist called CR-2001 was printed on a phenol substrate and cured by heating at 150°C for 30 minutes. Next, a copper conductive paste called ACP-007P was printed and heated at 150°C for a predetermined time. After curing,
Alkali and acid treatments were performed and chemical copper plating was performed. The thickness of the chemical copper plating was 6 μm, and a lead wire (tinned wire 0.5 mmφ) was soldered to the measurement terminal (within 3 seconds). In this case, the solder tensile strength (Kg/3×3mm 2 ) is determined by the curing time of the copper conductive paste.
When the curing time was 30 minutes, the weight was 5.9Kg, and when the curing time was 60 minutes, the weight was 6.1Kg.

同様な条件において、ガラスエポキシ基板を用
いた場合には、硬化時間が30分の場合に半田引張
り強度は6.1Kg、硬化時間が60分の場合には6.9Kg
であつた。 Under similar conditions, when using a glass epoxy substrate, the solder tensile strength was 6.1 Kg when the curing time was 30 minutes, and 6.9 Kg when the curing time was 60 minutes.
It was hot.

【図面の簡単な説明】[Brief explanation of drawings]

図面は本発明の実施例に係り、第１図は銅貼積
層基板の縦断面図、第２図は第１図に示すものに
耐エツチングレジストを塗布した状態を示す縦断
面図、第３図は第２図に示すものにエツチング加
工を施して銅箔による複数の第１層導電回路を形
成した状態を示す縦断面図、第４図は第３図に示
すものに耐めつきレジストを塗布した状態を示す
縦断面図、第５図は第４図に示すものに銅導電ペ
ーストを塗布した状態を示す縦断面図、第６図は
第５図に示すものに無電解銅めつきを施して銅め
つき層による第２層導電回路を形成した状態を示
す縦断面図、第７図は第６図に示すものに端子用
導電ペーストを塗布した状態を示す縦断面図、第
８図は第７図に示すものに抵抗ペーストを塗布し
て抵抗回路を形成した状態を示す縦断面図、第９
図は第８図に示すものにオーバコートを塗布して
完成したプリント配線基板の縦断面図である。 １は基板、３は銅貼積層ポリマ基板、６は耐め
つきレジスト、８は銅箔、９は銅導電ペースト、
１０は金属めつき層の一例たる銅めつき層、１３
は抵抗回路、１４は抵抗ペースト、１９は端子用
導電ペースト、２０は端子部、C1は第１層導電
回路、C2は第２層導電回路である。 The drawings relate to embodiments of the present invention, and FIG. 1 is a longitudinal sectional view of a copper-clad laminated board, FIG. 2 is a longitudinal sectional view showing the state shown in FIG. 1 coated with an etching resist, and FIG. 2 is a vertical cross-sectional view showing the state in which a plurality of first-layer conductive circuits made of copper foil have been formed by etching the material shown in FIG. 2, and FIG. 4 is a longitudinal cross-sectional view showing the state shown in FIG. Fig. 5 is a longitudinal cross-sectional view showing the state shown in Fig. 4 with copper conductive paste applied, and Fig. 6 is a longitudinal sectional view showing the state shown in Fig. 5 coated with electroless copper plating. FIG. 7 is a vertical cross-sectional view showing a state in which a second-layer conductive circuit is formed using a copper plating layer, FIG. FIG. 9 is a vertical cross-sectional view showing a state in which a resistor circuit is formed by applying a resistor paste to the thing shown in FIG.
The figure is a vertical sectional view of a printed wiring board completed by applying an overcoat to the one shown in FIG. 8. 1 is a substrate, 3 is a copper laminated polymer board, 6 is a plating resist, 8 is a copper foil, 9 is a copper conductive paste,
10 is a copper plating layer which is an example of a metal plating layer; 13
14 is a resistance circuit, 19 is a conductive paste for terminals, 20 is a terminal portion, C 1 is a first layer conductive circuit, and C 2 is a second layer conductive circuit.

Claims (1)

【特許請求の範囲】 １ 銅貼積層ポリマ基板にエツチング加工を施し
て銅箔により複数の第１層導電回路を形成し、該
第１層導電回路と第２層導電回路とを電気的に接
続する必要がある部分を残して前記ポリマ基板に
耐めつきレジストを塗布し、前記複数の第１層導
電回路にその一部が互いに電気的に接続しないよ
うにして金属めつき性の良好な銅導電ペーストを
塗布して加熱硬化させ、この状態で前記ポリマ基
板を清浄にして後、これを金属めつき液に浸し、
前記銅導電ペーストの表面に金属めつきを施し、
該金属めつき層と該銅導電ペーストとにより前記
第２層導電回路を形成し、該第２層導電回路の電
気的に接続されていない両部分に導電性の良好な
端子用導電ペーストを塗布して加熱硬化させて一
対の端子部を形成し、該一対の端子部に所定の電
気抵抗値を有する抵抗ペーストを塗布して加熱硬
化させ、前記第２層導電回路間に抵抗回路を形成
することを特徴とするポリマ基板に抵抗回路を形
成する方法。 ２ 前記金属めつきは、化学銅めつきであること
を特徴とする特許請求の範囲第１項に記載のポリ
マ基板に抵抗回路を形成する方法。[Claims] 1. Etching a copper laminated polymer substrate to form a plurality of first layer conductive circuits using copper foil, and electrically connecting the first layer conductive circuits and the second layer conductive circuits. A plating-resistant resist is applied to the polymer substrate, leaving only the areas where it is necessary, and the plurality of first-layer conductive circuits are coated with copper with good metal plating properties so that some of them are not electrically connected to each other. Applying a conductive paste and curing it by heating, cleaning the polymer substrate in this state, and then immersing it in a metal plating solution,
Metal plating is applied to the surface of the copper conductive paste,
The second layer conductive circuit is formed by the metal plating layer and the copper conductive paste, and a terminal conductive paste with good conductivity is applied to both parts of the second layer conductive circuit that are not electrically connected. A resistor paste having a predetermined electrical resistance value is applied to the pair of terminal parts and cured by heating to form a resistive circuit between the second layer conductive circuits. A method for forming a resistor circuit on a polymer substrate, characterized in that: 2. The method of forming a resistance circuit on a polymer substrate according to claim 1, wherein the metal plating is chemical copper plating.
JP61005643A 1986-01-14 1986-01-14 Method of forming resistance circuit on board Granted JPS62163302A (en)

Priority Applications (7)

Application Number Priority Date Filing Date Title
JP61005643A JPS62163302A (en) 1986-01-14 1986-01-14 Method of forming resistance circuit on board
US06/940,733 US4724040A (en) 1986-01-14 1986-12-11 Method for producing electric circuits on a base boad
NL8700053A NL8700053A (en) 1986-01-14 1987-01-12 METHOD FOR FORMING ELECTRICAL WIRING ON A BASE PLATE.
FR878700273A FR2593015B1 (en) 1986-01-14 1987-01-13 PROCESS FOR THE PRODUCTION OF ELECTRICAL CIRCUITS ON A BASE PLATE
KR1019870000191A KR900003158B1 (en) 1986-01-14 1987-01-13 Method for producing electric circuits an a base board
GB8700716A GB2186433B (en) 1986-01-14 1987-01-13 A method for producing electric circuits on a base board
DE19873700912 DE3700912A1 (en) 1986-01-14 1987-01-14 METHOD FOR PRODUCING ELECTRICAL CIRCUITS ON BASE BOARDS

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61005643A JPS62163302A (en) 1986-01-14 1986-01-14 Method of forming resistance circuit on board

Publications (2)

Publication Number Publication Date
JPS62163302A JPS62163302A (en) 1987-07-20
JPH0350405B2 true JPH0350405B2 (en) 1991-08-01

Family

ID=11616814

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61005643A Granted JPS62163302A (en) 1986-01-14 1986-01-14 Method of forming resistance circuit on board

Country Status (2)

Country Link
JP (1) JPS62163302A (en)
GB (1) GB2186433B (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5731320A (en) * 1980-07-31 1982-02-19 Matsushita Electric Works Ltd Leakage current detector

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5731320A (en) * 1980-07-31 1982-02-19 Matsushita Electric Works Ltd Leakage current detector

Also Published As

Publication number Publication date
GB2186433A (en) 1987-08-12
GB8700716D0 (en) 1987-02-18
GB2186433B (en) 1990-02-14
JPS62163302A (en) 1987-07-20

Similar Documents

Publication Publication Date Title
KR900003152B1 (en) Method for forming capacitive circuit on circuit board
US4404237A (en) Fabrication of electrical conductor by replacement of metallic powder in polymer with more noble metal
US4487811A (en) Electrical conductor
US4362903A (en) Electrical conductor interconnect providing solderable connections to hard-to-contact substrates, such as liquid crystal cells
KR900003158B1 (en) Method for producing electric circuits an a base board
JPH0237117B2 (en) KIBANNIDODENKAIROOKEISEISURUHOHO
JPH04277406A (en) Copper conductor paste
JPH0350405B2 (en)
JPS62163387A (en) Method for forming capacitive circuit on circuit board
JPH0213957B2 (en)
JPH08167768A (en) Forming method for circuit pattern, and paste used therefor
JPS6387797A (en) Method of forming conductive circuit on substrate
JPS6387795A (en) Method of forming conductive circuit on substrate
JPS61140195A (en) Making of ceramic wiring board
JPH0426560B2 (en)
JPS5892293A (en) Circuit board and method of producing same
JP2673825B2 (en) Method for manufacturing multilayer circuit board
JPS6387796A (en) Method of forming conductive circuit on substrate
JPS61171192A (en) Formation of conductive circuit
JPS5810886A (en) Method of fomring conductor circuit on insulating board
JPH0410754B2 (en)
JPS6019680B2 (en) How to solder to an insulation board
JPS61133694A (en) Formation of conducting circuit
JPH0237083B2 (en)
JPS5895892A (en) Method of forming circuit board

Legal Events

Date Code Title Description
R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

EXPY Cancellation because of completion of term