JPH03285871A - Grain boundary insulation type semiconductor porcelain composition and production thereof - Google Patents

Grain boundary insulation type semiconductor porcelain composition and production thereof

Info

Publication number
JPH03285871A
JPH03285871A JP2085250A JP8525090A JPH03285871A JP H03285871 A JPH03285871 A JP H03285871A JP 2085250 A JP2085250 A JP 2085250A JP 8525090 A JP8525090 A JP 8525090A JP H03285871 A JPH03285871 A JP H03285871A
Authority
JP
Japan
Prior art keywords
grain boundary
semiconductor porcelain
composition
present
dielectric constant
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2085250A
Other languages
Japanese (ja)
Other versions
JPH0761897B2 (en
Inventor
Yasushi Takada
高田 靖
Toshiaki Murakami
俊昭 村上
Junichi Yamagishi
淳一 山岸
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Taiyo Yuden Co Ltd
Original Assignee
Taiyo Yuden Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Taiyo Yuden Co Ltd filed Critical Taiyo Yuden Co Ltd
Priority to JP2085250A priority Critical patent/JPH0761897B2/en
Publication of JPH03285871A publication Critical patent/JPH03285871A/en
Publication of JPH0761897B2 publication Critical patent/JPH0761897B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Abstract

PURPOSE:To control the maximum particle diameter and to increase the product of dielectric constant and dielectric breakdown voltage per thickness by roasting the blended material of metallic oxides having specified composition and forming semiconductor porcelain and insulating its grain boundary by a specified compd. CONSTITUTION:Raw materials are blended so that the title composition is shown by the general formula (Sr1-xM<0>xM<1>y) (Ti1-zM<2>z)lO3+mM<3>+nM<4> wherein M<0> is at least one kind from alkaline earth metallic elements such as Ca and Ba, M<1> is at least one kind from Nb, Ta, W and rare earth elements, M<2> is Zr or Sn, M<3> is at least one kind from Mn, Al and Si, M<4> is one or both of Ge and Fe. The range of this composition is shown in the following expressions. 0.0001<=x<=0.05, 0.01<=y<=0.03, 0.0005<=z<=0.05, 0.990<=l<=1.010, 0.0001<=m<=0.01, 0.0001<=n<=0.03 Semiconductor porcelain is obtained by grinding this blended material and molding the ground material and roasting the molded body. This surface is applied with paste of a compd. contg. at least one kind from Cu, Bi, Pb, B and Si. The grain boundary is insulated by thermally diffusing this paste. Thereby the maximum particle diameter is controlled to 50-80mum.

Description

【発明の詳細な説明】 E産業上の利用分野〕 本発明は、磁器コンデンサ等に用いるための粒界絶縁型
半導体磁器組成物に関する。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a grain boundary insulated semiconductor ceramic composition for use in ceramic capacitors and the like.

[従来の技術] 従来、小型で容量の大きいコンデンサとして、粒界絶縁
型半導体磁器コンデンサが知られている。
[Prior Art] Grain-boundary insulated semiconductor ceramic capacitors have been known as small-sized, large-capacity capacitors.

粒界絶縁型半導体磁器コンデンサは、結晶粒界を絶縁化
することにより実効誘電率を大きくしたものである。
A grain boundary insulated semiconductor ceramic capacitor has a large effective dielectric constant by insulating the grain boundaries.

粒界絶縁型半導体磁器コンデンサに用いられる磁器組成
物としては、主成分に、チタン酸ストロンチウムまたは
チタン酸バリウムを用い、原子価制御用助剤として、N
bz 03 、Y203− py203等を添加し、さ
らに、焼結助剤として、MnO2、Bi2O5、CuO
、Sin□等が用いられる。
The ceramic composition used in grain boundary insulated semiconductor ceramic capacitors uses strontium titanate or barium titanate as the main component, and N as an auxiliary agent for valence control.
bz 03 , Y203-py203, etc., and further, as sintering aids, MnO2, Bi2O5, CuO
, Sin□, etc. are used.

例えば、特開昭56−54026には、(Sr1−、B
a、>Tie、(x=0.30〜0.50)を主体とし
、その他にチタン酸塩、ジルコン酸塩を含んだ主成分に
対してLa、Yなどの希土類元素、Nb、Ta、Wなど
のような半導体化剤とMnを含有し、結晶粒界がMn、
Bi、Cu、Pb、BおよびSiのうちの少なくとも1
種(ただし、B、Bfのいづれか1種のみは除く)によ
り絶縁体化されてなる最大粒径が100μm以上の粒界
絶縁型半導体磁器組成物である。
For example, in JP-A-56-54026, (Sr1-, B
a, > Tie, (x = 0.30 to 0.50) and other main components including titanate and zirconate, rare earth elements such as La and Y, Nb, Ta, and W. Contains a semiconducting agent such as Mn and Mn, and the grain boundaries are Mn,
At least one of Bi, Cu, Pb, B and Si
This is a grain boundary insulated semiconductor ceramic composition having a maximum grain size of 100 μm or more and made into an insulator by seeds (excluding only one of B and Bf).

近年、磁器コンデンサの小型化の要求に伴い、粒界絶縁
型半導体磁器コンデンサにおいても、より小型化、薄形
化の要求が高まっている。
In recent years, with the demand for smaller ceramic capacitors, there has also been an increasing demand for smaller and thinner grain boundary insulated semiconductor ceramic capacitors.

[発明が解決しようとする課題] 従来の粒界絶縁型半導体磁器では、見掛は誘電率を大き
くする必要から粒径を比較的大きくしていた。しかしな
がら、近年の要求に従い、磁器組成物の層を薄くした場
合には、厚み当りの結晶粒子の数が少なくなってしまう
。そのため、単位厚さ当りの絶縁破壊電圧が小さくなり
、その結果、誘電率と絶縁破壊電圧との積が小さくなっ
てしまっていた。その結果、粒界絶縁型半導体磁器コン
デンサの薄型化、小型化が困難であった。
[Problems to be Solved by the Invention] In conventional grain boundary insulated semiconductor porcelain, the grain size has been made relatively large because it is necessary to increase the apparent dielectric constant. However, when the layer of the ceramic composition is made thinner in accordance with recent demands, the number of crystal grains per thickness becomes smaller. Therefore, the dielectric breakdown voltage per unit thickness becomes small, and as a result, the product of dielectric constant and dielectric breakdown voltage becomes small. As a result, it has been difficult to reduce the thickness and size of grain boundary insulated semiconductor ceramic capacitors.

本発明は、最大粒径を50〜80μmに制御可能であり
、かつ、厚み当りの誘電率と絶縁破壊電圧との積が大き
い粒界絶縁型半導体磁器組成物およびその製造方法を提
供することを目的とする。
The present invention aims to provide a grain boundary insulated semiconductor ceramic composition whose maximum grain size can be controlled to 50 to 80 μm and which has a large product of dielectric constant per thickness and dielectric breakdown voltage, and a method for producing the same. purpose.

[課題を解決するための手段] 本発明は、上記目的を達成するために、以下の組成の粒
界絶縁型半導体磁器組成物を提供する。
[Means for Solving the Problems] In order to achieve the above object, the present invention provides a grain boundary insulated semiconductor ceramic composition having the following composition.

すなわち、一般式(S rl−x Mo * M、” 
、 )(T l 1−II M2x ) s 03 +
 mM’ + nM’ (但、MOは、Ca、Ba等の
アルカリ土類金属元素のうちの少なくとも1種類、Ml
は、Nb、Ta、W、及び希土類元素のうち少なくとも
1種類、M2は、ZrまたはSn、M’は、Mn、Al
、及びSiのうち少なくとも1種類、M4は、Ge、F
eの一方又は両方〉て表され、x、y、z、N、m、n
がそれぞれ、0.0001≦x≦0.05.0.001
≦y≦0.03.0.0.0005≦z≦0.05.0
.990≦1≦1.010.0.0001≦m≦0.0
1,0.001≦n≦0.03の範囲にある半導体磁器
の結晶粒界が、Cu、Bi、Pb、B、及びSiのうち
少なくとも1種を含む化合物により絶縁された粒界絶縁
型半導体磁器組成物である。
That is, the general formula (S rl-x Mo * M,"
, )(T l 1-II M2x ) s 03 +
mM' + nM' (However, MO is at least one kind of alkaline earth metal elements such as Ca and Ba, Ml
is at least one of Nb, Ta, W, and a rare earth element, M2 is Zr or Sn, M' is Mn, Al
, and at least one type of Si, M4 is Ge, F
x, y, z, N, m, n
are respectively 0.0001≦x≦0.05.0.001
≦y≦0.03.0.0.0005≦z≦0.05.0
.. 990≦1≦1.010.0.0001≦m≦0.0
A grain boundary insulated semiconductor in which the crystal grain boundaries of semiconductor ceramics in the range of 1,0.001≦n≦0.03 are insulated by a compound containing at least one of Cu, Bi, Pb, B, and Si. It is a porcelain composition.

また、一般式(S r I−x M’ * M’  )
  (T 11−s  M  2    )  1  
0 、  +mM  3  +nM’   <i旦 、
 M Oは、Ca、Ba等のアルカリ土類金属元素のう
ちの少なくとも1種類、Mlは、Nb、Ta、W、及び
希土類元素のうち少なくとも1種類、M2は、Zrまた
はSn、M3は、Mn・、Al、及びSiのうち少なく
とも1種類、M4は、Ge、Feの一方又は両方)で表
され、X、y、Z、!J、m、nがそれぞれ、0.00
01≦x≦0.05.0001≦y≦0.03.0.0
.0005≦z≦0゜05、O、’ 990≦1≦1.
010.0.0001≦m≦0.01.0.001≦n
≦0.03の範囲になるように配合した後、焼成するこ
とによって半導体磁器を得る工程と、前記工程によって
得られた半導体磁器の結晶粒界をCu、Bi、Pb、B
、及びSiのうち少なくとも1種を含む化合物を用いて
絶縁化する工程とを有する粒界絶縁型半導体磁器組成物
の製造方法である。
In addition, the general formula (S r I-x M' * M')
(T 11-s M 2 ) 1
0, +mM 3 +nM'<idan,
M O is at least one kind of alkaline earth metal elements such as Ca and Ba; Ml is at least one kind among Nb, Ta, W, and rare earth elements; M2 is Zr or Sn; M3 is Mn・, Al, and Si, M4 is represented by one or both of Ge and Fe), and X, y, Z, ! J, m, n are each 0.00
01≦x≦0.05.0001≦y≦0.03.0.0
.. 0005≦z≦0゜05, O,' 990≦1≦1.
010.0.0001≦m≦0.01.0.001≦n
≦0.03 and then firing to obtain semiconductor porcelain, and the crystal grain boundaries of the semiconductor porcelain obtained in the above step are mixed with Cu, Bi, Pb, and B.
, and a step of insulating using a compound containing at least one of Si.

以下、本発明の数値範囲の限定理由について説明する。The reason for limiting the numerical range of the present invention will be explained below.

本発明のXの範囲は、0.0001≦x≦0゜05であ
る。すなわち、0.0001未満では、原材料の精製が
困難であり実用上問題がある。また、0.05よりも大
きいと、見掛は誘電率が低下してしまい、本発明の目的
を達成することができない。
The range of X in the present invention is 0.0001≦x≦0°05. That is, if it is less than 0.0001, it is difficult to purify the raw material and there is a practical problem. On the other hand, if it is larger than 0.05, the apparent dielectric constant will decrease, making it impossible to achieve the object of the present invention.

一般式中Mlとして用いられるNb、Ta、W、及び希
土類元素のうち少なくとも1種類の含有範囲を示すyの
範囲は、0.001≦y≦0.03である。0.001
未満であっても、0.03よりも大きくても、見掛は誘
電率が低下してしまし)、本発明の目的を達成すること
ができない。
The range of y, which indicates the content range of at least one of Nb, Ta, W, and rare earth elements used as Ml in the general formula, is 0.001≦y≦0.03. 0.001
Even if it is less than 0.03 or greater than 0.03, the apparent dielectric constant will decrease), and the object of the present invention cannot be achieved.

−数式中M2として用いられるZrまたはSnの含有範
囲を示す2の範囲は、0.0.0005≦z≦0.05
である。0.0005未満では、誘電率を大きくするこ
とが困難であり、本発明の目的を達成することができな
い。また、0.05よりも大きくすると、誘電率が低下
してしまい、本発明の目的を達成することができない。
- The range of 2 indicating the content range of Zr or Sn used as M2 in the formula is 0.0.0005≦z≦0.05
It is. If it is less than 0.0005, it is difficult to increase the dielectric constant and the object of the present invention cannot be achieved. Moreover, if it is larger than 0.05, the dielectric constant will decrease, making it impossible to achieve the object of the present invention.

−数式中の1の範囲は、0.990≦ρ≦1゜010で
ある。0.990未満では、粒径80μmよりも大きい
結晶粒子が生じてしまう。また、1.010よりも大き
くなると、結晶粒子の平均粒径が50μm以下になって
しまい、十分な見掛は誘電率を得ることができなくなり
、本発明の目的を達成することができない。
- The range of 1 in the formula is 0.990≦ρ≦1°010. If it is less than 0.990, crystal grains with a grain size larger than 80 μm will be produced. On the other hand, if it is larger than 1.010, the average grain size of the crystal grains will be 50 μm or less, making it impossible to obtain a sufficient apparent dielectric constant, making it impossible to achieve the object of the present invention.

一般式中M3として用いられるMn、Al、及びSiの
うち少なくとも1種類の含有範囲を示すmの範囲は、0
.0001≦m≦0.01である。
In the general formula, the range of m indicating the content range of at least one of Mn, Al, and Si used as M3 is 0
.. 0001≦m≦0.01.

0.0001未満では、見掛は誘電率が低下してしまい
、本発明の目的を達成することができない。
If it is less than 0.0001, the apparent dielectric constant will decrease, making it impossible to achieve the object of the present invention.

また、0.01よりも大きいと、見掛は誘電率が低下し
てしまい、また、誘電体損失も悪くなり、本発明の目的
を達成することができない。
On the other hand, if it is larger than 0.01, the apparent dielectric constant will decrease and the dielectric loss will also worsen, making it impossible to achieve the object of the present invention.

−数式中M4として用いられるGe、Feの一方又は両
方を含有させることにより、結晶粒子の制御が可能にな
る。その範囲を示すnの範囲は、0.001≦n≦0.
03である。0.001未満では、80μmよりも大き
い結晶粒子が生じ、絶縁破壊電圧が低くなる。また、0
.03よりも大きいと、80μmよりも大きい結晶粒子
が生じ、また絶縁抵抗も低くなり、本発明の目的を達成
することができない。
- By including one or both of Ge and Fe used as M4 in the formula, crystal grains can be controlled. The range of n indicating the range is 0.001≦n≦0.
It is 03. If it is less than 0.001, crystal grains larger than 80 μm will be produced, resulting in a low dielectric breakdown voltage. Also, 0
.. If it is larger than 03, crystal grains larger than 80 μm will be produced, and the insulation resistance will also be low, making it impossible to achieve the object of the present invention.

なお、本発明の一般式中、m及びnは、酸化物の形で含
まれる場合には、例えば−数式xa obとして示され
るものをX Ob/aの形に直したときのXの元素の量
で表される。
In addition, in the general formula of the present invention, when m and n are included in the form of an oxide, for example, the value of the element expressed in quantity.

また、本発明に用いられている数値は、すべてモル(m
ol)で示した値である。
Furthermore, all numerical values used in the present invention are in moles (m
ol).

[実施例] 以下、実施例により本発明を具体的に説明する。[Example] Hereinafter, the present invention will be specifically explained with reference to Examples.

まず、第1表の試料番号1の調製方法とその電気的特性
について説明する。
First, the preparation method of sample number 1 in Table 1 and its electrical properties will be explained.

SrCO3、BaCO3、zr○2、Tio□、Y2O
1、MnO2、GeO2の化合物を第1表の試料番号1
に示す組成比になるように配合し、1150℃で2時間
仮焼を行った。
SrCO3, BaCO3, zr○2, Tio□, Y2O
1. Compounds of MnO2 and GeO2 were sample number 1 in Table 1.
The compositions were blended to have the composition ratio shown below, and calcined at 1150°C for 2 hours.

これを粉砕し、アクリル系バインダを10wt%加え、
攪拌した後、50メツシユのふるいで造粒し、成形圧力
1 ton/cm2、直径12.5mm、肉厚0.3m
mの円板に成形した。
Grind this, add 10wt% of acrylic binder,
After stirring, it was granulated using a 50-mesh sieve, with a molding pressure of 1 ton/cm2, a diameter of 12.5 mm, and a wall thickness of 0.3 m.
It was molded into a disk of m.

得られた円板状成形体を、窒素98vo1%、水素2V
OI%からなる還元雰囲気にて1400℃で3時間焼成
し、半導体磁器を得た。
The obtained disk-shaped molded body was heated with 98 vol. of nitrogen and 2 V of hydrogen.
It was fired at 1400° C. for 3 hours in a reducing atmosphere containing OI% to obtain semiconductor porcelain.

得られた半導体磁器の表面に金属酸化物ペースト、具体
的には、Bi、Olを40 w t%、Pb、o4を4
6wt%、B20.を7 w t%、CuOを6 w 
t%、5in2を1wt%および樹脂を溶剤に添加した
ペーストを塗布し、1150℃で2時間熱拡散させ、結
晶粒界を絶縁化した。
A metal oxide paste was applied to the surface of the obtained semiconductor porcelain, specifically, 40 wt% of Bi and Ol and 4% of Pb and O4 were applied.
6wt%, B20. 7 wt%, CuO 6 wt%
A paste containing 1 wt% of 5in2 and a resin added to a solvent was applied and thermally diffused at 1150° C. for 2 hours to insulate the grain boundaries.

さらに、この粒界絶縁型半導体磁器の表面に銀ペースト
を印刷することによって塗布し、800℃で1時間焼き
付けることによってコンデンサを作成した。
Furthermore, a capacitor was fabricated by applying a silver paste to the surface of this grain boundary insulated semiconductor porcelain by printing and baking it at 800° C. for 1 hour.

(以下余白) 得られたコンデンサの電気的特性を測定したところ、第
2表の試料番号1に示す結果を得ることができた。
(The following is a blank space) When the electrical characteristics of the obtained capacitor were measured, the results shown in sample number 1 in Table 2 could be obtained.

試料番号2以降の組成物についても、同様の条件にてコ
ンデンサを作成し、同様の条件にて電気的特性を測定し
た。
Concerning the compositions of Sample No. 2 and subsequent samples, capacitors were also produced under the same conditions, and the electrical characteristics were measured under the same conditions.

表中、見掛は誘電率(ε)、誘電体損失(tanδ)は
、温度25℃にて周波数1kHz、電圧IVγlll5
て測定した値であり、絶縁抵抗(IR>は、温度25℃
にて25Vの直流電圧を印加した15秒後の値であり、
温度特性(TC)は、温度20℃を基準とし、−25℃
〜85℃の温度範囲における最大容量変化率の値であり
、表中、上段は、最大容量増加率を示し、下段は、最大
容量減少率を示す。また、誘電率と絶縁破壊電圧との積
(εXBDV)は、1mm当りの誘電率と絶縁破壊電圧
との積を示す。
In the table, the apparent dielectric constant (ε) and the dielectric loss (tan δ) are measured at a temperature of 25°C, a frequency of 1 kHz, and a voltage of IVγllll5.
The insulation resistance (IR> is the value measured at 25℃
This is the value 15 seconds after applying a DC voltage of 25V at
Temperature characteristics (TC) are based on a temperature of 20℃, -25℃
These are the values of the maximum capacity change rate in the temperature range of ~85° C. In the table, the upper row shows the maximum capacity increase rate, and the lower row shows the maximum capacity decrease rate. Further, the product of dielectric constant and dielectric breakdown voltage (εXBDV) indicates the product of dielectric constant and dielectric breakdown voltage per 1 mm.

なお、表中、試料番号の右上に示される*は、本発明の
範囲外の試料、すなわち、比較例であることを示す。
In addition, in the table, * shown in the upper right corner of the sample number indicates that it is a sample outside the scope of the present invention, that is, a comparative example.

第1表 第2表 本実施例の試料番号1〜4.7〜9.12−14.17
〜19.22〜24、及び27〜29に示されるように
、本発明によれば、最大粒径が50〜80μmであり、
絶縁抵抗が1500 MΩ以上であり、かつ、誘電率と
絶縁破壊電圧との積が7.0XIO’以上の粒界絶縁型
半導体磁器組成物を得ることができる。
Table 1 Table 2 Sample numbers of this example 1-4.7-9.12-14.17
~19. As shown in 22-24 and 27-29, according to the present invention, the maximum particle size is 50-80 μm,
A grain boundary insulated semiconductor ceramic composition having an insulation resistance of 1500 MΩ or more and a product of dielectric constant and dielectric breakdown voltage of 7.0XIO' or more can be obtained.

一方、本発明の範囲外の試料番号5.6.10.11.
15.16.20.21.25.26.30においては
、本発明の目的を達成することができない。
On the other hand, sample number 5.6.10.11. outside the scope of the present invention.
15.16.20.21.25.26.30, the object of the present invention cannot be achieved.

なお、本発明者らは、表中に示される実施例の組成に限
られず、特許請求の範囲に記載された組成範囲であれば
、本発明の範囲内の他の物質であっても本発明の効果を
得ることができることがわかっている。
The present inventors believe that the present invention is not limited to the compositions of the examples shown in the table, and even other substances within the scope of the present invention can be used as long as they are within the composition range described in the claims. It is known that this effect can be obtained.

[効果] 本発明によれば、最大粒径を50〜80μmに制御可能
であり、かつ、厚み当りの誘電率と絶縁破壊電圧との積
が大きい粒界絶縁型半導体磁器組成物およびその製造方
法を提供することができる。
[Effects] According to the present invention, a grain boundary insulated semiconductor ceramic composition whose maximum grain size can be controlled to 50 to 80 μm and a large product of dielectric constant per thickness and dielectric breakdown voltage, and a method for producing the same are provided. can be provided.

Claims (1)

【特許請求の範囲】 (1)一般式(Sr_1_−_xM^0M^1_y)(
Ti_1_−_zM^2_z)_lO_3+mM^3+
nM^4(但、M^0は、Ca、Ba等のアルカリ土類
金属元素のうちの少なくとも1種類、M^1は、Nb、
Ta、W、及び希土類元素のうち少なくとも1種類、M
^2は、ZrまたはSn、M^3は、Mn、Al、及び
Siのうち少なくとも1種類、M^4は、Ge、Feの
一方又は両方)で表され、 x、y、z、l、m、nがそれぞれ 0.0001≦x≦0.05 0.001≦y≦0.03 0.0005≦z≦0.05 0.990≦l≦1.010 0.0001≦m≦0.01 0.001≦n≦0.03 の範囲にある半導体磁器の結晶粒界が、Cu、Bi、P
b、B、及びSiのうち少なくとも1種を含む化合物に
より絶縁された粒界絶縁型半導体磁器組成物。 (2)一般式(Sr_1_−_xM^0_xM^1_y
)(Ti_1_−_zM^2_z)_lO_3+mM^
3+nM^4(但、M^0は、Ca、Ba等のアルカリ
土類金属元素のうちの少なくとも1種類、M^1は、N
b、Ta、W、及び希土類元素のうち少なくとも1種類
、M^2は、ZrまたはSn、M^3は、Mn、Al、
及びSiのうち少なくとも1種類、M^4は、Ge、F
eの一方又は両方)で表され、 x、y、z、l、m、nがそれぞれ 0.0001≦x≦0.05 0.001≦y≦0.030 0.0005≦z≦0.05 0.990≦l≦1.010 0.0001≦m≦0.01 0.001≦n≦0.03 の範囲になるように配合した後、焼成することによって
半導体磁器を得る工程と、 前記工程によって得られた半導体磁器の結晶粒界をCu
、Bi、Pb、B、及びSiのうち少なくとも1種を含
む化合物を用いて絶縁化する工程とを有する粒界絶縁型
半導体磁器組成物の製造方法。
[Claims] (1) General formula (Sr_1_-_xM^0M^1_y) (
Ti_1_−_zM^2_z)_lO_3+mM^3+
nM^4 (However, M^0 is at least one kind of alkaline earth metal elements such as Ca and Ba, M^1 is Nb,
At least one of Ta, W, and rare earth elements, M
^2 is Zr or Sn, M^3 is at least one of Mn, Al, and Si, M^4 is one or both of Ge and Fe), x, y, z, l, m and n are respectively 0.0001≦x≦0.05 0.001≦y≦0.03 0.0005≦z≦0.05 0.990≦l≦1.010 0.0001≦m≦0.01 The crystal grain boundaries of semiconductor ceramics in the range of 0.001≦n≦0.03 are Cu, Bi, P
A grain boundary insulated semiconductor ceramic composition insulated by a compound containing at least one of B, B, and Si. (2) General formula (Sr_1_−_xM^0_xM^1_y
) (Ti_1_−_zM^2_z)_lO_3+mM^
3+nM^4 (However, M^0 is at least one kind of alkaline earth metal elements such as Ca and Ba, and M^1 is N
b, Ta, W, and at least one of rare earth elements, M^2 is Zr or Sn, M^3 is Mn, Al,
and at least one of Si, M^4 is Ge, F
x, y, z, l, m, n are each 0.0001≦x≦0.05 0.001≦y≦0.030 0.0005≦z≦0.05 A step of obtaining semiconducting porcelain by firing after blending so as to satisfy the following ranges: 0.990≦l≦1.010 0.0001≦m≦0.01 0.001≦n≦0.03; The grain boundaries of the semiconductor porcelain obtained by Cu
, a step of insulating using a compound containing at least one of Bi, Pb, B, and Si.
JP2085250A 1990-03-30 1990-03-30 Grain boundary insulating semiconductor ceramic composition and method for producing the same Expired - Fee Related JPH0761897B2 (en)

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Application Number Priority Date Filing Date Title
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JPH03285871A true JPH03285871A (en) 1991-12-17
JPH0761897B2 JPH0761897B2 (en) 1995-07-05

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5248640A (en) * 1991-09-25 1993-09-28 Murata Manufacturing Co., Ltd. Non-reducible dielectric ceramic composition
US5264402A (en) * 1992-05-01 1993-11-23 Murata Manufacturing Co., Ltd. Non-reducible dielectric ceramic composition

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52147800A (en) * 1976-06-03 1977-12-08 Matsushita Electric Ind Co Ltd Semiconductor ceramic capacitor composite and its method of manufacturing
JPS5654026A (en) * 1979-10-09 1981-05-13 Murata Manufacturing Co Grain boundary insulating type semiconductor porcelain composition

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52147800A (en) * 1976-06-03 1977-12-08 Matsushita Electric Ind Co Ltd Semiconductor ceramic capacitor composite and its method of manufacturing
JPS5654026A (en) * 1979-10-09 1981-05-13 Murata Manufacturing Co Grain boundary insulating type semiconductor porcelain composition

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5248640A (en) * 1991-09-25 1993-09-28 Murata Manufacturing Co., Ltd. Non-reducible dielectric ceramic composition
US5264402A (en) * 1992-05-01 1993-11-23 Murata Manufacturing Co., Ltd. Non-reducible dielectric ceramic composition

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