JPH03284165A - Over-current protection device of semiconductor device - Google Patents

Over-current protection device of semiconductor device

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Publication number
JPH03284165A
JPH03284165A JP7891290A JP7891290A JPH03284165A JP H03284165 A JPH03284165 A JP H03284165A JP 7891290 A JP7891290 A JP 7891290A JP 7891290 A JP7891290 A JP 7891290A JP H03284165 A JPH03284165 A JP H03284165A
Authority
JP
Japan
Prior art keywords
temperature
gate
semiconductor element
reverse voltage
detection circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7891290A
Other languages
Japanese (ja)
Inventor
Kazuhiko Murabayashi
村林 一彦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP7891290A priority Critical patent/JPH03284165A/en
Publication of JPH03284165A publication Critical patent/JPH03284165A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To securely block the gate of a semiconductor element to turn the element off according to its condition under an over-current by monitoring the junction temperature of the semiconductor element and controlling a gate pulse according to the temperature. CONSTITUTION:The present invention includes a reverse voltage application time detection circuit 7 to detect the application of reverse voltage, a temperature detection circuit 18 to detect the junction temperature Tj of a semiconductor element, and a gate circuit 11 to transmit a normal-operation gate signal, which is converted from a forced ignition protection pulse, on the basis of the output of the reverse voltage application time detection circuit 7 and that of the temperature detection circuit 18. It is operated whilst the temperature Tj of the semiconductor element is always monitored. If a temperature Tj too high to block the gate is detected when an over-current is generated, a protection pulse is transmitted for ignition and, when the temperature becomes low enough to block the gate, the gate is blocked to turn the semiconductor element off.

Description

【発明の詳細な説明】 [発明の目的] (産業上の利用分野) 本発明は、半導体素子の過電流保護装置に係り、特に、
ゲートブロッキングを確実に実施するようにした半導体
装置の過電流保護装置に関する。
[Detailed Description of the Invention] [Object of the Invention] (Industrial Application Field) The present invention relates to an overcurrent protection device for semiconductor devices, and in particular,
The present invention relates to an overcurrent protection device for a semiconductor device that reliably performs gate blocking.

(従来の技術) 半導体はその物性的な特性上瞬時ストレスに弱いため過
電流保護、過電圧保護を厳密に実施する必要がある。過
電流保護に関しては、従来から基本的にはフユーズが使
用されてきた。
(Prior Art) Semiconductors are susceptible to instantaneous stress due to their physical properties, so it is necessary to strictly implement overcurrent protection and overvoltage protection. Conventionally, fuses have been basically used for overcurrent protection.

すなわち故障電流が発生した場合、半導体に直列に接続
した半導体用高速限流フユーズによる故障電流を限流さ
せた後、しゃ断し半導体を保護していた。しかしながら
、半導体装置が高電圧化するに従いフユーズによる保護
は種々の面で難しくなってきた。例えば半導体を直列接
続して使用する高圧半導体装置の場合はフユーズを使用
することは出来ない。
That is, when a fault current occurs, the fault current is limited by a high-speed current limiting fuse for semiconductors connected in series with the semiconductor, and then the fault current is cut off to protect the semiconductor. However, as the voltage of semiconductor devices increases, protection by fuses has become difficult in various respects. For example, fuses cannot be used in high-voltage semiconductor devices that use semiconductors connected in series.

これは、通常直列接続された高圧半導体装置では、リダ
ンダント(冗長用に積み増しすること)を設けるという
考え方をとるため半導体が1個故障した場合でも運転を
維持しなければならず、そのために、フユーズにより回
路を切り離してしまう事はできない。この様な高圧半導
体装置の過電流保護のために、従来はゲートブロッキン
グ(以下GBと略す)による方法が採用されてきた。
This is because high-voltage semiconductor devices that are normally connected in series require redundancy (additional stacks for redundancy), so operation must be maintained even if one semiconductor fails, and for this reason, the fuse It is not possible to disconnect the circuit. Conventionally, a method using gate blocking (hereinafter abbreviated as GB) has been adopted for overcurrent protection of such a high voltage semiconductor device.

GBとは、故障等により過電流が発生した場合に、その
半導体素子(たとえばサイリスタ)の次に点弧予定のサ
イリスタにゲート信号を出力するのを停止し、次のサイ
リスタの点弧を停止することで過電流による事故を防止
する方法である。この方法は過電流保護として広く採用
され、とくに高圧半導体装置の過電流保護としては、主
流となっている。
GB is a device that, when an overcurrent occurs due to a failure, etc., stops outputting a gate signal to the thyristor that is scheduled to fire next after that semiconductor element (for example, a thyristor), and stops the firing of the next thyristor. This is a method to prevent accidents caused by overcurrent. This method has been widely adopted as overcurrent protection, and is particularly mainstream as overcurrent protection for high voltage semiconductor devices.

しかしながら、このGBによる方法は、半導体素子その
もののGB能力に依存しているため、故障電流によるサ
イリスタの接合部温度(以下T。
However, since this GB method relies on the GB capability of the semiconductor element itself, the thyristor junction temperature (hereinafter referred to as T) due to the fault current.

温度と略す)をGB出来るT、温度以内に収める様に設
計しなければならない。従って故障時の過電流を解析し
、過電流時のT、温度の上昇を算出し、GB出来るT、
温度から逆算して定常時の許容T、湿温度決定される。
The design must be such that the temperature (abbreviated as "temperature") is kept within the temperature range of GB. Therefore, we analyze the overcurrent at the time of failure, calculate the T at the time of overcurrent, the temperature rise, and calculate the T that can be used for GB.
The allowable T and humidity temperature in steady state are determined by calculating backwards from the temperature.

しかる後にこの許容T、湿温度ら定常時の許容電流を決
めている。
After that, the allowable current in steady state is determined based on the allowable T and humidity temperature.

また、高電圧半導体装置の様に多数の半導体を直列接続
して使用する装置ではターンオフ時の逆電圧印加状況に
よっては、部分転流失敗が発生ずる。これを防止するた
め通常高圧半導体装置では、逆電圧を監視し半導体素子
がターンオフするのに充分な逆電圧が印加されない時に
はパルスを出力し半導体素子を強制的に点弧させて保護
する強制点弧保護パルス機能を持っている。
Furthermore, in devices such as high-voltage semiconductor devices in which a large number of semiconductors are connected in series, partial commutation failure may occur depending on the application of reverse voltage at turn-off. To prevent this, normally high-voltage semiconductor devices monitor the reverse voltage and, if sufficient reverse voltage is not applied to turn off the semiconductor element, output a pulse to forcibly ignite the semiconductor element and protect it. It has a protection pulse function.

この場合も強制点弧保護パルスによって引起される過電
流に対して先にに説明した故障時の過電流と同様な協調
をもって定常時の許容電流を決める必要がある。この考
慮をおこたると強制点弧保護パルス後正常運転にもどる
ときにターンオフ出来ず半導体素子を破損するケースが
生ずる。
In this case as well, it is necessary to determine the allowable current in steady state with respect to the overcurrent caused by the forced ignition protection pulse with the same coordination as in the case of the overcurrent in the event of a failure as described above. If this consideration is not taken into account, there will be a case where the semiconductor device is damaged because it cannot be turned off when normal operation is resumed after the forced ignition protection pulse.

以上述べた様に、過電流保護としてGB保護を採用する
半導体装置の場合には、故障、事故による過電流及び強
制点弧保護パルスにより発生する過電流等に対して、こ
れらの過電流が発生した場合にも半導体素子のT、温度
をGB可能な温度に押さえる様に定常時の電流を制限し
て使用する様協調をとる必要がある。
As mentioned above, in the case of semiconductor devices that employ GB protection as overcurrent protection, these overcurrents occur due to overcurrents due to failures, accidents, and overcurrents generated by forced ignition protection pulses. Even in such a case, it is necessary to take coordination to limit the steady state current so as to keep the T and temperature of the semiconductor element to a temperature that allows GB.

(発明が解決しようとする課題) しかしながら、半導体装置が広く色々の装置に使用され
てくると、前述した故障時等の過電流を精度よく解析す
ることが難しい装置が現れて来た。この具体例を第2図
に示す、系統電圧安定化用無効電力補償装置(以下SV
Cと略す)の場合において説明する。
(Problems to be Solved by the Invention) However, as semiconductor devices have been widely used in various devices, devices have appeared in which it is difficult to accurately analyze overcurrents at the time of the above-mentioned failure. A concrete example of this is shown in Fig. 2, which is a reactive power compensator (hereinafter referred to as SV
The case of (abbreviated as C) will be explained.

一般にSCvは、第2図に示すように進み分を供給する
コンデンサ23と、このコンデンサ23を入切するサイ
リスタ式スイッチ(TSCと呼ぶ)24及び遅れ分を供
給するりアクドル25と、このリアクトル25を位相制
御するサイリスタ式調整器(TCRと呼ぶ)26とから
構成され、TCRの位相制御とTSCの入/切制御によ
り任意の量の無効電力を系統に供給することが出来る。
Generally, as shown in FIG. 2, SCv includes a capacitor 23 that supplies a lead component, a thyristor switch (referred to as TSC) 24 that turns on and off the capacitor 23, an accelerator 25 that supplies a delay component, and a reactor 25. It is composed of a thyristor type regulator (referred to as TCR) 26 that controls the phase of the TCR, and an arbitrary amount of reactive power can be supplied to the grid by controlling the phase of the TCR and controlling the on/off of the TSC.

この様なSvCシステムにおいて、系統電圧が喪失した
場合(例えば地絡の発生)TCRは、第3図(a)に示
す様なりCトラップと呼ばれる直流でバイアスされた状
態となり電流は一方向に流れ続ける。
In such an SvC system, when the grid voltage is lost (e.g. due to a ground fault), the TCR becomes biased with DC, called a C trap, as shown in Figure 3(a), and the current flows in one direction. continue.

そして、系統電圧が復帰回復した時、(A点)、その時
の状況次第によっては振動してB点で「0」となる。B
点で印加される逆電圧により、次の順電圧印加時すなわ
ち0点でG、B出来れば自然回復して正常運転に戻るこ
とになる。この様な事故時の過電流を考慮する場合、第
3図(b)に示すごとくT、温度を算出しB点における
T、温度がCB出来る温度以内であることが必要となる
。また0点で逆電圧不足により強制点弧保護パルスを出
力した場合は、その結果による電流でD点におけるT、
温度がGB出来る温度以内であることが必要となる。
Then, when the grid voltage is restored (point A), it oscillates depending on the situation at that time and becomes "0" at point B. B
Due to the reverse voltage applied at the point, when the next forward voltage is applied, that is, at the 0 point, if G and B can be achieved, it will naturally recover and return to normal operation. When considering overcurrent in the event of such an accident, it is necessary to calculate T and temperature as shown in FIG. 3(b), and to ensure that T and temperature at point B are within the temperature at which CB can be achieved. Also, if a forced ignition protection pulse is output due to insufficient reverse voltage at point 0, the resulting current will cause T at point D,
It is necessary that the temperature is within the GB temperature range.

この様にすべての事故、故障による過電流に対するT、
温度を正確に把握しないと、GBによる保護は完全とな
らないが、系統条件の変化、事故、故障の条件が多岐に
渡るため、すべてのケースについて半導体素子のT、温
度を正確に把握することは非常に困難となる。
In this way, T against overcurrent due to all accidents and failures,
If the temperature is not accurately determined, the protection provided by GB will not be complete, but since changes in system conditions, accidents, and failure conditions vary widely, it is difficult to accurately determine the T and temperature of semiconductor elements in all cases. It becomes very difficult.

本発明は上述の問題点に鑑みてなされたもので、過電流
発生による半導体素子の状況に対応しゲートブロッキン
グを確実に実施してターンオフを可能とする半導体装置
の過電流保護装置を提供することを目的とする。
The present invention has been made in view of the above-mentioned problems, and an object of the present invention is to provide an overcurrent protection device for a semiconductor device that can respond to the situation of a semiconductor device due to the occurrence of an overcurrent, reliably perform gate blocking, and enable turn-off. With the goal.

[発明の構成コ (課題を解決するための手段) 上記目的を達成するため半導体素子の接合部温度T、を
監視し、このT、に応じてゲートパルスを制御するよう
にしたもので、本発明の半導体装置の過電流保護回路は
、ターンオフするのに必要な逆電圧が印加されていない
とき半導体素子に強制点弧保護パルスを出力する半導体
装置の過電流保護回路において、前記逆電圧の印加を検
出する逆電圧印加時間検出回路と、前記半導体素子の接
合部温度を検出する温度検出回路と、この温度検出回路
と前記逆電圧印加時間検出回路の出力に基づき前記強制
点弧保護パルスを正規運転のゲート信号に切り換えて出
力するゲート回路とを備えたものである。
[Configuration of the Invention (Means for Solving the Problems) In order to achieve the above object, the junction temperature T of the semiconductor element is monitored and the gate pulse is controlled according to this T. The overcurrent protection circuit for a semiconductor device of the invention outputs a forced ignition protection pulse to a semiconductor element when a reverse voltage necessary for turning off is not applied. a temperature detection circuit that detects the junction temperature of the semiconductor element, and a temperature detection circuit that normalizes the forced ignition protection pulse based on the outputs of the temperature detection circuit and the reverse voltage application time detection circuit. It is equipped with a gate circuit that switches to and outputs a gate signal for operation.

(作 用) 上記構成により、常に半導体素子のT、温度を監視しな
がら運転し、過電流発生時にそのT。
(Function) With the above configuration, the device is operated while constantly monitoring the T and temperature of the semiconductor element, and the T when an overcurrent occurs.

温度を検出しそのT、がゲートブロッキング可能範囲で
あればゲートブロッキングし、ゲートブロッキング不可
能な温度まで上昇している場合には、保護パルスを出力
して点弧させ、しかる後過電流が収まりT、が下がって
ゲートブロッキング可能範囲に戻ったときにゲートブロ
ッキングし、半導体素子をターンオフする。これにより
半導体装置の如何なる事故、故障のときでも、そのとき
発生する過電流を半導体素子のT、温度として把握する
ことができるため確実なゲートブロッキングのタイミン
グを決定することができる。また強制点弧保護パルス運
転から正規運転に復帰する場合でも逆電圧時間と共にT
、温度を知ることができるため強制点弧保護パルスの出
力を停止する適切な復帰タイミングを得ることができる
The temperature is detected, and if the temperature T is within the range where gate blocking is possible, gate blocking is performed, and if the temperature has risen to a point where gate blocking is not possible, a protection pulse is output and ignited, and then the overcurrent subsides. When T decreases and returns to a range where gate blocking is possible, gate blocking is performed and the semiconductor device is turned off. As a result, even in the event of any accident or failure of the semiconductor device, the overcurrent generated at that time can be understood as the T and temperature of the semiconductor element, so the timing of gate blocking can be determined reliably. Also, even when returning to normal operation from forced ignition protection pulse operation, T
Since the temperature can be known, an appropriate return timing for stopping the output of the forced ignition protection pulse can be obtained.

(実施例) 以下本発明の一実施例を第1図を用いて説明する。第1
図において1は半導体装置であり、半導体素子としては
高圧半導体装置にもっとも多く用いられる光点弧サイリ
スタ2を用いている。
(Example) An example of the present invention will be described below with reference to FIG. 1st
In the figure, reference numeral 1 denotes a semiconductor device, and the semiconductor element used is a light-ignition thyristor 2, which is most commonly used in high-voltage semiconductor devices.

光点弧サイリスタ2のアノード拳カソード間には、逆電
圧検出用の抵抗器3と逆電圧検出器4が設けられ、光点
弧サイリスタ2に印加される逆電圧を検出する。
A reverse voltage detection resistor 3 and a reverse voltage detector 4 are provided between the anode and the cathode of the light ignition thyristor 2 to detect the reverse voltage applied to the light ignition thyristor 2 .

逆電圧検出器4による逆電圧信号は、光ファイバー5に
より半導体装置1の主回路から絶縁されて、低圧側にあ
る受光アンプ6に入力される。受光アンプ6で光/電気
変換された逆電圧信号は、逆電圧印加時間検出回路7に
よりその逆電圧時間を予め設定するターンオフタイム設
定器8のターンオフタイムと比較されその結果、ターン
オフするのに充分な長さであれば、逆電圧充分信号9が
出力され不充分であれば逆圧不充分信号10が出力され
る。
The reverse voltage signal from the reverse voltage detector 4 is insulated from the main circuit of the semiconductor device 1 by an optical fiber 5 and input to a light receiving amplifier 6 on the low voltage side. The reverse voltage signal optically/electrically converted by the light receiving amplifier 6 is compared with the turn-off time of the turn-off time setting device 8 which presets the reverse voltage time by the reverse voltage application time detection circuit 7, and as a result, it is determined that the reverse voltage signal is sufficient for turning off. If the length is sufficient, a sufficient reverse voltage signal 9 is output, and if the length is insufficient, an insufficient reverse voltage signal 10 is output.

逆電圧不充分信号10は、アンド回路22を通りゲート
回路11において、正規ゲート信号12に強制点弧回路
13で割り込み部分転流失敗保護用の強制点弧保護パル
スとして出力される。
Insufficient reverse voltage signal 10 passes through AND circuit 22 and is output as normal gate signal 12 to normal gate signal 12 in forced firing circuit 13 as a forced firing protection pulse for interrupt partial commutation failure protection.

接合部温度算出回路14は種々の入力15.18.17
に基づき接合部温度T、を連続的に算出する。本実施例
では、図示していないが半導体素子の冷却方式として水
冷方式を採用しており入力条件としては次のものがある
。冷却条件15として周囲温度、水温、水量等の諸量が
入力される。次に、光点弧サイリスタ2に流れる電流値
1B、さらに部品データ17として光点弧サイリスタ2
のロスデータ、熱抵抗値及び冷却フィンデータ等が入力
される。
The junction temperature calculation circuit 14 receives various inputs 15.18.17.
The junction temperature T is continuously calculated based on the following. In this embodiment, although not shown, a water cooling method is adopted as a cooling method for the semiconductor element, and the input conditions include the following. Various quantities such as ambient temperature, water temperature, and water amount are input as cooling conditions 15. Next, the current value 1B flowing through the light ignition thyristor 2, and further the part data 17 of the light ignition thyristor 2.
loss data, thermal resistance value, cooling fin data, etc. are input.

接合部温度算出回路14で算出されたT、温度は、接合
部温度検出回路18においてGB可能な温度と比較され
GB可能であればGB充分信号19、GB不可能であれ
ばGB不充分信号20が出力される。
The temperature T calculated by the junction temperature calculation circuit 14 is compared with the temperature at which GB is possible in the junction temperature detection circuit 18, and if GB is possible, a GB sufficient signal 19 is generated, and if GB is not possible, a GB insufficient signal 20 is generated. is output.

GB不充分信号20は、前述した逆電圧不充分信号IO
と同様にゲート回路11において正規ゲート信号12に
強制点弧回路13で割り込みT、保護パルスとして出力
され半導体素子を点弧させる。
The GB insufficient signal 20 is the reverse voltage insufficient signal IO described above.
Similarly, in the gate circuit 11, the normal gate signal 12 is output as an interrupt T and a protection pulse in the forced ignition circuit 13, and the semiconductor element is ignited.

GB充分信号19は逆電圧充分信号9と共にナンド回路
21により、この2つの条件が共に満足された時のみア
ンド回路22.23からの各々の強制転流保護パルス出
力をロックする。すなわちGB可能0 な逆電圧が充分印加されており、かつT、温度がGB可
能な温度まで下っているときのみ強制点弧保護パルス及
びT」保護パルスをロックする。
The GB sufficient signal 19 together with the reverse voltage sufficient signal 9 is used by the NAND circuit 21 to lock each forced commutation protection pulse output from the AND circuits 22 and 23 only when both of these two conditions are satisfied. That is, the forced ignition protection pulse and the T protection pulse are locked only when a sufficient reverse voltage is applied to enable GB and the temperature T has fallen to a temperature that allows GB.

本実施例によれば、第3図で説明したSVC用TCRの
DCトラップの様に複雑でかつ様々な過電流が発生する
場合においても、常に半導体素子のT、温度を算出し把
握することが出来るためB点でのT、温度が自動的に求
まりB−C間の逆電圧印加時間が検出できるので、6点
でGB可能か又は保護パルスを出力しなければならない
かの判断を正しく行うことが出来る。
According to this embodiment, even when complex and various overcurrents occur, such as the DC trap of the SVC TCR explained in FIG. 3, it is possible to always calculate and understand the T and temperature of the semiconductor element. Therefore, T and temperature at point B can be automatically determined, and the reverse voltage application time between B and C can be detected, so it is possible to correctly judge whether GB is possible at 6 points or whether a protection pulse must be output. I can do it.

なお、半導体素子のT、温度を連続的に算出する方法は
、第1図に述べた例に限定されず、他の方法でもよい。
Note that the method of continuously calculating T and temperature of the semiconductor element is not limited to the example described in FIG. 1, and other methods may be used.

例えば、直接半導体素子のポスト面に測温抵抗体を埋込
み検出してもよい。
For example, a resistance temperature detector may be directly embedded in the post surface of the semiconductor element for detection.

本実施例によれば、半導体素子のT、温度を常時把握す
る事が出来るため、過電流発生時に適切なゲート運用に
よる保護を行うことが出来る。
According to this embodiment, since T and temperature of the semiconductor element can be constantly monitored, protection can be performed by appropriate gate operation when an overcurrent occurs.

すなわち、GB可能なT、温度以下であれば1 GBL正常運転に復帰する。またGB不可能なT、温度
まで上昇してしまっていれば、T、保護パルスを出力し
点弧させる事で半導体素子を保護しながら過電流のおさ
まるのを待ち、T、温度が下るのを検出してGBを行い
正常運転に復帰する。
That is, if the temperature is below T, which is possible for GB, 1 GBL returns to normal operation. In addition, if the temperature has risen to a point where GB is impossible, output a protective pulse and ignite it to protect the semiconductor element while waiting for the overcurrent to subside and wait for the temperature to drop. Detected, performs GB and returns to normal operation.

これらのゲート運用により半導体装置として予111]
1されない過電流に対してもT、温度を検出して保護を
行うことが可能となっている。
By operating these gates, it can be used as a semiconductor device.
It is also possible to detect T and temperature to protect against overcurrents that do not occur.

[発明の効果] 以上の説明から明らかなように本発明は半導体素子の接
合部温度を監視することにより過電流が生じた場合、半
導体素子の状態に適したゲート運用を行い信頼性の高い
過電流保護装置を提供することができる。
[Effects of the Invention] As is clear from the above description, the present invention monitors the junction temperature of a semiconductor element, and when an overcurrent occurs, performs gate operation appropriate to the state of the semiconductor element to achieve highly reliable overcurrent. A current protection device can be provided.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の実施例の構成を示すブロック図、第2
図は系統電圧安定化用無効電力補償装置の回路図、第3
図は第2図に示す装置の系統電圧喪失時の電流、T、温
度の変化を表す図である。 1・・・半導体装置、  2 2・・・光点弧サイリスタ、 3・・・抵抗器、 4・・・逆電圧検出器、 5・・・光ファイバー 6・・・受光ランプ、 7・・・逆電圧印加時間検出回路、 8・・・ターンオフタイム設定器、 11・・・ゲート回路、 13・・・強制点弧回路、 14・・・接合部温度算出回路、 18・・・接合部温度検出回路、 21・・・ナンド回路、 22.23・・・アンド回路。
FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention, and FIG.
The figure is a circuit diagram of a reactive power compensator for system voltage stabilization.
The figure is a diagram showing changes in current, T, and temperature when the system voltage is lost in the device shown in FIG. 2. DESCRIPTION OF SYMBOLS 1...Semiconductor device, 2...Light ignition thyristor, 3...Resistor, 4...Reverse voltage detector, 5...Optical fiber 6...Light receiving lamp, 7...Reverse Voltage application time detection circuit, 8... Turn-off time setter, 11... Gate circuit, 13... Forced ignition circuit, 14... Junction temperature calculation circuit, 18... Junction temperature detection circuit , 21... NAND circuit, 22.23... AND circuit.

Claims (1)

【特許請求の範囲】[Claims] ターンオフするのに必要な逆電圧が印加されていないと
き半導体素子に強制点弧保護パルスを出力する半導体装
置の過電流保護回路において、前記逆電圧の印加を検出
する逆電圧印加時間検出回路と、前記半導体素子の接合
部温度を検出する温度検出回路と、この温度検出回路と
前記逆電圧印加時間検出回路の出力に基づき前記強制点
弧保護パルスを正規運転のゲート信号に切り換えて出力
するゲート回路とを備えたことを特徴とする半導体装置
の過電流保護装置。
In an overcurrent protection circuit for a semiconductor device that outputs a forced ignition protection pulse to a semiconductor element when a reverse voltage necessary for turning off is not applied, a reverse voltage application time detection circuit that detects application of the reverse voltage; a temperature detection circuit that detects the junction temperature of the semiconductor element; and a gate circuit that switches the forced ignition protection pulse to a gate signal for normal operation based on the outputs of the temperature detection circuit and the reverse voltage application time detection circuit and outputs the gate signal. An overcurrent protection device for a semiconductor device, comprising:
JP7891290A 1990-03-29 1990-03-29 Over-current protection device of semiconductor device Pending JPH03284165A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7891290A JPH03284165A (en) 1990-03-29 1990-03-29 Over-current protection device of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7891290A JPH03284165A (en) 1990-03-29 1990-03-29 Over-current protection device of semiconductor device

Publications (1)

Publication Number Publication Date
JPH03284165A true JPH03284165A (en) 1991-12-13

Family

ID=13675058

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7891290A Pending JPH03284165A (en) 1990-03-29 1990-03-29 Over-current protection device of semiconductor device

Country Status (1)

Country Link
JP (1) JPH03284165A (en)

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