JPH03278565A - Hybrid integrated circuit device - Google Patents

Hybrid integrated circuit device

Info

Publication number
JPH03278565A
JPH03278565A JP7922590A JP7922590A JPH03278565A JP H03278565 A JPH03278565 A JP H03278565A JP 7922590 A JP7922590 A JP 7922590A JP 7922590 A JP7922590 A JP 7922590A JP H03278565 A JPH03278565 A JP H03278565A
Authority
JP
Japan
Prior art keywords
recess
circuit board
sides
hybrid integrated
integrated circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7922590A
Other languages
Japanese (ja)
Inventor
Naoharu Senba
仙波　直治
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP7922590A priority Critical patent/JPH03278565A/en
Publication of JPH03278565A publication Critical patent/JPH03278565A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]

Landscapes

  • Parts Printed On Printed Circuit Boards (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Abstract

PURPOSE:To make it possible to mount a component, which is influenced by laser beam, on the opposite face from that irradiated with the laser beam, by making a recess deeper than the maximum height of component in one or both circuit boards and then mounting a bare chip and wire bonding components in the recess. CONSTITUTION:Circuit boards 11 are formed on both faces of a metallic heat sink 5 and an external lead 1 and a recess or recesses are made in one or both of the circuit boards 11. The recess is made deeper than the maximum height of component to be mounted. Passive elements 6 and active elements 10 and the like are then mounted and connected through thin metallic wires 8. Passive elements 6, active elements 10 and the like are also mounted on the other circuit board 11 and connected through thin metallic wires 8. It is finally sealed with resin in mold 2.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は混成集積回路装置に関するものである。[Detailed description of the invention] [Industrial application field] The present invention relates to hybrid integrated circuit devices.

〔従来の技術〕[Conventional technology]

従来の技術は、第２図に示すように金属製ヒートシンク
５および外部リード１の両面に回路基板２１を形成し、
外部リードと回路基板の接続はスルーホール３における
メツキを行い、この回路基板の上面にのみ受動、能動等
６，１０の部品を搭載し、金属細線８等を用いて、回路
接続を実態し、樹脂封止２を行っていた。また機能トリ
ミング時の他素子へのレーザー光の影響防止は黒色のＪ
ＣＲ等を塗布していた。In the conventional technology, as shown in FIG. 2, a circuit board 21 is formed on both sides of a metal heat sink 5 and an external lead 1.
The connection between the external leads and the circuit board is made by plating through holes 3, and 6 and 10 components such as passive and active are mounted only on the top surface of this circuit board, and the circuit connection is made using thin metal wires 8, etc. Resin sealing 2 was performed. In addition, black J is used to prevent the influence of laser light on other elements during functional trimming.
It was coated with CR etc.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述した従来の技術は金属製ヒートシンクおよび外部リ
ードの両面に配置された回路基板には凹部が設けられて
いないため、ベアチップ＋ワイヤーボンディング構成品
等の両面搭載を実態した場合、ベアチップへのストレス
及びワイヤー等にダメージを与えて不良品になってしま
うという欠点がある。また、機能トリミングについては
、レーザー光防止のためにＪＣＢ等を用いた場合、回路
基板材、ＪＣＢ、金属細線、外装樹脂等の扇膨張係数差
等が影響し、信頼性品質面が低くなさという欠点があっ
た。In the conventional technology described above, the metal heat sink and the circuit board placed on both sides of the external lead do not have recesses, so if bare chips and wire bonding components are mounted on both sides, stress on the bare chips and It has the disadvantage that it damages the wire etc., resulting in a defective product. Regarding functional trimming, when JCB etc. are used to prevent laser beams, the reliability and quality are not low due to differences in fan expansion coefficients of circuit board materials, JCB, thin metal wires, exterior resin, etc. There were drawbacks.

〔発明の従来技術に対する相違点〕[Differences between the invention and the prior art]

上述した従来の技術に対し本発明は金属製ヒートシンク
および外部リードの両面に回路基板を天成し、両方ある
いは片方の回路基板に搭載部品シ最大高さ寸法より深い
寸法の凹部な設け、この円部にベアチップ＋ワイヤーボ
ンディング構成品哨を搭載することによりベアチップ士
ワイヤーボンディング構成品についても両面搭載を可能
にしたという相違点がある。機能トリミングを要する品
種については、上述した構造を用いることによりレーザ
ー光に影響のある部品をレーザー光照射面の反対面に搭
載できるという相違点がある。In contrast to the above-mentioned conventional technology, the present invention forms a circuit board on both sides of a metal heat sink and an external lead, and provides a recess on both or one of the circuit boards with a dimension deeper than the maximum height dimension of the mounted component. The difference is that by installing a bare chip + wire bonding component guide on the 2018, it is now possible to mount both bare chip and wire bonding components on both sides. For products that require functional trimming, there is a difference in that by using the above-described structure, parts that are affected by laser light can be mounted on the opposite surface to the laser light irradiation surface.

〔課題を解決するための手段〕[Means to solve the problem]

本発明の技術は金属製ヒートシンクおよび外部リードの
両面に回路基板を形成し、両方あるいは片方の回路基板
に搭載部品の最大高さ寸法より深い寸法の凹部を設けた
ことにより、この凹部にベアチップ士ワイヤーボンディ
ング構成品を搭載してもワイヤー高さが凹部上面より高
くならない。The technology of the present invention forms circuit boards on both sides of a metal heat sink and external leads, and provides a recess in both or one of the circuit boards that is deeper than the maximum height of the mounted components. Even when a wire bonding component is mounted, the wire height does not become higher than the top surface of the recess.

従って、ベアチップ士ワイヤーボンディング構成品の搭
載面を下面側にしても安全であり、この状態でさらに反
対の上面側にもベアチップ士ワイヤーボンディング構成
品を搭載することが可能である。機能トリミングを要す
る品種は上述した構造を用いてレーザー光に影響のある
部品をレーザー光照射面と反対面に搭載する。Therefore, it is safe even if the bare chip wire bonding component is mounted on the lower surface side, and in this state, it is possible to further mount the bare chip wire bonding component on the opposite upper surface side. For products that require functional trimming, parts that are affected by laser light are mounted on the opposite side to the laser light irradiation surface using the above-mentioned structure.

〔実施例〕〔Example〕

第１図は本発明の一実施例を示す断面図である。 FIG. 1 is a sectional view showing an embodiment of the present invention.

金属製のヒートシンク５および外部リード１０両面に回
路基板１１を形成する。回路基板１１の両方あるいは片
方に凹部１２を設け、受動素子６゜能動素子１０等を搭
載し、金属細線８等を用いて回路接続する。次にもう片
方の回路基板１１に受動素子６．能動素子１０等を搭載
し、金属細線８等を用いて回路接続する。最後にモール
ド２により樹脂封止する。機能トリミング品はレーザー
光９に影響のないレーザー光９の照射面と反対面の回路
基板に受動素子６．能動素子１０等を搭載する。A circuit board 11 is formed on both sides of a metal heat sink 5 and external leads 10. A recess 12 is provided in both or one side of the circuit board 11, a passive element 6°, an active element 10, etc. are mounted thereon, and a circuit is connected using a thin metal wire 8, etc. Next, passive elements 6. are mounted on the other circuit board 11. An active element 10 or the like is mounted, and a circuit is connected using a thin metal wire 8 or the like. Finally, resin sealing is performed using mold 2. The functionally trimmed product has a passive element 6 on the circuit board on the opposite side to the surface irradiated with the laser beam 9, which does not affect the laser beam 9. It is equipped with 10 active elements.

Ｃ発明の効果〕 以上説明したように本発明は金属製のヒートシンクある
いは外部リードの両面に形成した回路基板の両方あるい
は片方に搭載部品の最大高さより深い凹部を設け、この
凹部にベアチップ士ワイヤーボンディング構成品を搭載
することにより、ベアチップ士ワイヤーボンディング構
成品についても特性に影響なく、両面搭載を実施できる
効果がある。C. Effects of the Invention As explained above, the present invention provides a recess deeper than the maximum height of the mounted components in both or one of the circuit boards formed on both sides of a metal heat sink or external lead, and bare chip wire bonding is performed in this recess. By mounting the components, bare chip wire bonding components can also be mounted on both sides without affecting their characteristics.

機能トリミング品についても上述の構造を用いてレーザ
ー光に影響のある受動、能動素子等をレーザー光照射面
と反対面に搭載できる。従ってレーザー光に影響のない
トリミングが可能であるとともに信頼性品質面について
も高いレベルが確保できるという効果がある。For functionally trimmed products, the above-described structure can also be used to mount passive and active elements that affect laser light on the surface opposite to the laser light irradiation surface. Therefore, it is possible to perform trimming without affecting the laser beam, and a high level of reliability and quality can be ensured.

【図面の簡単な説明】[Brief explanation of drawings]

第１図は本発明の一実施例を示す断面図である。 第２図は従来技術の断面図である。 ｌ・・・・・・外部リード、２・・・・・・モールド、
３・・・・・・スルーホール、４・・・・・・スルーホ
ールメッキ、５・・・・・・ヒートシンク、６・・・・
・・受動素子、７・・・・・・回路パターン、８・・・
・・・金属細線、９・・・・・・レーザー光、１０・・
・・・・能動素子、１１．２１・・・・・回路基板、１
２・・・・・・凹部。FIG. 1 is a sectional view showing one embodiment of the present invention. FIG. 2 is a sectional view of the prior art. l...external lead, 2...mold,
3...Through hole, 4...Through hole plating, 5...Heat sink, 6...
...Passive element, 7...Circuit pattern, 8...
...Thin metal wire, 9...Laser light, 10...
...Active element, 11.21 ...Circuit board, 1
2... Concavity.

Claims (2)

【特許請求の範囲】[Claims] （１）金属製ヒートシンクおよび外部リードの両面に回
路基板を形成し、この回路基板と外部リードの接合にス
ルーホールメッキを用いた混成集積回路装置において、
両面に形成された回路基板の両方あるいは片方に搭載部
品の最大高さより深い凹部を設け、この凹部に部品搭載
し、両面にベアチップ＋ワイヤーボンディング構成品を
搭載したことを特徴とする混成集積回路装置。(1) In a hybrid integrated circuit device in which a circuit board is formed on both sides of a metal heat sink and an external lead, and through-hole plating is used to connect the circuit board and the external lead,
A hybrid integrated circuit device characterized in that both or one of the circuit boards formed on both sides has a recess deeper than the maximum height of the mounted components, the components are mounted in the recess, and bare chips and wire bonding components are mounted on both sides. . （２）機能トリミングを要し、レーザー光に影響のある
受動、能動等の部品搭載をレーザー光照射面と反対面の
回路基板に搭載し機能トリミング回路接続・樹脂封止し
たことを特徴とする特許請求の範囲第（１）項記載の混
成集積回路装置。(2) Passive and active components that require functional trimming and that affect the laser beam are mounted on the circuit board on the opposite side of the laser beam irradiation surface, and the functional trimming circuit is connected and resin-sealed. A hybrid integrated circuit device according to claim (1).
JP7922590A 1990-03-28 1990-03-28 Hybrid integrated circuit device Pending JPH03278565A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7922590A JPH03278565A (en) 1990-03-28 1990-03-28 Hybrid integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7922590A JPH03278565A (en) 1990-03-28 1990-03-28 Hybrid integrated circuit device

Publications (1)

Publication Number Publication Date
JPH03278565A true JPH03278565A (en) 1991-12-10

Family

ID=13683966

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7922590A Pending JPH03278565A (en) 1990-03-28 1990-03-28 Hybrid integrated circuit device

Country Status (1)

Country Link
JP (1) JPH03278565A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2003007374A1 (en) * 2001-07-12 2003-01-23 Hitachi, Ltd. Hybrid module
WO2004027949A1 (en) * 2002-08-29 2004-04-01 Sony Corporation Semiconductor device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2003007374A1 (en) * 2001-07-12 2003-01-23 Hitachi, Ltd. Hybrid module
WO2004027949A1 (en) * 2002-08-29 2004-04-01 Sony Corporation Semiconductor device
US7180164B2 (en) 2002-08-29 2007-02-20 Sony Corporation Semiconductor device
CN100411261C (en) * 2002-08-29 2008-08-13 索尼株式会社 Semiconductor device

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