JPH03182794A - Plural display control system - Google Patents

Plural display control system

Info

Publication number
JPH03182794A
JPH03182794A JP1321401A JP32140189A JPH03182794A JP H03182794 A JPH03182794 A JP H03182794A JP 1321401 A JP1321401 A JP 1321401A JP 32140189 A JP32140189 A JP 32140189A JP H03182794 A JPH03182794 A JP H03182794A
Authority
JP
Japan
Prior art keywords
display
control circuit
display control
display device
frame memories
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1321401A
Other languages
Japanese (ja)
Inventor
Haruo Fukuchi
福地　春雄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP1321401A priority Critical patent/JPH03182794A/en
Publication of JPH03182794A publication Critical patent/JPH03182794A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To construct at a low cost a multi-work station, etc., for controlling plural sets of display devices by a single display control circuit by providing a frame memory for switching and writing successively display data at every vertical synchronization and using a character generating circuit, etc., in common by plural display devices. CONSTITUTION:Each display device 4a - 4n is provided with frame memories 3a - 3n, respectively, an access position of a display memory is changed at every vertical synchronization, and display data of each display device 4a - 4n are generated, brought to write permission in the corresponding frame memories and stored therein. Each display device 4a - 4n reads out and displays the corresponding frame memories 3a - 3n. In such a way, by providing the frame memories 3a - 3n so as to correspond to the display devices 4a - 4n, plural sets of display devices 4a - 4n can be controlled by a single display control circuit. Accordingly, the display control circuit can be formed at a low cost without complicating it.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 ワークスティジョン等の表示装置における複数表示制御
方式に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a multiple display control method in a display device such as a work station.

〔従来の技術〕[Conventional technology]

従来の装置は、特開昭６３−６２４６５号公報に記載の
ように、当表示装置は表示データに表示アドレス情報を
合成出力し、表示装置側で合成された表示アドレス情報
を解析している為１回路が複雑となっていた。In the conventional device, as described in Japanese Patent Laid-Open No. 63-62465, this display device synthesizes display address information with display data and outputs it, and analyzes the synthesized display address information on the display device side. One circuit was complicated.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

従来の表示制御において、キャラクタジェネレート回路
は表示装置に固有のものであった。In conventional display control, the character generation circuit is unique to the display device.

本発明は、キャラクタジェネレート回路等を複数の表示
装置で共有することを目的としている。An object of the present invention is to share a character generation circuit and the like among a plurality of display devices.

〔課題を解決するための手段〕[Means to solve the problem]

上記目的を達成する為に、各表示装置にそれぞれフレー
ムメモリを設ける。In order to achieve the above object, each display device is provided with a frame memory.

垂直同期ことに表示メモリのアクセス位置をかえ、各表
示装置の表示データをジェネレートし対応するフレーム
メモリに書込み許可し格納する。In vertical synchronization, the access position of the display memory is changed, display data for each display device is generated, and writing is permitted and stored in the corresponding frame memory.

各々の表示装置は対応するフレームメモリを読み出し表
示する。Each display device reads and displays the corresponding frame memory.

〔作用〕[Effect]

表示装置に対応してフレームメモリをもつことにより、
ひとつの表示制御回路で複数台の表示装置を制御するこ
とができるため、表示制御回路を複雑にすることなく安
価に実現することができる。By having a frame memory corresponding to the display device,
Since a plurality of display devices can be controlled with one display control circuit, the display control circuit can be realized at low cost without being complicated.

〔実施例〕〔Example〕

以下、本発明を第１図により説明する。 The present invention will be explained below with reference to FIG.

表示データ作成回路１より出力される同期信号６（垂直
同期信号）のタイミングごとに表示メモリ、フレームメ
モリ切換回路２で、表示メモリ切換指令５．フレームメ
モリ書込指令８　ａ−ｎを出力する。表示データ作成回
路工は、表示メモリ切換指令５により表示メモリを切換
え、表示データ７をフレームメモリ書込データとして出
力する。At each timing of the synchronization signal 6 (vertical synchronization signal) output from the display data creation circuit 1, the display memory/frame memory switching circuit 2 issues a display memory switching command 5. Output frame memory write command 8 a-n. The display data creation circuit engineer switches the display memory according to the display memory switching command 5 and outputs the display data 7 as frame memory write data.

表示データ作成回路１は、垂直同期信号を境に変わった
表示データ７を出力することになる。The display data generation circuit 1 outputs display data 7 that changes at the vertical synchronization signal.

フレームメモリ書込指令８　ａ−ｎを入力したフレーム
メモリ３　ａ−ｎは表示データ作成回路（より出力され
ている表示データ７を書込む。フレームメモリ３　ａ−
ｎのいずれか１つが垂直同期信号を境に必ず表示データ
７を書込んでいることになる。The frame memory 3 a-n into which the frame memory write command 8 a-n is input writes the display data 7 output from the display data creation circuit (frame memory 3 a-
Display data 7 is always written in any one of n at the vertical synchronization signal.

表示袋！　４　ａ−ｎは、フレームメモリ３　ａ−ｎよ
り出力される表示データ９　ａ−ｎを各々表示する。Display bag! 4 a-n respectively display display data 9 a-n output from the frame memory 3 a-n.

〔発明の効果〕〔Effect of the invention〕

本発明によれば、ひとつの表示制御回路で複数台の表示
装置を制御するマルチワークスティジョン等が安価に構
築出来る。According to the present invention, a multi-workstation or the like that controls a plurality of display devices with one display control circuit can be constructed at low cost.

【図面の簡単な説明】[Brief explanation of drawings]

第１図は本発明の機能ブロック図を示す。 １・・・表示データ作成回路。 ２・・・表示メモリ、フレームメモリ切換回路。 ３　ａ−ｎ・・・フレームメモリ。 ４　ａ−ｎ・・・表示装置。 ５・・・表示メモリ切換指令。 ６・・・同期信号、　　　　　７・・・表示データ。 ８　ａ−ｎ・・・フレームメモリ書込指令。 ９　ａ−ｎ・・・表示データ。 FIG. 1 shows a functional block diagram of the present invention. 1...Display data creation circuit. 2...Display memory, frame memory switching circuit. 3 a-n...Frame memory. 4 a-n...Display device. 5...Display memory switching command. 6...Synchronization signal, 7...Display data. 8 a-n... Frame memory write command. 9 a-n...Display data.

Claims (1)

【特許請求の範囲】[Claims] １、テキスト制御回路、グラフ制御回路より成る、表示
制御回路において、表示データを垂直同期ごとに順次切
り換えて書き込むフレームメモリを設け、キャラクタジ
ェネレート回路等を複数の表示装置が共用することを特
徴とする複数表示制御方式。1. A display control circuit consisting of a text control circuit and a graph control circuit is provided with a frame memory in which display data is sequentially switched and written every vertical synchronization, and character generation circuits etc. are shared by multiple display devices. Multiple display control method.
JP1321401A 1989-12-13 1989-12-13 Plural display control system Pending JPH03182794A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1321401A JPH03182794A (en) 1989-12-13 1989-12-13 Plural display control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1321401A JPH03182794A (en) 1989-12-13 1989-12-13 Plural display control system

Publications (1)

Publication Number Publication Date
JPH03182794A true JPH03182794A (en) 1991-08-08

Family

ID=18132138

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1321401A Pending JPH03182794A (en) 1989-12-13 1989-12-13 Plural display control system

Country Status (1)

Country Link
JP (1) JPH03182794A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100643432B1 (en) * 2002-10-03 2006-11-10 엔이씨 일렉트로닉스 가부시키가이샤 Apparatus for driving a plurality of display units using common driving circuits

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100643432B1 (en) * 2002-10-03 2006-11-10 엔이씨 일렉트로닉스 가부시키가이샤 Apparatus for driving a plurality of display units using common driving circuits

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