JPH03131058A - Lead frame for semiconductor device - Google Patents

Lead frame for semiconductor device

Info

Publication number
JPH03131058A
JPH03131058A JP1270980A JP27098089A JPH03131058A JP H03131058 A JPH03131058 A JP H03131058A JP 1270980 A JP1270980 A JP 1270980A JP 27098089 A JP27098089 A JP 27098089A JP H03131058 A JPH03131058 A JP H03131058A
Authority
JP
Japan
Prior art keywords
leads
tie bar
tie
resin
lead frame
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1270980A
Other languages
Japanese (ja)
Inventor
Shizukatsu Nakamura
中村　倭勝
Yasuhito Suzuki
康仁 鈴木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP1270980A priority Critical patent/JPH03131058A/en
Publication of JPH03131058A publication Critical patent/JPH03131058A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To prevent the adhesion of resin layers among leads to the leads generated in a tie-bar cutting process by forming a protrusion extended toward the side, where there are one ends of the leads, to a tie bar connecting and fixing at least two leads, one ends of which are connected to a semiconductor chip. CONSTITUTION:One ends of a plurality of leads 2 are bonded with a semiconductor element through bonding wires, and sections among the leads 2 are connected and fastened by tie bars 4. Protrusions 6 extended toward the sides, where there are one ends of the leads 2, are shaped to the tie bars 4. The protrusions 6 are prepared by etching or a press at the time of the manufacture of a lead frame. When the semiconductor element is resin-sealed, the state in which the protrusions 6 are bit into resins 3 among the leads, which are flowed out to the outside and solidified, is realized. When a tie-bar cutting punch 5 is abutted against the sections of the tie bars 4 and the tie bars 4 are cut, integral substances 40 in which resin layers 3a among the leads and tie bar layers 4a are unified are not separated mutually, and are introduced into a dust attraction port 8. Accordingly, no scum rising of the resin layers 3a among the leads is generated.

Description

【発明の詳細な説明】 ［産業上の利用分野］ この発明は一般に半導体装置用リードフレームに関する
ものであり、特に、タイバーカット工程で生じる、リー
ドへの樹脂屑の付着、を防止できるように改良された、
半導体装置用リードフレームに関するものである。[Detailed Description of the Invention] [Industrial Application Field] The present invention generally relates to lead frames for semiconductor devices, and in particular, improvements have been made to prevent resin debris from adhering to leads during the tie bar cutting process. was done,
The present invention relates to lead frames for semiconductor devices.

［従来の技術］ 第５図は、プラスチックデバイスの構造と構成部材を示
した概念図である。図を参照して、半導体素子はボンデ
ィングワイヤによって、リードフレーム２の一端に接続
された状態で、樹脂パッケージ１に封じ込められている
。[Prior Art] FIG. 5 is a conceptual diagram showing the structure and constituent members of a plastic device. Referring to the figure, a semiconductor element is sealed in a resin package 1 while being connected to one end of a lead frame 2 by bonding wires.

次に、上述のようなプラスチックデバイスを製造する方
法について説明する。Next, a method for manufacturing the above-described plastic device will be described.

第６図は、半導体素子を樹脂封止した後のリードフレー
ムの様子を示した平面図である。図示されていないが、
複数個のリード２の一方端は、ボンディングワイヤを介
して半導体素子に接続されている。リード２とリード２
は、タイバー４により連結固定されている。タイバー４
は、樹脂封止前のり−ド２を連結固定するための板部材
であり、樹脂封止後は、リード２が樹脂１で固定される
ため、不要となるものである。このタイバー４を切断す
ることによって、それぞれのり−ド２が電気端子の働き
をするようになる。また、樹脂をトランスファモールド
としたとき、樹脂は樹脂パッケージ１を充填して、さら
に外に流れ出る（流れ出て固まった樹脂を、以下、リー
ド間樹脂３と呼ぶ。FIG. 6 is a plan view showing the state of the lead frame after the semiconductor element is sealed with resin. Although not shown,
One ends of the plurality of leads 2 are connected to the semiconductor element via bonding wires. lead 2 and lead 2
are connected and fixed by tie bars 4. tie bar 4
is a plate member for connecting and fixing the lead 2 before resin sealing, and is unnecessary after resin sealing because the lead 2 is fixed with the resin 1. By cutting the tie bars 4, each glue board 2 functions as an electrical terminal. Furthermore, when the resin is transfer molded, the resin fills the resin package 1 and further flows out (the resin that flows out and hardens is hereinafter referred to as the inter-lead resin 3).

）が、これを富士める働きをするのも、このタイバー４
である。), but it is this tie bar 4 that functions to limit this.
It is.

次に、タイバー４の切断工程を説明する。第７図は、タ
イバーを切断するタイバーカット金型の概略断面図であ
る。タイバーカット金型はタイバーカットバンチ５とタ
イバーカット下金型７とを備える。タイバーカット下金
型７の下部には、吸塵口８が設けられる。第６図および
第７図を参照して、タイバーカット下金型７上に、樹脂
封止後のプラスチックデバイスを裁せ、リード間樹脂３
を含むタイバー４の部分にタイバーカットバンチ５を当
接し、タイバー４をカットする。カットされて生じたタ
イバ屑４ａは、吸塵口８の中に入り、除去される。この
タイバー４の切断により、それぞれのリード２は分離さ
れ、電気端子の働きをするようになる。Next, the process of cutting the tie bar 4 will be explained. FIG. 7 is a schematic cross-sectional view of a tie bar cutting die for cutting tie bars. The tie bar cutting mold includes a tie bar cutting bunch 5 and a tie bar cutting lower mold 7. A dust suction port 8 is provided at the lower part of the tie bar cut lower mold 7. Referring to FIGS. 6 and 7, cut the plastic device after resin sealing onto the tie bar cut lower mold 7, and place the resin 3 between the leads.
A tie bar cutting bunch 5 is brought into contact with the portion of the tie bar 4 including the tie bar 4, and the tie bar 4 is cut. The tie bar waste 4a generated by the cutting enters the dust suction port 8 and is removed. By cutting the tie bar 4, each lead 2 is separated and functions as an electrical terminal.

［発明が解決しようとする課題］ 従来のリードフレームは以上のように構成されていたの
で、以下に述べる問題点があった。[Problems to be Solved by the Invention] Since the conventional lead frame was configured as described above, there were problems described below.

すなわち、第７図を参照して、タイバー４をカットした
際、タイバー屑４ａは吸塵口８に入るが、リード間樹脂
屑３ａは軽いので、タイバー屑４と分離し、かす上がり
（タイバーカットバンチ５によって引き上げられること
）を起こす。かす上がりしたリード間樹脂屑３ａは金型
内に飛び散って、タイバーカット金型の表面に付着する
。すると、次の半導体装置用リードフレームが金型内に
セットされて、タイバー４が切断される際に、このリー
ド間樹脂屑３ａがリード２の表面に圧着される。That is, referring to FIG. 7, when the tie bar 4 is cut, the tie bar waste 4a enters the dust suction port 8, but since the inter-lead resin waste 3a is light, it is separated from the tie bar waste 4 and scraps rise (tie bar cut bunch). (to be lifted up by 5). The resin debris 3a between the leads that has risen is scattered into the mold and adheres to the surface of the tie bar cutting mold. Then, when the next lead frame for a semiconductor device is set in the mold and the tie bar 4 is cut, the inter-lead resin waste 3a is pressed onto the surface of the lead 2.

リード２の上に圧着されたリード間樹脂屑３ａは、最終
仕上り製品である半導体装置の外観不良、リード端子の
電気的接触不良の原因となり、問題である。The inter-lead resin debris 3a crimped onto the leads 2 is a problem because it causes poor appearance of the final finished product, the semiconductor device, and poor electrical contact between the lead terminals.

この発明は上記のような問題点を解決するためになされ
たもので、タイバーカット工程で生じる、リードへのリ
ード間樹脂屑の付着を、防止できるように改良された、
半導体装置用リードフレームを提供することを目的とす
る。This invention was made to solve the above-mentioned problems, and has been improved to prevent resin debris from adhering to the leads during the tie bar cutting process.
The purpose of the present invention is to provide a lead frame for semiconductor devices.

［課題を解決するための手段］ この発明にかかる半導体装置用リードフレームは、その
一方端が半導体チップに接続される少なくとも２本のリ
ードと、上記少なくとも２本のリードを連結固定するタ
イバーと、を備えている。[Means for Solving the Problems] A lead frame for a semiconductor device according to the present invention includes at least two leads whose one ends are connected to a semiconductor chip, a tie bar that connects and fixes the at least two leads, It is equipped with

そして、上記問題点を解決するために、上記タイバーに
は、上記リードの一方端が存在する側に向かって延びる
突起が設けられている。In order to solve the above problem, the tie bar is provided with a protrusion extending toward the side where one end of the lead is present.

［作用］ 第１図を参照して、リード２の一方端が存在する側に向
かって延びる突起６がタイバー４に設けられているので
、リード２の一方端に半導体素子を接続した後、半導体
素子を樹脂封止すると、外へ流れ出て固まったリード間
樹脂３の内部に突起６が食込んだ状態が実現する。この
ような状態になったもののタイバ４をタイバーカット金
型で切断すると、第３図および第４図を参照して、リー
ド間樹脂屑３ａとタイバー屑４ａとが一体化してなる一
体物４０が、吸塵口８に入る。したがって、リード間樹
脂屑３ａのかす上がりは生じない。[Function] Referring to FIG. 1, the tie bar 4 is provided with a protrusion 6 that extends toward the side where one end of the lead 2 is located. When the element is sealed with resin, a state is realized in which the protrusion 6 bites into the inside of the inter-lead resin 3 which flows out and hardens. When the tie bar 4 in such a state is cut using a tie bar cut mold, an integrated object 40 is obtained in which the inter-lead resin waste 3a and the tie bar waste 4a are integrated, as shown in FIGS. 3 and 4. , enters the dust suction port 8. Therefore, the resin debris 3a between the leads does not rise.

［実施例］ 以下、この発明の一実施例を図について説明するが、本
発明はこれに限定されるものでない。[Example] Hereinafter, an example of the present invention will be described with reference to the drawings, but the present invention is not limited thereto.

第１図は、半導体素子を樹脂封止した後の、本発明の一
実施例にかかるリードフレームの様子を示した平面図で
あり、第２図は第１図における■−■線に沿う断面図で
ある。これらの図には示されていないが、複数個のリー
ド２の一方端は、ボンディングワイヤを介して、半導体
素子に接続されている。リード２とリード２は、タイバ
ー４により連結固定されている。タイバー４には、リー
ド２の一方端が存在する側に向かって延びる突起６が設
けられている。突起６は、リードフレームを作る際のエ
ツチングまたはプレスで作成される。FIG. 1 is a plan view showing a lead frame according to an embodiment of the present invention after a semiconductor element is encapsulated with resin, and FIG. 2 is a cross-sectional view taken along the line ■-■ in FIG. It is a diagram. Although not shown in these figures, one ends of the plurality of leads 2 are connected to the semiconductor element via bonding wires. The leads 2 are connected and fixed by tie bars 4. The tie bar 4 is provided with a protrusion 6 extending toward the side where one end of the lead 2 is present. The protrusions 6 are created by etching or pressing when making the lead frame.

タイバー４にこのような突起６が設けられていると、半
導体素子を樹脂封止したとき、第１図および第２図に示
すように、外へ流れ出て固まったリード間樹脂３の内部
に突起６が食い込んだ状態が実現する。If such a protrusion 6 is provided on the tie bar 4, when a semiconductor element is sealed with resin, the protrusion will flow out and form inside the solidified inter-lead resin 3, as shown in FIGS. 1 and 2. A state where 6 is stuck is realized.

次に、このように突起６が食い込んだ状態になったもの
の、タイバ一部分をタイバーカット金型で切断する工程
を説明する。第３図は、タイバーカット金型の装置を示
した概略断面図であるが、第７図に示す装置と同じであ
り、同一部分には同一の参照番号を付し、その説明を繰
返さない。Next, a process of cutting a portion of the tie bar with the tie bar cut mold even though the protrusion 6 is in the state of being bitten will be described. FIG. 3 is a schematic cross-sectional view showing a tie bar cutting mold apparatus, which is the same as the apparatus shown in FIG. 7, and the same parts are given the same reference numerals and the description thereof will not be repeated.

第１図、第２図および第３図を参照して、タイバーカッ
ト下金型７の上に、樹脂封止後のプラスチックデバイス
を載せ、タイバー４の部分にタイバーカットバンチ５を
当接し、タイバー４をカットする。すると、第３図およ
び第４図を参照して、リード間樹脂屑３ａとタイバー屑
４ａとが一体化してなる一体物４０が、互いに分離せず
に、吸塵口８に入る。したがって、リード間樹脂屑３ａ
のかす上がりは生じない。その結果、従来のように、か
す上がりしたリード間樹脂屑が金型内に飛び散り、次に
セットされたリードフレームの表面に圧着されるという
事態は回避される。Referring to FIGS. 1, 2, and 3, the plastic device sealed with resin is placed on the tie bar cut lower mold 7, the tie bar cut bunch 5 is brought into contact with the tie bar 4, and the tie bar Cut 4. Then, referring to FIGS. 3 and 4, an integrated body 40 formed by integrating the inter-lead resin waste 3a and the tie bar waste 4a enters the dust suction port 8 without being separated from each other. Therefore, the resin waste 3a between the leads
No scum buildup occurs. As a result, it is possible to avoid the situation in which the resin debris between the leads is scattered into the mold and is pressed onto the surface of the lead frame that is set next, as is the case in the prior art.

［発明の効果］ 以上説明したとおり、この発明によれば、リード間樹脂
屑が金型内に飛び散らないので、従来観察されていた、
最終仕上り製品である半導体装置の外観不良あるいはリ
ード端子の電気的接触不良という事態は回避され、信頼
性の高い半導体装置が得られるという効果を奏する。[Effects of the Invention] As explained above, according to the present invention, resin debris between the leads does not scatter into the mold, so that
A situation in which a semiconductor device, which is a final finished product, has a defective appearance or a poor electrical connection of a lead terminal is avoided, and a highly reliable semiconductor device can be obtained.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は、半導体素子を樹脂封止した後の、本発明の一
実施例にかかるリードフレームの様子を示した平面図で
ある。 第２図は、第１図における■−■線に沿う断面図である
。 第３図は、実施例にかかるリードフレームのタイバーの
、タイバーカット金型による切断の様子を示した断面図
である。 第４図は、切断されて生じた、リード間樹脂屑とタイバ
ー屑とが一体化してなる一体物の平面図である。 第５図は、プラスチックデバイスの構造と構成部材を示
した概念図である。 第６図は、半導体素子を樹脂封止した後の、従来のリー
ドフレームの様子を示した平面図である。 第７図は、従来のリードフレームのタイバーの、タイバ
ーカット金型による切断の様子を示した断面図である。 図において、 突起である。 なお、各図中、 を示す。 ２はリード、 ４はタイバー、 ６は 同一符号は同一または相当部分 代 理 人 第３図 第４図 ＮＴｌ５　　ψ 第５図 第６図 第７図FIG. 1 is a plan view showing a lead frame according to an embodiment of the present invention after a semiconductor element is sealed with resin. FIG. 2 is a sectional view taken along the line ■-■ in FIG. 1. FIG. 3 is a sectional view showing how the tie bar of the lead frame according to the example is cut by a tie bar cutting die. FIG. 4 is a plan view of an integrated product in which the resin waste between the leads and the tie bar waste produced by cutting are integrated. FIG. 5 is a conceptual diagram showing the structure and constituent members of the plastic device. FIG. 6 is a plan view showing a conventional lead frame after a semiconductor element is sealed with resin. FIG. 7 is a sectional view showing how a tie bar of a conventional lead frame is cut using a tie bar cutting die. In the figure, it is a protrusion. In addition, in each figure, is shown. 2 is a lead, 4 is a tie bar, and 6 is the same code as the same or equivalent part agent.

Claims (1)

【特許請求の範囲】 　その一方端が半導体素子に接続される少なくとも２本
のリードと、 前記少なくとも２本のリードを連結固定するタイバーと
、 前記タイバーに設けられ、前記リードの一方端が存在す
る側に向かって延びる突起と、 を備えた半導体装置用リードフレーム。[Scope of Claims] At least two leads whose one ends are connected to a semiconductor element; a tie bar that connects and fixes the at least two leads; and one end of the leads is provided on the tie bar. A lead frame for a semiconductor device, comprising a protrusion extending toward the side, and a lead frame for a semiconductor device.
JP1270980A 1989-10-17 1989-10-17 Lead frame for semiconductor device Pending JPH03131058A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1270980A JPH03131058A (en) 1989-10-17 1989-10-17 Lead frame for semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1270980A JPH03131058A (en) 1989-10-17 1989-10-17 Lead frame for semiconductor device

Publications (1)

Publication Number Publication Date
JPH03131058A true JPH03131058A (en) 1991-06-04

Family

ID=17493715

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1270980A Pending JPH03131058A (en) 1989-10-17 1989-10-17 Lead frame for semiconductor device

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JP (1) JPH03131058A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011060806A (en) * 2009-09-07 2011-03-24 Renesas Electronics Corp Tie bar-cutting mold and method for manufacturing semiconductor device using the same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011060806A (en) * 2009-09-07 2011-03-24 Renesas Electronics Corp Tie bar-cutting mold and method for manufacturing semiconductor device using the same

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