JPH02205061A - Lead frame - Google Patents
Lead frameInfo
- Publication number
- JPH02205061A JPH02205061A JP2488689A JP2488689A JPH02205061A JP H02205061 A JPH02205061 A JP H02205061A JP 2488689 A JP2488689 A JP 2488689A JP 2488689 A JP2488689 A JP 2488689A JP H02205061 A JPH02205061 A JP H02205061A
- Authority
- JP
- Japan
- Prior art keywords
- lead frame
- resin
- lead
- leads
- external
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 14
- 239000011347 resin Substances 0.000 abstract description 17
- 229920005989 resin Polymers 0.000 abstract description 17
- 238000007747 plating Methods 0.000 abstract description 7
- 238000007789 sealing Methods 0.000 abstract description 7
- 238000000034 method Methods 0.000 abstract description 3
- 229910052709 silver Inorganic materials 0.000 description 3
- 239000004332 silver Substances 0.000 description 3
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
〔・産業上の利用分野〕
本発明は樹脂封止型半導体装置に用いるリードフレーム
に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a lead frame used in a resin-sealed semiconductor device.
従来、樹脂封止型半導体装置は、そのパッケージ方法が
安価で量産向きであることから、あらゆる半導体装置の
パッケージに適用されてきた。この樹脂封止型半導体装
置に使用されるリードフレームは、半導体チップが搭載
されるアイランドと、この半導体チップの入出力を行な
うリードとを有しており、通常、銅板をプレス加工し、
その表面にめっきが施されている。Conventionally, resin-sealed semiconductor devices have been applied to packages for all kinds of semiconductor devices because the packaging method thereof is inexpensive and suitable for mass production. The lead frame used in this resin-sealed semiconductor device has an island on which a semiconductor chip is mounted and leads for inputting and outputting the semiconductor chip, and is usually made by pressing a copper plate.
Its surface is plated.
第４図は従来の一例を示すリードフレームの平面図であ
る。このリードフレームは、同図に示すように、タイバ
３とフレームに囲んでなる四角形状の平面領域の中央に
半導体チップを搭載するアイランド１と、このアイラン
ド１の周囲を囲むように配置された複数の内部リード２
と、この内部リード２と連なりタイバ３と交叉して外方
に伸びる外部リード５とを有している。このような構成
体が複数個横方向に並んで一つの帯状の板に形成されて
いる。FIG. 4 is a plan view of a lead frame showing a conventional example. As shown in the figure, this lead frame includes an island 1 on which a semiconductor chip is mounted in the center of a rectangular plane area surrounded by tie bars 3 and a frame, and a plurality of islands arranged around the island 1. internal lead 2
and an external lead 5 that is connected to the internal lead 2, intersects with the tie bar 3, and extends outward. A plurality of such structures are arranged laterally and formed into one band-shaped plate.
このリードフレームの中央のアイランド１に半導体チッ
プ（図示せず）を搭載し、半導体チップの電極パ°ツド
とこれに対応する内部リード２を金属細線（図示せず）
で接続し、点線で示す樹脂封止領域４を樹脂封止し、不
要なタイバ及びフレームを切り離し、樹脂封止型半導体
装置が組立られる。A semiconductor chip (not shown) is mounted on the central island 1 of this lead frame, and the electrode pads of the semiconductor chip and the corresponding internal leads 2 are connected using thin metal wires (not shown).
The resin-sealed region 4 shown by the dotted line is sealed with resin, and unnecessary tie bars and frames are separated, and a resin-sealed semiconductor device is assembled.
ま・た、このリードフレームの内部リード２は、金属細
線との接続性を良くするために、通常、金あるいは銀等
のめっきが施され、外部リード５は、はんだ付は性を良
くするために、銀あるいは錫等のめっきが施されている
。In addition, the internal leads 2 of this lead frame are usually plated with gold or silver to improve connectivity with thin metal wires, and the external leads 5 are plated with gold or silver to improve solderability. It is plated with silver or tin.
第５図（ａ＞はリードフレームを樹脂封止した後のタイ
バに隣接する外部リードのところで切断した状態を示す
断面図、第５図（ｂ）は第５図（ａ）の状態のリードフ
レームの外部リードに付着する樹脂を除去した状態を示
す断面図である。上述した従来のリードフレームは、樹
脂封止する際に、モールド金型が、このリードフレーム
のタイバまで型締めすることになるので、上型と下型に
よりタイバ及び外部リード５の一部がつぶされること・
になる。このため、この部分のめっき層８が剥され、樹
脂１０を取り除いた後に、この剥された針状のめっき屑
のひげ９がはみ出し、隣接する外部リード５間を短絡す
るという問題がある。Figure 5 (a) is a sectional view showing the lead frame cut at the external lead adjacent to the tie bar after resin sealing, and Figure 5 (b) is the lead frame in the state shown in Figure 5 (a). FIG. 2 is a cross-sectional view showing a state in which resin adhering to the external leads of the lead frame has been removed.In the conventional lead frame described above, when sealing with resin, the molding die clamps down to the tie bars of this lead frame. Therefore, part of the tie bar and external lead 5 may be crushed by the upper and lower molds.
become. Therefore, after the plating layer 8 in this area is peeled off and the resin 10 is removed, the peeled needle-shaped whiskers 9 of the plating chips protrude, causing a short circuit between adjacent external leads 5.
本発明の目的は、樹脂封止する際の型締め作業で生ずる
めっき屑によりリードが短絡しないリードフレームを提
供することにある。SUMMARY OF THE INVENTION An object of the present invention is to provide a lead frame in which the leads are not short-circuited due to plating debris generated during mold clamping work during resin sealing.
本発明のリードフレームは、タイバとフレームに囲んで
なる四角形状の領域の中央に半導体チップを搭載するア
イランドと、このアイランドの周囲を囲むように配置さ
れた複数の内部リードと、この内部リードと連なりタイ
バと交叉して外方に伸びる外部リードとを有するリード
フレームにおいて、前記外部リードの前記タイバに隣接
するとともに前記内部リードと連なる部分の両側に形成
される表裏面から窪む段差部を備え構成される。The lead frame of the present invention includes an island on which a semiconductor chip is mounted in the center of a rectangular area surrounded by tie bars and a frame, a plurality of internal leads arranged so as to surround this island, and a plurality of internal leads. A lead frame having an external lead that extends outward and intersects with a continuous tie bar, the lead frame having a stepped portion recessed from the front and back surfaces formed on both sides of a portion of the external lead that is adjacent to the tie bar and continuous with the internal lead. configured.
次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.
第１図は本発明による第１の実施例を示す樹脂封止型半
導体装置の平面図、第２図は第１図の一部拡大斜視図で
ある。このリードフレームは、タイバ３に隣接する外部
リード５の部分の両側に表裏面から窪む段差部７を設け
たことである。それ以外は従来と同じである。FIG. 1 is a plan view of a resin-sealed semiconductor device showing a first embodiment of the present invention, and FIG. 2 is a partially enlarged perspective view of FIG. 1. This lead frame is provided with stepped portions 7 recessed from the front and back surfaces on both sides of the portion of the external lead 5 adjacent to the tie bar 3. Other than that, it is the same as before.
第３図（ａ＞はリードフレームを樹脂封止した後のタイ
バに隣接する外部リードのところで切断した状態を示す
断面図、第３図（ｂ）は第３図（ａ）の状態のリードフ
レームの外部リードに付着する樹脂を除去した状態を示
す断面図である。上述のように、段差部７を設けること
により、このリードフレームを樹脂封止した後、第３図
（ａ）に示す樹脂１０ａを取り除いても、第３図（′ｂ
）に示す樹脂１０ｂが段差部７に残り、めっき屑のひげ
が発生することがなくなる。Figure 3 (a) is a sectional view showing the lead frame cut at the external lead adjacent to the tie bar after resin sealing, and Figure 3 (b) is the lead frame in the state shown in Figure 3 (a). 3(a) is a cross-sectional view showing a state in which the resin adhering to the external leads of the lead frame is removed. As described above, after this lead frame is sealed with resin by providing the stepped portion 7, the resin shown in FIG. 3(a) is sealed. Even if 10a is removed, Figure 3 ('b
The resin 10b shown in ) remains on the stepped portion 7, and no plating scraps are generated.
以上説明したように本発明のリードフレームは、タイバ
に隣接する外部リードの両側に表裏面から窪む段差部を
設けることによって、リード間を短絡するめっき屑のひ
げが樹脂封止時に発生ずることがないという効果がある
。As explained above, in the lead frame of the present invention, by providing stepped portions that are recessed from the front and back surfaces on both sides of the external leads adjacent to the tie bars, plating scraps that short-circuit between the leads are generated during resin sealing. The effect is that there is no
第１図は本発明による第１の実施例を示す樹脂封止型半
導体装置の平面図、第２図は第１図の一部拡大斜視図、
第３図（ａ＞及び第・５図（、ａ）は本発明及び従・来
のリードフレームを樹脂封止した後のタイバに隣接する
外部リードのところで切断した状態を示す断面図、第３
図（ｂ）及び第５図（ｂ）は第３図（ａ）及び第５図（
ａ）の状態のり＝ドフレームの外部リードに付着する樹
脂を除去した状態を示す断面図、第４図は従来の一例を
示すリードフレームの平面図で・ある。1 is a plan view of a resin-sealed semiconductor device showing a first embodiment of the present invention; FIG. 2 is a partially enlarged perspective view of FIG. 1;
3(a) and 5(a) are cross-sectional views showing the present invention and the conventional lead frame cut at the external lead adjacent to the tie bar after resin sealing.
Figures (b) and 5(b) are similar to Figures 3(a) and 5(b).
FIG. 4 is a cross-sectional view showing a state in which the resin adhering to the external leads of the glued frame in state a) has been removed, and FIG. 4 is a plan view of a conventional lead frame.
Claims (1)
半導体チップを搭載するアイランドと、このアイランド
の周囲を囲むように配置された複数の内部リードと、こ
の内部リードと連なりタイバと交叉して外方に伸びる外
部リードとを有するリードフレームにおいて、前記外部
リードの前記タイバに隣接するとともに前記内部リード
と連なる部分の両側に形成される表裏面から窪む段差部
を有することを特徴とするリードフレーム。An island on which a semiconductor chip is mounted in the center of a rectangular area surrounded by tie bars and a frame, a plurality of internal leads arranged to surround this island, and an external lead connected to the internal leads and intersecting with the tie bars. A lead frame having an external lead extending in the direction, the lead frame having stepped portions recessed from the front and back surfaces formed on both sides of a portion of the external lead adjacent to the tie bar and continuous with the internal lead. .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2488689A JPH02205061A (en) | 1989-02-02 | 1989-02-02 | Lead frame |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2488689A JPH02205061A (en) | 1989-02-02 | 1989-02-02 | Lead frame |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH02205061A true JPH02205061A (en) | 1990-08-14 |
Family
ID=12150671
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2488689A Pending JPH02205061A (en) | 1989-02-02 | 1989-02-02 | Lead frame |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02205061A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100531422B1 (en) * | 2000-10-11 | 2005-11-28 | 앰코 테크놀로지 코리아 주식회사 | structure of lead frame for fabricating semiconductor package |
-
1989
- 1989-02-02 JP JP2488689A patent/JPH02205061A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100531422B1 (en) * | 2000-10-11 | 2005-11-28 | 앰코 테크놀로지 코리아 주식회사 | structure of lead frame for fabricating semiconductor package |
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