JPH03121528A - Power source control system for image display device - Google Patents

Power source control system for image display device

Info

Publication number
JPH03121528A
JPH03121528A JP26049989A JP26049989A JPH03121528A JP H03121528 A JPH03121528 A JP H03121528A JP 26049989 A JP26049989 A JP 26049989A JP 26049989 A JP26049989 A JP 26049989A JP H03121528 A JPH03121528 A JP H03121528A
Authority
JP
Japan
Prior art keywords
image display
display device
power source
source control
power
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP26049989A
Other languages
Japanese (ja)
Inventor
Yoshihiro Hagiwara
萩原　佳博
Hiroki Nagao
裕樹 永尾
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
NEC Engineering Ltd
Original Assignee
NEC Corp
NEC Engineering Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, NEC Engineering Ltd filed Critical NEC Corp
Priority to JP26049989A priority Critical patent/JPH03121528A/en
Publication of JPH03121528A publication Critical patent/JPH03121528A/en
Pending legal-status Critical Current

Links

Landscapes

  • Digital Computer Display Output (AREA)

Abstract

PURPOSE:To eliminate unnecessary power consumption and to prevent a cathode- ray tube from being burnt by turning off the power source of the image display device unless an image display changes for a certain time. CONSTITUTION:When a central processing part 3 writes data in an image display data storage memory part 4, a memory access monitor part 5 recognizes this processing and outputs an access recognition signal 13 to a power source control part 6. The power source control part 6 counts up repeatedly with a clock signal 14 and outputs a power-OFF signal to the image display device power source 7 when the counted value reaches a certain proper numeral. Then, when the memory access monitor part 5 outputs the access recognition signal 13 to the power source control part 6, the counted value is reset. Namely, the power source of the image display device 8 is turned off unless the display contents of the image display device 8 changes for the certain time, and turned on when there is a change again. Consequently, unnecessary power consumption is prevented.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、画像表示装置電源制御方式に関する。[Detailed description of the invention] [Industrial application field] The present invention relates to an image display device power control system.

〔従来の技術〕[Conventional technology]

従来、画像表示装置電源のＯＮ、ＯＦＦ制御は、画像表
示装置を使用する人間の判断で、人手によって行われる
方式となっていた。Conventionally, the ON/OFF control of the image display apparatus power supply has been performed manually based on the judgment of the person using the image display apparatus.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述した従来の画像表示装置電源のＯＮ、ＯＦＦ制御は
、情報処理装置を使用する人間の判断で、人手によって
画像表示装置電源のＯＮ、ＯＦＦ制御を行う方式となっ
ているので、実際に情報処理装置が画像表示装置を使用
していない場合、あるいは情報処理装置による画像表示
装置の画像出力を人間が必要としない場合でも、画像表
示装置の電源はＯＮになっており、無駄な電力を画像表
示装置が消費するという欠点がある。The conventional power ON/OFF control of the image display device described above is a method in which the power source of the image display device is manually controlled ON/OFF based on the judgment of the person using the information processing device. Even when the device is not using an image display device, or when humans do not need the image display device to output images from the information processing device, the power to the image display device is turned on, saving wasted power from displaying images. The disadvantage is that the device is consuming.

〔課題を解決するための手段〕[Means to solve the problem]

本発明の画像表示装置電源制御方式は、画像表示用デー
タ記憶メモリに対するデータの出力を監視することによ
り、画像表示装置の表示内容の変化を察知し、表示内容
がある一定時間変化しない場合、画像表示装置の電源を
０ＦＦＬ、再び、画像表示用データ記憶メモリの内容に
変化が発生すると、画像表示装置の電源がＯＮするよう
に、情報処理装置自身で制御することにより、無駄な電
力を消費することを防止する機能を有している。The image display device power control system of the present invention detects a change in the display content of the image display device by monitoring the output of data to the data storage memory for image display, and if the display content does not change for a certain period of time, the The information processing device itself controls the power of the display device so that when the power of the display device is turned OFF and the contents of the image display data storage memory change, the power of the image display device is turned on again, thereby wasting power. It has a function to prevent this.

〔実施例〕〔Example〕

次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

第１図は本発明の一実施例を示すブロック図である。FIG. 1 is a block diagram showing one embodiment of the present invention.

第１図に示す画像表示装置電源制御装置は、全体の制御
を行う情報処理装置２と画像表示装置電源７、画像表示
装置８とを含んで構成される。The image display device power supply control device shown in FIG. 1 includes an information processing device 2 that performs overall control, an image display device power supply 7, and an image display device 8.

情報処理装置２は、中央処理部３、画像表示用データ記
憶メモリ部４、メモリアクセス監視部５、電源制御部６
で構成される。The information processing device 2 includes a central processing section 3, an image display data storage memory section 4, a memory access monitoring section 5, and a power supply control section 6.
Consists of.

画像表示装置８の画像表示内容を変更する処理は情報処
理装置２によって行なわれる。The process of changing the image display content of the image display device 8 is performed by the information processing device 2.

まず、中央処理部３は画像表示用データ記′憶メモリ部
４の位置するアドレスデータをアドレスバス９に出力す
る。続いて、中央処理部３はライト・イネーブル信号１
０．カラム・アドレス・ストローブ信号１１．ロウ・ア
ドレス・ストローブ信号１２をそれぞれアクティブ状態
にすることにより、データを画像表示用データ記憶メモ
リ部４へ書き込む。First, the central processing section 3 outputs address data at which the image display data storage memory section 4 is located to the address bus 9. Next, the central processing unit 3 receives the write enable signal 1.
0. Column address strobe signal 11. By activating the row address strobe signals 12, data is written into the image display data storage memory section 4.

前述の処理が行なわれると、メモリアクセス監視部５は
前記の処理を認識し、電源制御部６に対して、アクセス
認識信号１３を出力する。When the above-described processing is performed, the memory access monitoring section 5 recognizes the above-mentioned processing and outputs an access recognition signal 13 to the power supply control section 6.

電源制御部６はクロック信号１４によって動作するタイ
マ・カウンタで構成される制御回路で常に一定時間ごと
にカウントアツプを繰り返し、カウンタ値がある適当な
数値に達すると、画像表示装置電源７へ電源ＯＦＦ信号
を出力する。この信号を受けた画像表示装置電源７はた
だちに画像表示装置８への電力供給をストップし、画像
表示装置８はＯＦＦ状態となる。The power supply control unit 6 is a control circuit consisting of a timer/counter operated by the clock signal 14, and it always repeats counting up at regular intervals, and when the counter value reaches a certain appropriate value, it turns off the power to the image display device power supply 7. Output a signal. Upon receiving this signal, the image display device power supply 7 immediately stops supplying power to the image display device 8, and the image display device 8 enters the OFF state.

また、再び中央処理部３が画像表示用データ記憶メモリ
部４をアクセスすると、メモリアクセス監視部５がメモ
リアクセスを認識し、電源制御部６に対して、アクセス
認識信号１３、すなわちタイマ・リセット信号を出力す
る。タイマリセット信号を受けた電源制御部６は、画像
表示装置電源７に対して電源ＯＮ信号を出力し、画像表
示装置電源７はＯＮとなる。When the central processing unit 3 accesses the image display data storage memory unit 4 again, the memory access monitoring unit 5 recognizes the memory access and sends an access recognition signal 13, that is, a timer reset signal, to the power supply control unit 6. Output. The power supply control unit 6 that has received the timer reset signal outputs a power ON signal to the image display device power supply 7, and the image display device power supply 7 is turned on.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、画像表示が一定時間変化
しない場合に画像表示装置の電源をＯＦＦすることによ
り、無駄な電力の消費を防ぎ、特に画像表示装置がＣＲ
Ｔデイスプレィの場合、変化のない画像を長時間表示す
ることによるブラウン管の焼けを防止する効果もある。As explained above, the present invention prevents wasteful power consumption by turning off the power of the image display device when the image display does not change for a certain period of time, and in particular, when the image display device
In the case of T-displays, this also has the effect of preventing the cathode ray tube from burning out due to displaying unchanged images for long periods of time.

【図面の簡単な説明】[Brief explanation of drawings]

第１図は本発明の一実施例のブロック図である。 ２・・・情報処理装置、３・・・中央処理部、４・・・
画像表示用データ記憶メモリ部、５・・・メモリアクセ
ス監視部、６・・・電源制御部、７・・・画像表示装置
電源、８・・・画像表示装置、９・・・アドレス・バス
、１０・・・ライト・イネーブル信号、１１・・・カラ
ム。 アドレス・ストローブ信号、１２・・・ロウ・アドレス
・ストローブ信号、１３・・・アクセス認識信号、１４
・・・クロック信号、１５・・・画像表示データ、１６
・・・電源制御信号、１７・・・電源線。FIG. 1 is a block diagram of one embodiment of the present invention. 2... Information processing device, 3... Central processing unit, 4...
Image display data storage memory unit, 5... Memory access monitoring unit, 6... Power supply control unit, 7... Image display device power supply, 8... Image display device, 9... Address bus, 10...Write enable signal, 11...Column. Address strobe signal, 12... Row address strobe signal, 13... Access recognition signal, 14
... Clock signal, 15 ... Image display data, 16
... Power supply control signal, 17... Power supply line.

Claims (1)

【特許請求の範囲】[Claims] 情報処理装置の画像表示用データ記憶メモリからのデー
タの出力状態を監視し、前記出力状態をもとに、前記情
報処理装置により、画像表示装置電源のＯＮ、ＯＦＦ制
御を行うことを特徴とする画像表示装置電源制御方式。The information processing apparatus is characterized in that the output state of data from the image display data storage memory of the information processing apparatus is monitored, and based on the output state, the information processing apparatus performs ON/OFF control of the power supply of the image display apparatus. Image display device power control method.
JP26049989A 1989-10-04 1989-10-04 Power source control system for image display device Pending JPH03121528A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP26049989A JPH03121528A (en) 1989-10-04 1989-10-04 Power source control system for image display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP26049989A JPH03121528A (en) 1989-10-04 1989-10-04 Power source control system for image display device

Publications (1)

Publication Number Publication Date
JPH03121528A true JPH03121528A (en) 1991-05-23

Family

ID=17348819

Family Applications (1)

Application Number Title Priority Date Filing Date
JP26049989A Pending JPH03121528A (en) 1989-10-04 1989-10-04 Power source control system for image display device

Country Status (1)

Country Link
JP (1) JPH03121528A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010231324A (en) * 2009-03-26 2010-10-14 Oki Electric Ind Co Ltd Device, method and system for controlling display
WO2011114881A1 (en) * 2010-03-17 2011-09-22 シャープ株式会社 Digital broadcast reception device provided with function of displaying multiple screens

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010231324A (en) * 2009-03-26 2010-10-14 Oki Electric Ind Co Ltd Device, method and system for controlling display
WO2011114881A1 (en) * 2010-03-17 2011-09-22 シャープ株式会社 Digital broadcast reception device provided with function of displaying multiple screens

Similar Documents

Publication Publication Date Title
JPH11507736A (en) Power-down mode of computer system
US5634106A (en) Power saving system and method for refreshing a computer memory by switching between interval refresh and self-refresh operations
EP0456012A2 (en) Display control device for reducing power consumption
DE69332571D1 (en) Cathode ray tube display device and method for controlling its power supply
US4313180A (en) Refresh system for a dynamic memory
US5515080A (en) TFT LCD control method for setting display controller in sleep state when no access to VRAM is made
JPH04242790A (en) Electronic apparatus
JPH03121528A (en) Power source control system for image display device
US5148535A (en) Non-bus request refresh system for shortening refresh timing
US7113208B1 (en) Image processing apparatus, image processing method and recording medium
KR200252741Y1 (en) Data control apparatus for dynamic random access memory
JP3320308B2 (en) Information processing device with power saving mode
JP2830712B2 (en) Information display device
KR0182938B1 (en) Method for energy saving under a power off state
JPH06337772A (en) Image data display device
JPH04242791A (en) Electronic apparatus
JP2795926B2 (en) Personal computer
JPH0610422Y2 (en) Portable electronic devices
JPH03174584A (en) Display control system
JPS61200591A (en) Image display unit
JPH03214308A (en) Printer device power source control system
JPH03117284U (en)
JPS57197646A (en) Picture display device
JPH05101652A (en) Memory refresh control device
JPS59117782A (en) Refresh control system of storage device