JPH0310561U - - Google Patents
Info
- Publication number
- JPH0310561U JPH0310561U JP7225889U JP7225889U JPH0310561U JP H0310561 U JPH0310561 U JP H0310561U JP 7225889 U JP7225889 U JP 7225889U JP 7225889 U JP7225889 U JP 7225889U JP H0310561 U JPH0310561 U JP H0310561U
- Authority
- JP
- Japan
- Prior art keywords
- light emitting
- emitting diode
- lead
- lead chip
- type layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 claims 4
- 230000008878 coupling Effects 0.000 claims 1
- 238000010168 coupling process Methods 0.000 claims 1
- 238000005859 coupling reaction Methods 0.000 claims 1
- 230000003287 optical effect Effects 0.000 claims 1
- 239000004065 semiconductor Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 8
Description
第１図は本考案の一実施例の上部分を切り欠い
た平面を示す構成説明図、第２図は第１図の一部
を切断した側面の構成説明図、第３図は従来の装
置の上部分を切り欠いた平面を示す構成説明図、
第４図は第３図の一部を切断した側面の構成説明
図、第５図は第３図の等価回路図、第６図は第１
図の等価回路図、第７図および第８図は第６図の
等価回路に対応した従来の装置の一例の要部を示
す構成説明図である。
１〜４……リードチツプ、５，１１……発光ダ
イオード、７……フオトダイオード、８，１２…
…ワイヤ。
Fig. 1 is an explanatory diagram showing the configuration of an embodiment of the present invention in a plan view with the upper part cut away, Fig. 2 is an explanatory diagram of the configuration in a side view with a part of Fig. 1 cut away, and Fig. 3 is an explanatory diagram of the conventional device. A configuration explanatory diagram showing a plane with the upper part cut away,
Figure 4 is a partially cutaway side view of the configuration of Figure 3, Figure 5 is an equivalent circuit diagram of Figure 3, and Figure 6 is the diagram of Figure 1.
The equivalent circuit diagrams in the figure, FIGS. 7 and 8 are explanatory diagrams showing the main parts of an example of a conventional device corresponding to the equivalent circuit in FIG. 6. 1 to 4... Lead chip, 5, 11... Light emitting diode, 7... Photo diode, 8, 12...
...Wire.
Claims (1)
された第１〜第４のリードチツプと、 Ｎ型基板上にＰ型層が積層され、Ｎ型基板側が
前記第１のリードチツプにマウントされた第１の
発光ダイオードと、 Ｐ型基板上にＮ型層が積層され、Ｐ型基板側が
前記第２のリードチツプにマウントされ、Ｎ型層
がワイヤを介して第１の発光ダイオードのＰ型層
と接続された第２の発光ダイオードと、 これら各発光ダイオードの出力光を受光するよ
うに一方の電極が前記第３のリードチツプにマウ
ントされ、他方の電極がワイヤを介して前記第４
のリードチツプに接続されたフオトダイオード、
とで構成されたことを特徴とする半導体光結合装
置。[Claims for Utility Model Registration] First to fourth lead chips molded such that one end thereof is exposed to the outside, a P-type layer stacked on an N-type substrate, and the first lead chip facing the N-type substrate. A first light emitting diode is mounted on the first light emitting diode, and an N type layer is laminated on a P type substrate, the P type substrate side is mounted on the second lead chip, and the N type layer is connected to the first light emitting diode through a wire. A second light emitting diode connected to the P-type layer; one electrode is mounted on the third lead chip so as to receive the output light of each of these light emitting diodes, and the other electrode is connected to the fourth lead chip through a wire.
a photodiode connected to the lead chip of
A semiconductor optical coupling device comprising:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7225889U JPH0310561U (en) | 1989-06-20 | 1989-06-20 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7225889U JPH0310561U (en) | 1989-06-20 | 1989-06-20 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0310561U true JPH0310561U (en) | 1991-01-31 |
Family
ID=31610039
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7225889U Pending JPH0310561U (en) | 1989-06-20 | 1989-06-20 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0310561U (en) |
-
1989
- 1989-06-20 JP JP7225889U patent/JPH0310561U/ja active Pending
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