JPH0262096A - Multilayered printed wiring board - Google Patents
Multilayered printed wiring boardInfo
- Publication number
- JPH0262096A JPH0262096A JP21392988A JP21392988A JPH0262096A JP H0262096 A JPH0262096 A JP H0262096A JP 21392988 A JP21392988 A JP 21392988A JP 21392988 A JP21392988 A JP 21392988A JP H0262096 A JPH0262096 A JP H0262096A
- Authority
- JP
- Japan
- Prior art keywords
- inner layer
- layer material
- recess
- wiring board
- printed wiring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000463 material Substances 0.000 claims abstract description 22
- 239000011347 resin Substances 0.000 claims abstract description 13
- 229920005989 resin Polymers 0.000 claims abstract description 13
- 239000004020 conductor Substances 0.000 claims abstract description 11
- 238000003475 lamination Methods 0.000 abstract description 10
- 238000000465 moulding Methods 0.000 abstract description 10
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 abstract description 8
- 239000011889 copper foil Substances 0.000 abstract description 7
- 230000002093 peripheral effect Effects 0.000 abstract description 7
- 238000011109 contamination Methods 0.000 abstract 2
- 229910001220 stainless steel Inorganic materials 0.000 description 4
- 239000010935 stainless steel Substances 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 3
- 239000000758 substrate Substances 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 238000010030 laminating Methods 0.000 description 2
- 239000003795 chemical substances by application Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000010186 staining Methods 0.000 description 1
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は、各種電子機器に利用される多層プリント配線
板に関するものである。DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a multilayer printed wiring board used in various electronic devices.
従来の技術
従来、多層プリント配線板は、第５図に示すような構造
であった。また多層プリント配線板の製造工程での積層
成型時には第６図に示すような状態で加工される。第６
図および第６図において、１は内層材、２ａ 、２ｂ
、２ｃ 、２（１，２６。2. Description of the Related Art Conventionally, a multilayer printed wiring board has had a structure as shown in FIG. Further, during lamination molding in the manufacturing process of a multilayer printed wiring board, processing is performed in a state as shown in FIG. 6th
In the figure and FIG. 6, 1 is the inner layer material, 2a, 2b
,2c,2(1,26.
２ｒは内層導体、３．３′はプリプレグ、４１Ｌ。2r is an inner layer conductor, 3.3' is a prepreg, and 41L.
４ｂ 、４０．４ｄ 、４１５．４ｆは外層導体、６゜
りは銅箔、６．ｅ′はクツション材、７，７′はステン
レス板、８．８′は熱盤、９１Ｌ 、９ｂ 、９０ 。4b, 40.4d, 415.4f are outer layer conductors, 6° is copper foil, 6. e' is a cushion material, 7, 7' are stainless steel plates, 8.8' are heating plates, 91L, 9b, 90.
９ｄは積層成型時に流出したプリプレグの樹脂分である
。第６図で示す多層プリント配線板は第６図に示すよう
に基材を積み重ねての積層成型を経て製造される。9d is the resin component of the prepreg that flowed out during lamination molding. The multilayer printed wiring board shown in FIG. 6 is manufactured by laminating base materials and laminating them as shown in FIG. 6.
発明が解決しようとする課題
このような従来の構造では、積層成型時に加圧され溶融
しゲル化したプリプレグ３．３′の樹脂分が第６図の９
１Ｌ 、９ｂ 、９０．９ｄに示すように基板端面から
外部に流出し、それがステンレス板７．７′の表面や銅
箔６，６′の表面を汚すことが頻繁に生じ作業性が非常
に悪く、品質的にもステンレス板７，７′の表面に付着
し硬化した樹脂分が銅箔部６．６′をおさえることによ
って生じる打痕及び銅箔５，６′に付着し硬化した樹脂
分に起因するエツチング時の銅残りショート不良等を引
き起こすものとなっていた。Problems to be Solved by the Invention In such a conventional structure, the resin content of the prepreg 3.3', which is melted and gelled by pressure during lamination molding, is reduced to 9 in Fig. 6.
As shown in 1L, 9b, and 90.9d, it leaks out from the end surface of the board and frequently stains the surface of the stainless steel plate 7.7' and the surface of the copper foil 6, 6', resulting in extremely poor workability. In terms of quality, the resin that has adhered and hardened to the surface of the stainless steel plates 7, 7' presses down on the copper foil portions 6 and 6', resulting in dents and the resin that has adhered and hardened to the copper foils 5, 6'. Residual copper during etching caused short-circuit defects and the like.
本発明はこのような課題に対して製造工程での積層成型
時にゲル化したプリプレグの樹脂分が基板の端面から加
圧されることによシ流出しないようにした多層プリント
配線板を提供するものである。The present invention addresses these problems by providing a multilayer printed wiring board in which the gelled prepreg resin during lamination molding in the manufacturing process is prevented from flowing out due to pressure applied from the end surface of the board. It is.
課題を解決するための手段
この課題を解決するために本発明では、内層材の周縁部
にプリプレグの流出する樹脂分を吸収する凹部又はスリ
ットを形成した構成とするものである。Means for Solving the Problem In order to solve this problem, the present invention has a structure in which a recess or slit is formed in the peripheral edge of the inner layer material to absorb the resin component flowing out of the prepreg.
作用
この構成により、積層成型時にゲル化したプリプレグの
樹脂分が、内層材の凹部あるいはスリットに流入し、基
板の端面から外部に流出しないこととなる。Effect: With this configuration, the resin of the prepreg gelled during lamination molding flows into the recesses or slits of the inner layer material and does not flow out from the end surface of the substrate.
実施例
第１図は本発明の第１の実施例であり、第２図は第１の
実施例に用いる内層材を示している。第１図、第２図に
おいて１１は内層導体２１１Ｌ〜２１ｆを備えた内層材
であり１表面の周縁部にＶ字型溝からなる凹部５１を設
けておシ、第１図ではその上下にプリプレグ３１．３１
’を介して外層導体４１ａ〜４１ｆを形成した構造を示
す。この実施例によれば、内層材１１の周縁部に凹部５
１が設けられているために積層成型時にゲル化したプリ
プレグ３１．３１’の樹脂分がそこに流入し、端面から
外部に流出するのを防止できる。Embodiment FIG. 1 shows a first embodiment of the present invention, and FIG. 2 shows an inner layer material used in the first embodiment. In FIGS. 1 and 2, reference numeral 11 is an inner layer material having inner layer conductors 211L to 21f, and a recess 51 consisting of a V-shaped groove is provided at the peripheral edge of one surface, and in FIG. 31.31
The structure in which outer layer conductors 41a to 41f are formed through ' is shown. According to this embodiment, the recess 5 is provided at the peripheral edge of the inner layer material 11.
1, the resin of the prepregs 31 and 31' that gelled during lamination molding can be prevented from flowing therein and flowing out from the end face.
第３図は本発明の第２の実施例であり、第４図は第２の
実施例に用いる内層材を示している。第３図、第４図に
おいて１２は内層材であり、周縁部にスリット６２を設
けており、第３図でｔｒｒ＋の上下にプリプレグ３２，
３２’を介して外層導体４２ａ〜４２ｆを形成した構造
を示す。この実施例によれば、内層材１２の周縁部にス
リット５２が設けられているために積層成型時にゲル化
したプリプレグ３２，３２’の樹脂分が流入し、基板の
端面から外部に流出するのを防止できる。なお、上記の
実施例のようにそのまま多層プリント配線板として使用
してもよいし、四部又はスリットを形成した周縁部を切
り取って多層プリント配線板として使用してもよい。FIG. 3 shows a second embodiment of the present invention, and FIG. 4 shows an inner layer material used in the second embodiment. In FIGS. 3 and 4, reference numeral 12 is an inner layer material, which has a slit 62 at its periphery. In FIG.
A structure in which outer layer conductors 42a to 42f are formed via 32' is shown. According to this embodiment, since the slit 52 is provided at the periphery of the inner layer material 12, the resin of the prepregs 32, 32' that gel during lamination molding flows in and flows out from the end surface of the substrate. can be prevented. It should be noted that it may be used as a multilayer printed wiring board as it is as in the above embodiment, or it may be used as a multilayer printed wiring board by cutting out the four parts or the peripheral part where the slits are formed.
発明の効果
以上のように本発明によれば、内層材の周縁部に凹部あ
るいはスリットを設けることにより、積層成型時にゲル
化したプリプレグの樹脂分が基板端面から外部に流出し
ステンレス板および銅箔の表面に付着し汚すことがなく
なシ、作業性が向上するとともに品質の向上も図ること
ができる。Effects of the Invention As described above, according to the present invention, by providing a recess or a slit in the periphery of the inner layer material, the gelled resin of the prepreg during lamination molding flows out from the end surface of the substrate, thereby preventing the stainless steel plate and the copper foil from flowing out. This eliminates the possibility of adhering to and staining the surface, improving workability and improving quality.
第１図は本発明の一実施例における多層プリント配線板
の断面図、第２図は同実施例に用いる内層材を示す斜視
図、第３図は本発明の他の実施例における多層プリント
配線板の断面図、第４図は同実施例に用いる内層材を示
す斜視図、第５図は従来の多層プリント配線板の断面図
、第６図は従来の多層プリント配線板の製造工程での積
層成型時の状態を示す断面図である。
１１１１２・・・・・・内層材、２１ Ｊ２１ｂ 、２
１０゜２１ ｄ 、２１６．２１ ｆ’ 、２２１Ｌ
、２２ｂ 、２２０゜２２ｄ 、２２ｅ 、２２ｆ−−
−−−−内層導体、３１．３１’。
３２ 、３２’−＝−・−プリプレグ、４１１Ｌ 、４
１ ｂ、４１０゜４１（１，４１６，４１ｆ、４２＋Ｌ
、４２ｂ、４２０゜４２（１，４２＋５．４２ｆ’・・
・・・・外層導体、５１・・・・・・Ｖ字型溝、６２・
・・・・・スリット。
代理人の氏名 弁理士 粟 野 重 孝 ほか１名Ｕ−
ｍ−内層材
Ｚｆａ、、２／ｂ、２／ｑ、２／４ Ｚ／ｅ、Ｚ／ナナ
−一内層４４３１、３７’−−フソフレグ
４に、４ｆｂ、４／ｃ、４１ｔ、４ｆｅ、４／ｆ −
−−ｎ）Ｗ 導イ〉ト、ｓｒ −−−ｖ芋臣溝−
図
／Ｚ−一一門１１才
１Ｚｅｔ、 Ｚｌｂ、 Ｚ２ｃ、 ＺＺｄ、２Ｚｅ、
ＺＺｆ−ｍ−内層４休３２．３乙“−７゛ツブレグ
４Ｚｔｔ、４乙す、４２乙、４乙−１，４Ｚｅ、４Ｚｆ
・−−クト層導イイ（５？−一一スソット
第３図
第４図FIG. 1 is a sectional view of a multilayer printed wiring board according to an embodiment of the present invention, FIG. 2 is a perspective view showing an inner layer material used in the same embodiment, and FIG. 3 is a multilayer printed wiring board according to another embodiment of the present invention. 4 is a perspective view showing the inner layer material used in the same example, FIG. 5 is a sectional view of a conventional multilayer printed wiring board, and FIG. 6 is a cross-sectional view of the conventional multilayer printed wiring board in the manufacturing process. FIG. 3 is a cross-sectional view showing a state during lamination molding. 11112...Inner layer material, 21 J21b, 2
10°21 d, 216.21 f', 221L
, 22b , 220° 22d , 22e , 22f --
----Inner layer conductor, 31.31'. 32, 32'-=-・-prepreg, 411L, 4
1 b, 410°41 (1,416,41f, 42+L
, 42b, 420°42 (1,42+5.42f'...
... Outer layer conductor, 51 ... V-shaped groove, 62.
·····slit. Name of agent: Patent attorney Shigetaka Awano and 1 other person U-
m-Inner layer material Zfa, 2/b, 2/q, 2/4 Z/e, Z/Nana-1 inner layer 4431, 37'--Fusofreg 4, 4fb, 4/c, 41t, 4fe, 4/ f −
--n) W guide, sr ---v Imoomizo- Figure/Z-ichiichimon 11 years old 1Zet, Zlb, Z2c, ZZd, 2Ze,
ZZf-m-Inner layer 4 rest 32.3 Otsu"-7゛Tubreg 4Ztt, 4 Otsu, 42 Otsu, 4 Otsu-1, 4Ze, 4Zf
・--Cut layer conductivity (5?-11 Susotto Figure 3 Figure 4
Claims (1)
た樹脂分の流出を防止する１個以上の凹部又はスリット
を形成した内層材を備え、この内層材の上下面にプリプ
レグからなる絶縁層を介して表面導体を形成した多層プ
リント配線板。An inner layer conductor is formed on the surface, an inner layer material is provided with one or more recesses or slits formed on the periphery to prevent the melted resin of the prepreg from flowing out, and an insulating layer made of prepreg is provided on the upper and lower surfaces of this inner layer material. A multilayer printed wiring board with surface conductors formed through it.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP21392988A JPH0262096A (en) | 1988-08-29 | 1988-08-29 | Multilayered printed wiring board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP21392988A JPH0262096A (en) | 1988-08-29 | 1988-08-29 | Multilayered printed wiring board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0262096A true JPH0262096A (en) | 1990-03-01 |
Family
ID=16647379
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP21392988A Pending JPH0262096A (en) | 1988-08-29 | 1988-08-29 | Multilayered printed wiring board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0262096A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2011014573A (en) * | 2009-06-30 | 2011-01-20 | Yazaki Corp | Metal core aggregate, and method for manufacturing metal core substrate |
| JP2013232462A (en) * | 2012-04-27 | 2013-11-14 | Murata Mfg Co Ltd | Resin multilayer board and method for producing the same |
-
1988
- 1988-08-29 JP JP21392988A patent/JPH0262096A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2011014573A (en) * | 2009-06-30 | 2011-01-20 | Yazaki Corp | Metal core aggregate, and method for manufacturing metal core substrate |
| JP2013232462A (en) * | 2012-04-27 | 2013-11-14 | Murata Mfg Co Ltd | Resin multilayer board and method for producing the same |
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