JPH02167895A - Method for growing compound semiconductor - Google Patents
Method for growing compound semiconductorInfo
- Publication number
- JPH02167895A JPH02167895A JP32506188A JP32506188A JPH02167895A JP H02167895 A JPH02167895 A JP H02167895A JP 32506188 A JP32506188 A JP 32506188A JP 32506188 A JP32506188 A JP 32506188A JP H02167895 A JPH02167895 A JP H02167895A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- growth
- grown
- crystal
- growing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 30
- 150000001875 compounds Chemical class 0.000 title claims abstract description 29
- 238000000034 method Methods 0.000 title claims description 20
- 239000013078 crystal Substances 0.000 claims abstract description 54
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims abstract description 29
- 238000002360 preparation method Methods 0.000 claims description 8
- 150000004678 hydrides Chemical class 0.000 claims description 3
- 239000000758 substrate Substances 0.000 abstract description 26
- 239000002052 molecular layer Substances 0.000 abstract description 5
- 239000000463 material Substances 0.000 description 9
- 239000012071 phase Substances 0.000 description 9
- 238000003877 atomic layer epitaxy Methods 0.000 description 8
- 229910052739 hydrogen Inorganic materials 0.000 description 7
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 6
- RBFQJDQYXXHULB-UHFFFAOYSA-N arsane Chemical compound [AsH3] RBFQJDQYXXHULB-UHFFFAOYSA-N 0.000 description 6
- 239000001257 hydrogen Substances 0.000 description 6
- JLTRXTDYQLMHGR-UHFFFAOYSA-N trimethylaluminium Chemical compound C[Al](C)C JLTRXTDYQLMHGR-UHFFFAOYSA-N 0.000 description 6
- 125000004429 atom Chemical group 0.000 description 4
- 238000000407 epitaxy Methods 0.000 description 4
- 239000007789 gas Substances 0.000 description 4
- 229910000070 arsenic hydride Inorganic materials 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 239000012535 impurity Substances 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 229910052733 gallium Inorganic materials 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 230000008569 process Effects 0.000 description 2
- 239000012808 vapor phase Substances 0.000 description 2
- 101150071986 LRAT gene Proteins 0.000 description 1
- 125000003407 arsaniumyl group Chemical group [H][As+]([H])([H])[*] 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 229910021478 group 5 element Inorganic materials 0.000 description 1
- 150000002431 hydrogen Chemical group 0.000 description 1
- 239000007791 liquid phase Substances 0.000 description 1
- -1 lower prices Substances 0.000 description 1
- 238000004211 migration-enhanced epitaxy Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 238000001953 recrystallisation Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 239000007790 solid phase Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- WGPCGCOKHWGKJJ-UHFFFAOYSA-N sulfanylidenezinc Chemical compound [Zn]=S WGPCGCOKHWGKJJ-UHFFFAOYSA-N 0.000 description 1
- 125000004434 sulfur atom Chemical group 0.000 description 1
- XCZXGTMEAKBVPV-UHFFFAOYSA-N trimethylgallium Chemical compound C[Ga](C)C XCZXGTMEAKBVPV-UHFFFAOYSA-N 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
- 229910052984 zinc sulfide Inorganic materials 0.000 description 1
Landscapes
- Crystals, And After-Treatments Of Crystals (AREA)
- Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)
Abstract
Description
【発明の詳細な説明】
［概要］
格子定数の異なる物質の基板上に化合物半導体を成長さ
せる方法に関し、
成長面が平坦で成長層の結晶性が優れた化合物事運休の
エピタキシャル層を格子定数の異なる基板上に成長する
ことができる化合物半導体の成長方法を提供することを
目的とし、
ＧａＡｓ、ＩｎＰ 、 ＧａＰ 、 ｘが０．０２以下
のＩｎｘＧａ１−ｘ Ａｓ、これらの混晶のＳｉ、Ｇｅ
、いずれかからなる下地結晶の上にＡｓを分子または水
素化物の形で供給してＡＳｉを形成する第１準備工程と
、次にＡｌを分子または有機金属ガスの形で供給してＡ
ｌ層を形成する第２準備工程と、その後、下地結晶と異
なる格子定数で＾ＩＡｓの格子定数に対して±５％以内
の格子不整を持つ■−ｖ族化族化合物半金体長する成長
工程とを含むように構成する。[Detailed Description of the Invention] [Summary] Regarding a method for growing compound semiconductors on substrates of substances with different lattice constants, an epitaxial layer of a compound semiconductor with a flat growth surface and excellent crystallinity of the growth layer is grown with a different lattice constant. The purpose is to provide a method for growing compound semiconductors that can be grown on different substrates.
, a first preparation step in which As is supplied in the form of molecules or hydride to form ASi on a base crystal consisting of any one of the following;
A second preparation step of forming an l layer, followed by a growth step of growing a ■-v group compound semimetal body having a lattice constant different from that of the underlying crystal and having a lattice mismatch within ±5% with respect to the lattice constant of ^IAs. Configure it to include.
［産業上の利用分野］
本発明はエピタキシャル結晶成長に関し、特に格子定数
の異なる物質の基板上に化合物半導体を成長させる方法
に関する。[Industrial Application Field] The present invention relates to epitaxial crystal growth, and more particularly to a method for growing compound semiconductors on substrates of materials having different lattice constants.
近年化合物半導体デバイスの進歩に伴い、結晶材料の大
口径化、価格の低下、新しい機能を実現する結晶構造な
どが要求されている。このため、基板と成長層の格子定
数が異なるヘテロエピタキシャル結晶の成長技術が要求
されている。その代表といえるのがＳｉ基板の上にＧａ
Ａｓを成長する技術で、一般にＧａＡｓ ｏｎ Ｓ
ｉと呼ばれる。しかし、このようなヘテロエピタキシャ
ル結晶を作ろうとすると、格子定数の違いを克服するた
めに、成長初期に特殊な工夫をする必要がある。In recent years, with the progress of compound semiconductor devices, there has been a demand for larger diameter crystal materials, lower prices, and crystal structures that realize new functions. Therefore, a technique for growing a heteroepitaxial crystal in which the substrate and the growth layer have different lattice constants is required. A representative example of this is Ga on a Si substrate.
A technique for growing As, generally GaAs on S.
It is called i. However, when attempting to create such a heteroepitaxial crystal, special measures must be taken at the initial stage of growth to overcome the difference in lattice constants.
［従来の技術］
以下上としてＳｉ基板上のＧａＡｓのエピタキシャル成
長を例として説明する。[Prior Art] The epitaxial growth of GaAs on a Si substrate will be described below as an example.
従来のＳｉ基板上のＧａＡｓのエピタキシャル成長技術
としてＭＯＣＶＤやＭＢＥを改良した２段階成長と呼ば
れるものがある９例えば、ジャパニーズジャーナル オ
ブ アプライド フィジックスにアキャマ池が発表した
方法（１４，Ａｋｉｙａｍａ ｅｔ ａｌ、、Ｊｌ）ｎ
、Ｊ、ＡＩ）Ｉ）１．ＰｈＶＳ、 ２３ （１９８４）
１８４３）は以下のようなものである。As a conventional epitaxial growth technique for GaAs on Si substrates, there is a technique called two-step growth, which is an improved version of MOCVD and MBE.9 For example, the method published by Akiyama Ike in the Japanese Journal of Applied Physics (14, Akiyama et al., Jl.) n
, J, AI) I) 1. PhVS, 23 (1984)
1843) is as follows.
第２図（Ａ）に示すように、まず基板温度を通常の単結
晶成長温度〈６００〜８５０°Ｃ）よりも低い温度、例
えば４００〜４５０℃に保って、薄いアモルファスまた
は多結晶のＧａＡｓバッフγ層２３全２３する。厚さは
例えばば約１０ｎ１１程度である。この段階ではバッフ
ァ層２３はアモルファス相または多結晶相であってエピ
タキシャル成長層ではない。As shown in Figure 2 (A), first, the substrate temperature is maintained at a temperature lower than the normal single crystal growth temperature (600-850°C), for example, 400-450°C, and a thin amorphous or polycrystalline GaAs buffer is grown. γ layer 23 total 23. The thickness is, for example, about 10n11. At this stage, the buffer layer 23 is in an amorphous phase or a polycrystalline phase and is not an epitaxially grown layer.
次に、基板温度を昇温し、通常の単結晶成長温度、例え
ば７００℃前後にする。すると、第２図（Ｂ）に示すよ
うにアモルファス相または多結晶相であったバッファＮ
ｌ２３内で固相成長が進み、エピタキシャルな単結晶相
に変化する。Next, the substrate temperature is raised to a normal single crystal growth temperature, for example, around 700°C. Then, as shown in FIG. 2(B), the buffer N, which was in an amorphous phase or a polycrystalline phase,
Solid phase growth progresses within l23, changing to an epitaxial single crystal phase.
バッファ層２３が単結晶化した後、第２図（Ｃ）に示す
ように、その上に必要な厚さのＧａＡＳエピタキシャル
層２５全２５する。After the buffer layer 23 is made into a single crystal, a GaAS epitaxial layer 25 of a required thickness is formed thereon, as shown in FIG. 2(C).
Ｓｉ基板上に直接ＧａＡ３層を成長しようとすると、油
が水を弾くような島状の成長が起こり、平坦な面を持つ
成長が困難であることが知られている。It is known that when a GaA three layer is grown directly on a Si substrate, island-like growth occurs, as if oil repels water, and growth with a flat surface is difficult.
上述の二段１ｒａ成長は、初めにアモルファス相または
多結晶相のバッファ層を成長することで平坦な成長面を
実現するものである。The above-mentioned two-stage 1RA growth realizes a flat growth surface by first growing a buffer layer of an amorphous phase or a polycrystalline phase.
ところが、二段階成長を用いても、最初の成長層が単結
晶でないためか、良質の結晶を作ることが容易でなく、
高密度の転位が発生したり、成長層表面の平坦化が悪化
したりする。However, even if two-step growth is used, it is not easy to produce high-quality crystals, perhaps because the first growth layer is not a single crystal.
High-density dislocations may occur, and flattening of the surface of the grown layer may deteriorate.
［発明が解決しようとする課題］
電子デバイス用結晶としては表面が平坦で結晶性の優れ
た結晶層が望ましい６表面が平坦でな、いと加工プロセ
スに問題を生じ易く、結晶性が悪いとキャリア寿命の低
下等を起こしてその材料本来の性能を十分引き出すこと
が難しく、デバイスの寿命、信頼性も低下させ易い。[Problems to be solved by the invention] A crystal layer with a flat surface and excellent crystallinity is desirable as a crystal for electronic devices.6 If the surface is not flat, problems tend to occur in the processing process, and if the crystallinity is poor, the carrier This causes a reduction in the lifespan, making it difficult to fully bring out the original performance of the material, and also easily reducing the lifespan and reliability of the device.
上述のように、従来のへテロエピタキシャル結晶成長技
術で得られる成長層は、成長面の平坦性、成長層の結晶
性の点で必ずしも十分なものではなかった。As mentioned above, the growth layer obtained by the conventional heteroepitaxial crystal growth technique is not necessarily sufficient in terms of the flatness of the growth surface and the crystallinity of the growth layer.
従って、この結晶を材料としたデバイスの特性を良くす
ることができず、特に発光デバイスは寿命が短いといっ
た問題を生じていた。Therefore, it is not possible to improve the characteristics of devices using this crystal as a material, and the lifespan of light-emitting devices in particular is short.
本発明の目的は、成長面が平坦で成長層の結晶性が優れ
た化合物半導体のエピタキシャル層を格子定数の異なる
基板上に成長することができる化合物半導体の成長方法
を提供することである。An object of the present invention is to provide a method for growing a compound semiconductor that can grow an epitaxial layer of a compound semiconductor with a flat growth surface and excellent crystallinity on a substrate having a different lattice constant.
新たな結晶成長システムを利用することにより、Ｓｉ上
のＧａＡＳを初めとする格子定数の異なる基板上の化合
物半導体エピタキシャル層の品質、例えば転位密度を向
上させることを意図する。By utilizing a new crystal growth system, it is intended to improve the quality, such as dislocation density, of compound semiconductor epitaxial layers on substrates with different lattice constants, such as GaAS on Si.
［課題を解決するための手段］
本発明によれば、：
（１）基板上に目的とする化合物半導体を直接成長する
のではなく、まず八１＾Ｓを成長する。[Means for Solving the Problems] According to the present invention: (1) Instead of directly growing a target compound semiconductor on a substrate, 81^S is first grown.
（２）この八１＾Ｓの戒長において、第１層にＡｓ、第
２層に八）をほぼ１原子層ずつ近付ける用に成長原料を
基板に供給する。(2) In this 81^S prerequisite, a growth material is supplied to the substrate in order to bring As in the first layer and 8) in the second layer approximately one atomic layer at a time.
第１図（Ａ）〜（Ｄ）に本発明の原理説明図を示す。FIGS. 1(A) to 1(D) are diagrams illustrating the principle of the present invention.
第１図（Ａ）において、ＧａＡｓ、 ＩｎＰ 、 Ｇａ
Ｐ 、 ｘが０．０２以下のＩｎｘＧａ、、 Ａｓ、こ
れらの混晶、Ｓｉ、 Ｇｅのいずれかからなる下地結晶
１の上にＡｓ層３を約１原子層戒長する。この工程で下
地結晶１の表面はほぼ隠れる。In FIG. 1(A), GaAs, InP, Ga
An As layer 3 of about one atomic layer is formed on a base crystal 1 made of InxGa, As, a mixed crystal thereof, Si, or Ge with P and x of 0.02 or less. In this step, the surface of the base crystal 1 is almost hidden.
次に第１図（Ｂ）に示すように４３層３の上にへ１層５
を約ｌ原子層成長する。Next, as shown in Figure 1 (B), layer 5 is placed on top of layer 3.
is grown to about 1 atomic layer.
次に第１図（Ｃ）に示すように４１層５の上に＾１＾Ｓ
または戒長させたい目的物の■−ｖ族化合物半導体のバ
ッファ層７を成長する。ここで目的物の■−ｖ族化合物
半導体とは＾ＩＡｓの格子定数に対して±５％以内の格
子不整を持つ■−Ｖ族化合物半導体であり、混晶を含む
、目的物の■−ｖ族化合物半導体がＡｓを含まないもの
である場合はバッファ層成長の冒頭にＡＳををｌ原子層
成長するのが好ましい。Next, as shown in Figure 1(C), ^1^S is applied on the 41st layer 5.
Alternatively, a buffer layer 7 of a ①-V group compound semiconductor, which is the target to be improved, is grown. Here, the target ■-v group compound semiconductor is a ■-V group compound semiconductor that has a lattice mismatch within ±5% with respect to the lattice constant of ^IAs, and includes mixed crystals. When the group compound semiconductor does not contain As, it is preferable to grow 1 atomic layer of AS at the beginning of growing the buffer layer.
また、Ａｓ原子層の成長とＡｌ原子層の成長とのサイク
ルを複数回繰り返すことが好ましい。Further, it is preferable to repeat the cycle of growing an As atomic layer and growing an Al atomic layer multiple times.
この後、第１図（Ｄ）に示すように目的とする■−ｖ族
化合物半導体の１１９を必要な厚さ成長する。Thereafter, as shown in FIG. 1(D), the desired thickness of the target ■-v group compound semiconductor 119 is grown.
なお、不純物をドープしたい場合は例えば成長と同時に
不純物元素を添加すればよい。Note that if it is desired to dope an impurity, the impurity element may be added, for example, at the same time as the growth.
また目的とする■−Ｖ族化合物半専体とは■−Ｖ族化合
物半導体の混晶も含むものとする。Furthermore, the intended semi-exclusive (1)-V group compound shall also include mixed crystals of (1)-V group compound semiconductors.
［作用］
格子定数の異なる下地結晶上にまずＡＩＡＳ分子層を成
長し、その後、Ａｌ＾Ｓに対して格子定数のずれが５％
以内の■−ｖ族化合物半導体を成長することにより、格
子不整の影響が緩和される。[Operation] First, an AIAS molecular layer is grown on a base crystal with a different lattice constant, and then the lattice constant deviation is 5% with respect to Al^S.
The influence of lattice misalignment can be alleviated by growing a compound semiconductor of the 1-v group within the range of .
また、異種物質上に■−Ｖ族化合物半導体の結晶を戒長
する際は、一般に島状の成長が起こり易い、特に、下地
結晶がＳｉ、 Ｇｅのような単元素半導体の場合は、基
板内は無極性の共有結合のみであり、その上にイオン性
を持つ■−ｖ族化合物半導体層を全面に均一に成長する
ことは難しい、下地結晶上にまずＡＳの１原子層を戒長
し、次にＡｌの１原子層を成長する場合は非常に優れた
面の被覆度を得やすい、これにより島状成長が起こりに
くくなり、その上に平坦な面を持つエピタキシャル層が
成長しやすい。In addition, when crystals of ■-V group compound semiconductors are grown on foreign materials, island-like growth is generally likely to occur, especially when the underlying crystal is a single element semiconductor such as Si or Ge. has only non-polar covalent bonds, and it is difficult to uniformly grow an ionic ■-V group compound semiconductor layer over the entire surface.First, one atomic layer of AS is grown on the underlying crystal. Next, when growing a single atomic layer of Al, it is easy to obtain a very good surface coverage, which makes island-like growth less likely to occur, and makes it easier to grow an epitaxial layer with a flat surface thereon.
下地結晶と成長、］ホどの格子不整の程度等に応じて適
当にバッファ層７を設けるのが好ましい。It is preferable to provide the buffer layer 7 appropriately depending on the degree of lattice misalignment between the underlying crystal and the growth layer.
従来の２段階成長と異なり、下地基板上に直接単結晶相
の■−Ｖ族化合物半導体層を成長することができる。Unlike conventional two-step growth, a single-crystal phase ■-V group compound semiconductor layer can be grown directly on a base substrate.
［実施例］
第３図（Ａ）〜（Ｈ）を参照して、３１基板上にＧａＡ
Ｓエピタキシャル層を成長する実施例を説明する。[Example] Referring to FIGS. 3(A) to (H), GaA was deposited on the 31 substrate.
An example of growing an S epitaxial layer will be described.
まず、第３図（Ａ）に示すように、下地結晶として（１
００）面または（１００）面から１０度以内傾いた面が
表面に出る基板１１を用意する。First, as shown in FIG. 3(A), as a base crystal (1
A substrate 11 having a surface that is inclined within 10 degrees from the 00) plane or the (100) plane is prepared.
結晶成長は、原子層成長（ＡＴＥ）と有機金属気相エピ
タキシャル成長（ＭＯＣＶＤ）のできる装置を用い、全
て気相で行った。用いた原料ガスは、＾Ｓ原子がアルシ
ン（ＡｓＨ３：水素でｌ ０％に希釈） 、Ｇａ原子が
トリメチルガリウム（Ｔ Ｍ Ｇ ）＾１原子がトリメ
チルアルミニウム（ＴＭＡ＞である。All crystal growth was performed in the vapor phase using equipment capable of atomic layer epitaxy (ATE) and metal organic vapor phase epitaxial growth (MOCVD). The raw material gases used include arsine (AsH3: diluted to 10% with hydrogen) as the S atom, trimethylgallium (TM G ) as the Ga atom, and trimethylaluminum (TMA) as the Ga atom.
単原子層の成長は、加熱した基板１１上に例えば単一の
Ｖ族元素の原料ガスを選択的に流し、停止後反応管内を
水素で置換し、その後側の■族元素の原料ガスを流し、
再び反応管内を水素で置換するサイクルを繰り返して行
った。To grow a monoatomic layer, for example, a single source gas of a group V element is selectively flowed onto the heated substrate 11, and after stopping, the inside of the reaction tube is replaced with hydrogen, and the source gas of a group (I) element on the rear side is flowed. ,
The cycle of replacing the inside of the reaction tube with hydrogen was repeated.
結晶成長の手順を以下により詳細に説明する。The crystal growth procedure will be explained in more detail below.
（１）第３図（Ａ）に示すようなＳｉ基板１１を原子層
成長（ＡＴＥ）と有機金属気相堆積（ＭＯＣＶＤ）とを
選択的に実行できる成長装置に収納し、水素気流中で約
２０分間、約ｉ ｏｏｏ℃で加熱する。これによりＳｉ
基板１１の表面の清浄化を行う。(1) A Si substrate 11 as shown in FIG. 3(A) is placed in a growth apparatus that can selectively perform atomic layer epitaxy (ATE) and metal organic chemical vapor deposition (MOCVD), and is placed in a hydrogen gas flow for approximately 10 minutes. Heat for 20 minutes at about iooo<0>C. As a result, Si
The surface of the substrate 11 is cleaned.
清浄化後基板温度を５００°Ｃに降温する。After cleaning, the substrate temperature is lowered to 500°C.
（２）第３図（Ｂ）に示すようにＡｓ源としてのアルシ
ンを約１０秒間供給し、その後アルシンの供給を停止し
、水素を約１０秒間供給する。これにより約１原子層の
Ａｓ層１３が成長し、反応管内のアルシンないし＾Ｓは
パージされる。(2) As shown in FIG. 3(B), arsine as an As source is supplied for about 10 seconds, then the supply of arsine is stopped, and hydrogen is supplied for about 10 seconds. As a result, an As layer 13 of approximately one atomic layer grows, and arsine or ^S in the reaction tube is purged.
（３）次に第３図（Ｃ）に示すように、Ａｌ源としての
ＴＭＡを約７秒間供給し、その後、ＴＭＡの供給を停止
し、水素を約１０秒間供給する。これによりＡｌ層１５
が成長し、反応管内のＴＭＡないしＡｌはパージされる
。(3) Next, as shown in FIG. 3(C), TMA as an Al source is supplied for about 7 seconds, then the supply of TMA is stopped, and hydrogen is supplied for about 10 seconds. As a result, the Al layer 15
grows, and TMA or Al in the reaction tube is purged.
ところで、Ａｓ原子層１３上の＾１原子層１５は第３図
（Ｄ）に模式的に示すように、下地Ａｓ層と較べて約２
倍の面内密度を有する。このため潰れた面被覆率が達成
されると考えられる。By the way, as schematically shown in FIG. 3(D), the ^1 atomic layer 15 on the As atomic layer 13 has a thickness of about 2 compared to the underlying As layer.
It has twice the in-plane density. It is considered that for this reason, a flat surface coverage is achieved.
（４）この２倍密度の＾１原子層の上に、第３図（Ｂ）
と同様の工程で次のＡＳ層を成長させる。すると、Ａｌ
原子は少なくとも１層の上下は自由に動き回ると考えら
れるので、ＡｌＡｓが結合するに従い、下の２倍密度の
Ａｌ７１１５から上に旧が供給されると考えられる。す
なわち元のＡｌ層１５は本来の密度になり、上に６５層
１３−２、ＡＩ層１５−２、＾Ｓ層１３−３が成長する
１、すなわち、第３図（Ｃ）と（Ｅ）の２工程１サイク
ルで２分子層が成長することになる。(4) On top of this double-density ^1 atomic layer, Figure 3 (B)
The next AS layer is grown in the same process as above. Then, Al
Since atoms are considered to move freely up and down at least one layer, it is thought that as AlAs is bonded, old atoms are supplied from the lower double density Al7115 to the upper layer. In other words, the original Al layer 15 has its original density, and the 65 layer 13-2, the AI layer 15-2, and the ^S layer 13-3 are grown on it. Two molecular layers are grown in one cycle of two steps.
（５）さらに第３図（Ｃ）と同様の工程によって、第３
図（Ｆ）に示すようにＴＭＡを供給して４１層を成長さ
せると２倍の面密度の４１層１５−３が成長する。(5) Further, the third
As shown in Figure (F), when 41 layers are grown by supplying TMA, 41 layers 15-3 with twice the areal density are grown.
（６）このようにして、Ａｓ原子層と＾１原子層を交互
に約５０サイクル戒長して、第３図（Ｇ）に示すような
ＡｌＡｓのバッファ層１７を成長する。(6) In this way, the As atomic layer and the ^1 atomic layer are alternately grown for about 50 cycles to grow an AlAs buffer layer 17 as shown in FIG. 3(G).
ここで反応管内圧力は２０ ｔｏｒｒ、流量はＡｓＨ３
が４８０５ＣＣＩＩ、 Ｔ Ｍ Ｇが４０ ＳＣｉ、全
流量が２５１ｍになるように水素の流量を調整する。Here, the pressure inside the reaction tube is 20 torr, and the flow rate is AsH3.
The hydrogen flow rate is adjusted so that the total flow rate is 4805 CCII, TMG is 40 SCi, and the total flow rate is 251 m.
このような原子層エピタキシについては、例えば、オゼ
キ他の発表（Ｈ，０ｚａｋｉ ｅｔ ａｌ、、Ｅｘｔｅ
ｎｄｅｄＡｂｓｔｒａｃｔｓ ｏｆ ｔｈｅ １９ｔｈ
Ｃｏｎｆ、 ｏｎ ５ｏｌｉｄ ５ｔａｔｅ Ｄｅｖ
ｉｃｅｓ ａｎｄ Ｍａｔｅｒｉａｌｓ、 Ｔｏ
ｋｙｏ、 １９８７．Ｄ、 ４７５） を参照す
ることができる。Regarding such atomic layer epitaxy, for example, the publication by Ozaki et al.
Abstracts of the 19th
Conf, on 5olid 5tate Dev
ices and materials, To
kyo, 1987. D, 475).
（７）次に温度を６５０℃に上げて第３図（Ｈ）に示す
ようにＧａＡｓをＭＯＣＶＤで成長してエピタキシャル
成長層１つを得る。ここで反応管内圧力は２０ｔｏｒｒ
、流量は”Ｔ’ Ｍ Ｇが２５ｃｃ１． ＡｓＨ３が４
０ＳＣＣＩである。ＭＯＣＶＤによる成長層１つの厚さ
がデバイスの必要なＭ（例えば３μｍ）に達したら成長
を停止する。(7) Next, raise the temperature to 650° C. and grow GaAs by MOCVD to obtain one epitaxial growth layer as shown in FIG. 3(H). Here, the pressure inside the reaction tube is 20 torr.
, the flow rate is "T' MG is 25cc1. AsH3 is 4
0SCCI. Growth is stopped when the thickness of one layer grown by MOCVD reaches the required M of the device (for example, 3 μm).
このようにして得たエピタキシャル成長層は優れた結晶
性を示した。従来の２段階成長で１０８（Ｉｌ／ｃｎ２
台あった転位密度が本実施例のサンプルの場合、１０６
１［Ａｌ／Ｃ１Ｂ”台に減少した。また表面の平坦性が
大１幅に向上した。The epitaxially grown layer thus obtained showed excellent crystallinity. Conventional two-step growth yields 108 (Il/cn2
In the case of the sample of this example, the dislocation density was 106
1 [Al/C1B" level. Also, the surface flatness was greatly improved.
第４図に本発明の別の実施例を示す、上述の実施例では
最初にＡｌＡｓを１００分子層成長しているが、ＡｌＡ
ｓを２分子層成長した後はＧａＡｓの原子層エピタキシ
に移行してもよい、第４図において、１１は（１００）
面５１基板であり、この上にＡｓ原子層、旧原子層、Ａ
ｓ原子層を成長させると上述のようにＡＩＡＳ２分子層
１４とさらに１つのＡｓ原子層が成長する。その後はこ
のＡｓ原子層上にＧａ原子層、Ａｓ原子層と交互に成長
させることにより、原子層生長によるＧａＡｓバッファ
層１６が得られる。ある程度のバッファ層１６を原子層
成長した後は、温度を上げＭＯＣＶＤで必要な厚さのＧ
ａＡｓ層１９を成長させる。 ＧａＡＳやＡｌＡｓを
原子層オーダで制御しながら成長できる方法は上述のよ
うな原子層エピタキシに限らない、目的とする原子層の
成長ができる方法であれば良く、ρ１えばＭＢＥを変形
したマイグレーション増進エピタキシ（ｌｉ（ｌｒａｔ
ｉｏｎ ｅｎｈａｎｃｅｄ ｅｐｉｔａｘｙ）（Ｙ、Ｈ
ｏｒｉｋｏｓｈｉ ｅｔ ａｌ、：Ｊｐｎ、Ｊ、 Ａｐ
ｐｌ。FIG. 4 shows another embodiment of the present invention. In the embodiment described above, 100 molecular layers of AlAs are grown first, but
After growing two molecular layers of GaAs, you may proceed to atomic layer epitaxy of GaAs. In Figure 4, 11 is (100).
It is a plane 51 substrate, on which an As atomic layer, a old atomic layer, and an A
When the s atomic layer is grown, the AIAS bilayer 14 and one As atomic layer are grown as described above. Thereafter, by growing Ga atomic layers and As atomic layers alternately on this As atomic layer, a GaAs buffer layer 16 is obtained by atomic layer growth. After growing a certain amount of buffer layer 16 by atomic layer, the temperature is raised and G is grown to the required thickness by MOCVD.
An aAs layer 19 is grown. Methods that can grow GaAS and AlAs while controlling it on the order of atomic layers are not limited to the atomic layer epitaxy described above, but any method that can grow the desired atomic layer can be used, such as migration-enhanced epitaxy, which is a modification of MBE. (li(lrat
ion enhanced epitaxy) (Y, H
orikoshi et al.: Jpn, J. Ap.
pl.
Ｐｈｙｓ、 ２５（１９８６）Ｌ８６８）やＭＯＣＶＤ
を変形した流量変調エピタキシ（ｆｌｏｗ−ｒａｔｅ
１ｏｄｕｆａｔｅｄ ｅｐｉｔａｘｙ）（Ｎ、にｏｂａ
ｙａｓｈｉ ｅｔ ａｌ、：ＪＤｎ、Ｊ、＾ｐｐ１．Ｐ
ｈｙｓ、２５（１９８６） １５１３）等でも、同様な
成長ができる。また、通常のＭＯＣＶＤやＭＢＢの装置
でも原理的には実施できる。これらの成長方法の差は、
１原子層成長に対する完全性であり、この点に関して現
在の技術レベルでは原子層エピタキシが最も優れてぃる
ので結晶成長上好ましい。Phys, 25 (1986) L868) and MOCVD
Flow-rate epitaxy is a modified form of flow-rate epitaxy.
1odufated epitaxy) (N, ni oba
Yashi et al.: JDn, J, ^pp1. P
hys, 25 (1986) 1513) etc., similar growth can be achieved. Further, in principle, it can be carried out using ordinary MOCVD or MBB equipment. The difference between these growth methods is
It is perfect for one atomic layer growth, and atomic layer epitaxy is the best at the current technological level in this respect and is therefore preferable for crystal growth.
原子層成長の際不純物を添加することもできる。Impurities can also be added during atomic layer growth.
例えばＡｌ層中にＳｉを添加してｎ型にしたり、ＡＳＮ
Ｉ中にＳｉを添加してｐ型にしたりしてもよい。For example, adding Si to the Al layer to make it n-type, or
Si may be added to I to make it p-type.
また成長層の成長らＭＯＣＶＤに限らず、液相、気相の
種々の方法を利用できる。Furthermore, the growth of the growth layer is not limited to MOCVD, and various liquid phase and gas phase methods can be used.
ところで３１上のＧａＡｓを例として述べてきたが、他
の下地結晶、成長結晶を用いることもできる。By the way, although GaAs on 31 was described as an example, other base crystals and grown crystals can also be used.
本発明の最も特徴的な点はＡｓ原子層上に約２倍の面密
度を持つＡｌ原子層を成長し、この上に成長を続けるこ
とである。The most characteristic feature of the present invention is that an Al atomic layer having about twice the areal density is grown on the As atomic layer, and growth is continued on this.
ＧａＡｓを成長させる場合、ＡｌＡｓはほぼＧａＡｓと
格子整合する物質であり、Ｓｉは約４％位ＧａＡｓより
小さい格子定数を持つ、一方１ｎＰは約４％位ＧａＡｓ
より大きい格子定数を持つ、このＩｎＰを下地結晶とし
てＧａＡｓエピタキシャル結晶を成長させる場合は、ま
ず＾Ｓ原子層を成長し、次にＡｌ原子層を成長する。When growing GaAs, AlAs is a material that is almost lattice matched to GaAs, Si has a lattice constant about 4% smaller than GaAs, while 1nP has a lattice constant about 4% smaller than GaAs.
When growing a GaAs epitaxial crystal using InP, which has a larger lattice constant, as a base crystal, first a ^S atomic layer is grown, and then an Al atomic layer is grown.
その後は適当にＧａＡｓがＡＩＡＳを原子層成長で成長
してバッファ層を得、続いてＭＯＣＶＤ等の結晶成長を
必要な厚さ分行う。Thereafter, a buffer layer is obtained by appropriately growing GaAs and AIAS by atomic layer growth, and then crystal growth is performed by MOCVD or the like to a required thickness.
Ｓｉの上にＩｎＰを成長する場合は、Ｓｉ基板の上に２
分子層以上のＡｌＡｓ分子層を付け、次にＧａＡｓを例
えば１μｍ成長した後、ＩｎＰを所定の厚みまで成長す
る。When growing InP on Si, two layers are grown on the Si substrate.
After applying a molecular layer of AlAs or more, GaAs is grown to a thickness of, for example, 1 μm, and then InP is grown to a predetermined thickness.
その他、下地結晶としては、ＧａＰ 、 ＧａＡｓ、
ＩｎｘＧ ａ １− ｘ Ａ Ｓ （ｘ≦０．０２）、
ＧＯ等を用いることができる。Other base crystals include GaP, GaAs,
InxG a 1- x A S (x≦0.02),
GO etc. can be used.
また成長層は、ＡｌＡｓ分子層とのなじみがよい、ＡＩ
ＡＳとの格子不整が５％以下の閃亜鉛型結晶楕遣を持つ
■−Ｖ族化合物半導体（混晶を含む〉を成長することが
できる。In addition, the growth layer is made of AI, which has good compatibility with the AlAs molecular layer.
It is possible to grow a -V group compound semiconductor (including mixed crystals) having a zincblende crystal ellipse with a lattice mismatch with AS of 5% or less.
［発明の効果］
以上説明したように、本発明によれば基板と成長層の格
子定数が異なるヘテロエピタキシャル結晶の成長に対し
て最初から単結晶が成長できる。[Effects of the Invention] As described above, according to the present invention, a single crystal can be grown from the beginning in contrast to the growth of a heteroepitaxial crystal in which the lattice constants of the substrate and the growth layer are different.
このため、成長層の品質を向上させる効果があり、これ
を材料としたデバイスの性能向上に寄与するところが大
きい。Therefore, it has the effect of improving the quality of the grown layer, and greatly contributes to improving the performance of devices using it as a material.
第１図（Ａ）〜（Ｄ）は本発明の原理説明図であり、そ
れぞれ結晶の断面図、
第２図（Ａ）〜（Ｃ）は従来技術の２段階成長によるＳ
１上のＧａＡＳ成長を説明する断面図、第３図（Ａ）〜
（Ｈ）は本発明の実施例によるＳ１上のＧａＡｓ成長を
説明する断面図、第４図は本発明の池の実施例によるＳ
ｉ上のＧａＡｓ成長を説明する断面図である。
バ・１７７層内のＡｌ層
バッファ層
エピタキシャル成長層
旧＾Ｓ２分子層
ＧａＡｓバッファ層
８１基板
ＧａＡｓバッファ層
ＧａＡＳ単結晶
図において、
下地結晶
Ａｓ層
４１層
へ１八Ｓまなは目的１勿のバッファ層
目的物の層
Ｓｉ基板
へＳ層
Ａｌ層
バッファ層内の＾ｓｉ
（Ａ）Ａｓ約１原子層成長
（Ｂ）Ａｔ約１原子層ｔｃ長
（Ｃ）バッファ；１１ｔｃ畏
（Ｄ）厚！！！を長
第３図
（Ａ）ＧａＡｓバッファ層の低温成長
（Ｂ）昇温によるバッファ層の再認晶化（Ｃ）ＧａＡｓ
単結晶のエピタキシャル成長従来技術の２段ｉｔ長によ
る
Ｓｉ上のＧａＡｓの成長
第２図
本発明の他の実施例によるＳｉ上のＧａＡｓｔ長第４図Figures 1 (A) to (D) are explanatory diagrams of the principle of the present invention, and Figures 2 (A) to (C) are cross-sectional views of crystals, respectively, and Figures 2 (A) to (C) are S
Cross-sectional view illustrating GaAS growth on 1, FIG. 3(A) ~
(H) is a cross-sectional view illustrating GaAs growth on S1 according to the embodiment of the present invention, and FIG.
FIG. 3 is a cross-sectional view illustrating the growth of GaAs on i. Al layer in the 177th layer Buffer layer Epitaxially grown layer Old ^S2 Molecular layer GaAs buffer layer 81 Substrate GaAs buffer layer In the GaAs single crystal diagram, base crystal As layer 41 layer 18 S Minah purpose 1 Na buffer layer purpose (A) Growth of approximately 1 atomic layer of As (B) Approximately 1 atomic layer of At (tc length) (C) Buffer; 11 tc (D) thickness! ! ! Figure 3 (A) Low-temperature growth of GaAs buffer layer (B) Recrystallization of buffer layer by increasing temperature (C) GaAs
Epitaxial Growth of Single CrystalsGrowth of GaAs on Si by Two Step IT Length of Conventional TechnologyFig. 2Growth of GaAs on Si according to Another Embodiment of the Present InventionFig. 4
Claims (3)
のＩｎ＿ｘＧａ＿１＿−＿ｘＡｓ、これらの混晶のＳｉ
、Ｇｅ、いずれかからなる下地結晶（１）の上にＡｓを
分子または水素化物の形で供給してＡｓ層（３）を形成
する第１準備工程と、 次にＡｌを分子または有機金属ガスの形で供給してＡｌ
層（５）を形成する第２準備工程と、その後、下地結晶
と異なる格子定数でＡｌＡｓの格子定数に対して±５％
以内の格子不整を持つIII−Ｖ族化合物半導体（９）を
成長する成長工程と を含む化合物半導体の成長方法。(1), GaAs, InP, GaP, In_xGa_1_-_xAs where x is 0.02 or less, Si of these mixed crystals
, Ge, a first preparatory step of supplying As in the form of molecules or hydride to form an As layer (3) on the base crystal (1) consisting of any of the following; Al is supplied in the form of
A second preparation step of forming a layer (5), followed by a layer (5) with a lattice constant different from that of the underlying crystal, with a lattice constant of ±5% relative to the lattice constant of AlAs.
a growth step of growing a III-V compound semiconductor (9) having a lattice mismatch within the range of lattice misalignment.
または水素化物の形で供給し、下地結晶上にストイキオ
メトリ以上に付着していたＡｌと２分子層のＡｌＡｓ層
を作る工程を含む請求項１記載の化合物半導体の成長方
法。(2) Following the second preparation step, a step of further supplying As in the form of molecules or hydrides to form a bimolecular layer of AlAs with Al adhering to the base crystal at a stoichiometry or higher level. 2. The method for growing a compound semiconductor according to claim 1.
備サイクルとし、複数回の準備サイクルを行つた後、前
記成長工程に移る請求項１記載の化合物半導体の成長方
法。(3) The method for growing a compound semiconductor according to claim 1, wherein the pair of the first preparation step and the second preparation step is one preparation cycle, and the step of proceeding to the growth step is performed after performing a plurality of preparation cycles.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP32506188A JP2845464B2 (en) | 1988-12-20 | 1988-12-20 | Compound semiconductor growth method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP32506188A JP2845464B2 (en) | 1988-12-20 | 1988-12-20 | Compound semiconductor growth method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH02167895A true JPH02167895A (en) | 1990-06-28 |
| JP2845464B2 JP2845464B2 (en) | 1999-01-13 |
Family
ID=18172718
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|---|---|---|---|
| JP32506188A Expired - Fee Related JP2845464B2 (en) | 1988-12-20 | 1988-12-20 | Compound semiconductor growth method |
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| Country | Link |
|---|---|
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02221196A (en) * | 1989-02-21 | 1990-09-04 | Nec Corp | Formation of thin film of iii-v compound semiconductor |
| EP0450228A2 (en) * | 1990-03-30 | 1991-10-09 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device formed on a silicon substrate or a silicon layer and methods of making the same |
| JP2003101140A (en) * | 2000-09-21 | 2003-04-04 | Ricoh Co Ltd | Surface emitting semiconductor laser element, its manufacturing method, surface emitting semiconductor laser array, light transmitting module, light transmitting and receiving module and optical communication system |
| JP2009206520A (en) * | 2001-09-21 | 2009-09-10 | Ricoh Co Ltd | Semiconductor light-emitting device, method of manufacturing the same, optical transmission module, optical exchanging device, and optical transmission system |
| US7968362B2 (en) | 2001-03-27 | 2011-06-28 | Ricoh Company, Ltd. | Semiconductor light-emitting device, surface-emission laser diode, and production apparatus thereof, production method, optical module and optical telecommunication system |
-
1988
- 1988-12-20 JP JP32506188A patent/JP2845464B2/en not_active Expired - Fee Related
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02221196A (en) * | 1989-02-21 | 1990-09-04 | Nec Corp | Formation of thin film of iii-v compound semiconductor |
| EP0450228A2 (en) * | 1990-03-30 | 1991-10-09 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device formed on a silicon substrate or a silicon layer and methods of making the same |
| JPH03284834A (en) * | 1990-03-30 | 1991-12-16 | Mitsubishi Electric Corp | Semiconductor device |
| US5136347A (en) * | 1990-03-30 | 1992-08-04 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor structure |
| JP2003101140A (en) * | 2000-09-21 | 2003-04-04 | Ricoh Co Ltd | Surface emitting semiconductor laser element, its manufacturing method, surface emitting semiconductor laser array, light transmitting module, light transmitting and receiving module and optical communication system |
| US7968362B2 (en) | 2001-03-27 | 2011-06-28 | Ricoh Company, Ltd. | Semiconductor light-emitting device, surface-emission laser diode, and production apparatus thereof, production method, optical module and optical telecommunication system |
| US8293555B2 (en) | 2001-03-27 | 2012-10-23 | Ricoh Company, Ltd. | Semiconductor light-emitting device, surface-emission laser diode, and production apparatus thereof, production method, optical module and optical telecommunication system |
| JP2009206520A (en) * | 2001-09-21 | 2009-09-10 | Ricoh Co Ltd | Semiconductor light-emitting device, method of manufacturing the same, optical transmission module, optical exchanging device, and optical transmission system |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2845464B2 (en) | 1999-01-13 |
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