JPH02137507A - Amplifier - Google Patents

Amplifier

Info

Publication number
JPH02137507A
JPH02137507A JP29285988A JP29285988A JPH02137507A JP H02137507 A JPH02137507 A JP H02137507A JP 29285988 A JP29285988 A JP 29285988A JP 29285988 A JP29285988 A JP 29285988A JP H02137507 A JPH02137507 A JP H02137507A
Authority
JP
Japan
Prior art keywords
control circuit
amplifier
level control
load
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP29285988A
Other languages
Japanese (ja)
Inventor
Masanori Fujisawa
雅憲 藤沢
Kenichi Kokubo
小久保 憲一
Hiroshi Kojima
弘 小島
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP29285988A priority Critical patent/JPH02137507A/en
Publication of JPH02137507A publication Critical patent/JPH02137507A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To protect the load by providing 2nd level control circuit with an equal characteristic to that of 1st level control circuit and a voltage addition amplifier between a preamplifier and a power amplifier, and supplying the output of the power amplifier and the additional amplifier to both terminals of the load. CONSTITUTION:The 1st level control circuit consists of a 1st variable impedance circuit 2, a control circuit 11 and a variable resistor 12 and the 2nd level control circuit consists of a 2nd variable impedance circuit 6, the control circuit 11 and the variable resistor 12. An AC input signal is amplified by a preamplifier and fed to a load. In this case, an output DC voltage of the 1st level control circuit is amplified by the power amplifier and fed to one terminal of the load and the output DC voltage of the 2nd level control circuit with the equal gain as that of the 1st level control circuit is amplified by the additional amplifier with an equal gain as that of the power amplifier and supplied to the other terminal of the load. Thus, the voltage across the load is equal and the amplifier not giving a DC current to the load is obtained and the load is protected.

Description

【発明の詳細な説明】 (り産業上の利用分野 本発明は、ヘッドフォン等の負荷を駆動するに適した増
幅器に関するもので、特に音量調節の為に用いられるレ
ベル制御回路に起因するパワーアンプの出力直流電圧の
変動があっても、負荷の保護が達成出来る増幅器に関す
る。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an amplifier suitable for driving a load such as a headphone, and particularly relates to an amplifier suitable for driving a load such as a headphone. The present invention relates to an amplifier that can protect the load even if there are fluctuations in the output DC voltage.

(ロ)従来の技術 特開昭63−219214号公報に示される如く、出力
結合コンデンサを省略し得る直結型の増幅器が知られて
いる。この増幅器は、パワーアンプと、該パワーアンプ
の出力直流電圧と略等しい直流電圧を発生するとともに
低出力インピーダンスを呈する付加アンプとを備えてお
り、前記パワーアンプの出力端を負荷の一端に、付加ア
ンプの出力端を前記付加の他端にそれぞれ接続し、前記
負荷に直流電流が流れるのを貼止することにより、出力
結合コンデンサの省略を計ったものである。
(b) Prior Art As disclosed in Japanese Patent Application Laid-Open No. 63-219214, a direct-coupled amplifier is known in which an output coupling capacitor can be omitted. This amplifier includes a power amplifier and an additional amplifier that generates a DC voltage substantially equal to the output DC voltage of the power amplifier and exhibits low output impedance. The output coupling capacitor is omitted by connecting the output ends of the amplifiers to the other ends of the addition and pasting the direct current flowing through the load.

(ハ)発明が解決しようとする課題 前記公報に記載された増幅器は、上述の理由により出力
結合コンデンサの省略が計れるので、IC(集積回路)
化に適したものである。
(c) Problems to be Solved by the Invention The amplifier described in the above-mentioned publication can omit the output coupling capacitor for the above-mentioned reason.
It is suitable for

しかしながら、前記増幅器の場合、入力信号源(プリア
ンプ)とメインアンプとの間に音量を調節する為のレベ
ル制御回路を挿入し、該レベル制御回路を用いてプリア
ンプの出力信号を減衰させルト、それに応じてパワーア
ンプの入力直流電圧が変化し、パワーアンプの出力直流
電圧も変化する。その為、パワーアンプの出力直流電圧
と付加アンプの出力直流電圧とが一致しなくなり、両型
圧の差(オフセット電圧)に応じた直流電流が負荷に流
れる。前記オフセット電圧が大の場合は、負荷が破壊さ
れる。また、前記オフセット電圧が100mV程度であ
っても、16Ωの負荷(ヘッドフオン)を用いれば、約
6.25mAの直流電流が流れ、直流磁化が生じ、歪が
大となって正しい出力が得られなくなる。更に、前記オ
フセット電圧が生じると、レベル制御回路の制御量の変
化に応じてオフセット電圧が変化し、それがノイズとな
って発生するという問題があった。
However, in the case of the above amplifier, a level control circuit for adjusting the volume is inserted between the input signal source (preamplifier) and the main amplifier, and the level control circuit is used to attenuate the output signal of the preamplifier. Accordingly, the input DC voltage of the power amplifier changes, and the output DC voltage of the power amplifier also changes. Therefore, the output DC voltage of the power amplifier and the output DC voltage of the additional amplifier do not match, and a DC current corresponding to the difference (offset voltage) between the two types of pressure flows to the load. If the offset voltage is large, the load will be destroyed. Furthermore, even if the offset voltage is about 100 mV, if a 16 Ω load (headphone) is used, a DC current of about 6.25 mA will flow, causing DC magnetization and increasing distortion, making it impossible to obtain the correct output. . Furthermore, when the offset voltage is generated, there is a problem in that the offset voltage changes in accordance with changes in the control amount of the level control circuit, and this generates noise.

(ニ)課題を解決するための手段 本発明は、上述の点の鑑み成されたもので、プリアンプ
とパワーアンプとの間に挿入される第1レベル制御回路
と略等しい特性を有する第2レベル制御回路と、該第2
レベル制御回路の出力直流電圧を増幅する付加アンプと
を設け、負荷の一端にパワーアンプの出力端を、前記負
荷の他端に付加アンプの出力端をそれぞれ接続したこと
を特徴とする。
(d) Means for Solving the Problems The present invention has been made in view of the above points, and provides a second level control circuit inserted between a preamplifier and a power amplifier that has substantially the same characteristics as the first level control circuit. a control circuit;
The present invention is characterized in that an additional amplifier for amplifying the output DC voltage of the level control circuit is provided, and an output end of the power amplifier is connected to one end of the load, and an output end of the additional amplifier is connected to the other end of the load.

(ホ)作用 本発明に依れば、入力交流信号は、プリアンプで増幅さ
れ、第1レベル制御回路でレベル制御され、パワーアン
プで増幅されて負荷に供給される。その際、第1レベル
制御回路の出力直流電圧もパワーアンプで増幅されて負
荷の一端に印加されるが、前記第1レベル制御回路と略
等しい特性を有する第2レベル制御回路の出力直流電圧
がパワーアンプと略等しい利得を有する付加アンプで増
幅され、前記パワーアンプの出力直流電圧と略等しい直
流電圧が付加アンプから負荷の他端に印加されるので、
負荷の両端直流電圧は略等しくなり、負荷に直流電流が
流れない。
(e) Function According to the present invention, the input AC signal is amplified by the preamplifier, level-controlled by the first level control circuit, amplified by the power amplifier, and supplied to the load. At this time, the output DC voltage of the first level control circuit is also amplified by the power amplifier and applied to one end of the load, but the output DC voltage of the second level control circuit, which has approximately the same characteristics as the first level control circuit, is It is amplified by an additional amplifier having a gain approximately equal to that of the power amplifier, and a DC voltage approximately equal to the output DC voltage of the power amplifier is applied from the additional amplifier to the other end of the load.
The DC voltages at both ends of the load are approximately equal, and no DC current flows through the load.

(へ)実施例 第1図は、本発明をステレオ増幅器に使用した例を示す
回路図で、り1)は右チヤンネルステレオ信号を増幅す
る第1プリアンプ、〈2)は該第1プノアンブ(1)の
出力信号を減衰させる第1可変インピーダンス回路、(
3)は該第1可変インピーダンス回路(2)の出力信号
を増幅する第1パワーアンプ、(4)は該第1パワーア
ンプ(3)の出力信号が印加される負荷となる第1へッ
ドフオン、(5)は右チヤンネルステレオ信号を増幅す
る第2プリアンプ、(6)は第2可変インピーダンス回
路、(7)は第2パワーアンプ、(8〉は第2ヘツドフ
オン、(9)は前記第1及び第2可変インピーダンス回
路(2)及び<6)と等しい構成を有する第3可変イン
ピーダンス回路、(10)は該第3可変インピーダンス
回路(9)の出力直流電圧を増幅する付加アンプ、及び
(11)は前記第1乃至第3可変インピーダンス回路(
2)乃至(9)を共通に制御する制御信号を、ボッニー
ム(12)の可動端子の位置に応じて発生する制御回路
であり、第1可変インピーダンス回路(2)、制御回路
(11)及びボリューム(12)によって第1レベル制
御回路が構成され、第2可変インピーダンス回路(6〉
、制御回路(11)及びボリューム(12)によって第
2レベル制御回路が構成され、第3可変インピーダンス
回路(9)、制御回路(11)及びボリュームク12)
によって第3レベル制御回路が構成されている。
(F) Embodiment Figure 1 is a circuit diagram showing an example in which the present invention is used in a stereo amplifier. ) a first variable impedance circuit that attenuates the output signal of (
3) is a first power amplifier that amplifies the output signal of the first variable impedance circuit (2); (4) is a first headphone that serves as a load to which the output signal of the first power amplifier (3) is applied; (5) is the second preamplifier that amplifies the right channel stereo signal, (6) is the second variable impedance circuit, (7) is the second power amplifier, (8> is the second headphone, and (9) is the first and A third variable impedance circuit having the same configuration as the second variable impedance circuit (2) and <6), (10) an additional amplifier that amplifies the output DC voltage of the third variable impedance circuit (9), and (11) are the first to third variable impedance circuits (
This is a control circuit that generates a control signal that commonly controls 2) to (9) according to the position of the movable terminal of the bonneim (12), and includes the first variable impedance circuit (2), the control circuit (11), and the volume control circuit. (12) constitutes the first level control circuit, and the second variable impedance circuit (6>
, a control circuit (11) and a volume control circuit (12) constitute a second level control circuit, and a third variable impedance circuit (9), a control circuit (11) and a volume control circuit (12).
The third level control circuit is configured by:

制御回路(11)は、ボリューム(12)の可動端子の
位置に応じた制御信号を発生し、第1乃至第3可変イン
ピーダンス回路り2〉乃至(9)は前記制御信号のレベ
ルに応じたインピーダンスを呈する。その為、左右チャ
ンネルステレオ信号は、それぞれ第1及び第2プリアン
プ(1)及び(5)で増幅され、第1及び第2可変イン
ピーダンス回路(2)及び(6)の呈するインピーダン
スに応じて減衰され、第1及び第2パワーアンプ(3)
及び(7〉で増幅されて、第1及び第2ヘツドフオン(
4)及び(8)が印加される。
The control circuit (11) generates a control signal according to the position of the movable terminal of the volume (12), and the first to third variable impedance circuits 2 to (9) generate impedances according to the level of the control signal. exhibits. Therefore, the left and right channel stereo signals are amplified by the first and second preamplifiers (1) and (5), respectively, and attenuated according to the impedances presented by the first and second variable impedance circuits (2) and (6). , first and second power amplifiers (3)
and (7>), and the first and second headphone (
4) and (8) are applied.

一方、第3可変インピーダンス回路(9)の出力直流電
圧は、第1及び第2可変インピーダンス回路(2)及び
(6)のそれと等しい値となり、第1及び第2パワーア
ンプ(3)及び(7)と等しい利得の付加アンプ(10
)で増幅きれ、第1及び第2ヘツドフオン(4)及び(
8)の他端に印加される。その為、第1及び第2へッド
フオン(4〉及び(8〉の両端の直流電圧は互いに等し
くなり、第1及び第2ヘツドフオン(4)及び(8)に
直流電流が流れない。また、付加アンプ(10)の出力
インピーダンスは、負帰還により十分小に成されている
ので、第1及び第2パワーアンプ(3)及び(7)の出
力交流信号により、第1及び第2へッドフオン(4)及
び(8)が十分に駆動される。
On the other hand, the output DC voltage of the third variable impedance circuit (9) has a value equal to that of the first and second variable impedance circuits (2) and (6), and the output DC voltage of the third variable impedance circuit (9) has a value equal to that of the first and second variable impedance circuits (2) and (6). ) with a gain equal to (10
), the first and second headphone (4) and (
8) is applied to the other end. Therefore, the DC voltages across the first and second headphones (4) and (8) are equal to each other, and no DC current flows through the first and second headphones (4) and (8). Since the output impedance of the amplifier (10) is made sufficiently small by negative feedback, the output AC signals of the first and second power amplifiers (3) and (7) cause the first and second headphone (4) to ) and (8) are fully driven.

従って、第1図の増幅器を用いれば、第1及び第2へッ
ドフオン(4)及び(8)が十分に駆動することが出来
、ボリュームに応じた音量調節が出来、しかも第1及び
第2ヘツドフオン(4)及び(8)に直流電流が流れる
のを防止出来る。
Therefore, if the amplifier shown in FIG. 1 is used, the first and second headphones (4) and (8) can be sufficiently driven, the volume can be adjusted according to the volume, and the first and second headphones It is possible to prevent direct current from flowing through (4) and (8).

第3図は、第1図のレベル制御回路の具体回路例を示す
もので、(18)はバッファアンプ、(19)は差動接
続された第1及び第2トランジスタ(2o)及び(21
)と、該第1及び第2トランジスタ(2o)及び(21
)の負荷として接続された第1電流ミラー回路(η〉と
、前記第1及び第2トランジスタ(2o)及び(21)
の共通エミッタに接続された電流源となる第2電流ミラ
ー回路(η)とによって構成される第1可変抵抗部、(
都)は第3及び第4トランジスタ(25)及び(26)
と、該第3及び第4トランジスタ(25)及び(26)
の共通エミッタに接続された電流源となる第3電流ミラ
ー回路(27〉とによって構成される第2可変抵抗部、
(28)はバイアス電源、(29)はボリューム、及び
(並〉は該ボリューム(29)の抵抗値ニ応シたコレク
タ電流を発生する入力トランジスタ(31)と、該コレ
クタ電流を反転する第4及び第5電流ミラー回路(婬)
及び(33)と、該第5電流ミラー回路(嬰)の出力電
流を反転する第6電流ミラー回路(34)と、定電流源
(35)とによって構成される制御部である。
FIG. 3 shows a specific circuit example of the level control circuit shown in FIG. 1, in which (18) is a buffer amplifier, (19) is a differentially connected first and second transistor (2o) and
), and the first and second transistors (2o) and (21
) and the first and second transistors (2o) and (21) connected as a load of the first current mirror circuit (η)
and a second current mirror circuit (η) serving as a current source connected to a common emitter of
) are the third and fourth transistors (25) and (26)
and the third and fourth transistors (25) and (26)
a second variable resistance section constituted by a third current mirror circuit (27) serving as a current source connected to a common emitter of the
(28) is a bias power supply, (29) is a volume, and (28) is an input transistor (31) that generates a collector current corresponding to the resistance value of the volume (29), and a fourth transistor that inverts the collector current. and the fifth current mirror circuit (婬)
and (33), a sixth current mirror circuit (34) that inverts the output current of the fifth current mirror circuit (34), and a constant current source (35).

ボリューム(29)の可動端子がバイアス電源(28)
側にあれば、入力トランジスタ(31)と第4乃至第6
電流ミラー回路(32)乃至(34)に流れる電流が大
になり、第4電流ミラー回路(32)の出力電流が供給
される第2電流ミラー回路(23)の電流も大になる。
The movable terminal of the volume (29) is the bias power supply (28)
If it is on the side, the input transistor (31) and the fourth to sixth
The current flowing through the current mirror circuits (32) to (34) becomes large, and the current of the second current mirror circuit (23) to which the output current of the fourth current mirror circuit (32) is supplied also becomes large.

その為、第1可変抵抗部(19)の抵抗値は小になる。Therefore, the resistance value of the first variable resistance section (19) becomes small.

一方、第6電流ミラー回路(34)の出力電流が大にな
ると、定電流源(35)の出力電流の吸引量が大になり
、第3電流ミラー回路(27)に流れる電流が小になる
ので、第2可変抵抗部(24)の抵抗値が大になる。
On the other hand, when the output current of the sixth current mirror circuit (34) becomes large, the amount of output current drawn from the constant current source (35) becomes large, and the current flowing through the third current mirror circuit (27) becomes small. Therefore, the resistance value of the second variable resistance section (24) becomes large.

ボリューム(29)の可動端子が逆にアース側にあれば
、入力トランジスタ(31)と第4乃至第6電流ミラー
回路(32)乃至(34)に流れる電流が小になり、そ
れに応じて第1可変抵抗部(19)の抵抗値が大、第2
可変抵抗部(24)の抵抗値が小になる。
Conversely, if the movable terminal of the volume (29) is on the ground side, the current flowing through the input transistor (31) and the fourth to sixth current mirror circuits (32) to (34) becomes smaller, and the first The resistance value of the variable resistance part (19) is large, the second
The resistance value of the variable resistance section (24) becomes small.

第3図のレベル制御回路を第1図の第3レベル制御回路
として使用する場合は、入力端子(36)を第1プリア
ンプ(1)の出力端に、出力端子(38)を第1パワー
アンプ(3)の入力端に接続すればよい。そして、第2
及び第3可変インピーダンス回路(6)及び(9)とし
て、バッファアンプ(1g)、第1及び第2可変抵抗部
(す)及び(都)と等しい回路を設け、第4及び第5電
流ミラー回路(32)及び(33)と並列に電流ミラー
回路を設けて前記等しい回路の制御を行なえば、第1図
の第1乃至第3レベル制御回路の特性を等しくすること
が出来る。
When using the level control circuit of FIG. 3 as the third level control circuit of FIG. 1, the input terminal (36) is connected to the output terminal of the first preamplifier (1), and the output terminal (38) Just connect it to the input end of (3). And the second
And as the third variable impedance circuits (6) and (9), circuits equivalent to the buffer amplifier (1g), the first and second variable resistance sections (su) and (to) are provided, and the fourth and fifth current mirror circuits are provided. If a current mirror circuit is provided in parallel with (32) and (33) to control the equal circuits, the characteristics of the first to third level control circuits in FIG. 1 can be made equal.

(ト)発明の効果 以上述べた如く、本発明に依れば、パワーアンプと負荷
とを直結出来る出力結合コンデンサの無い増幅器を提供
出来る。また、本発明に依れば、プリアンプとパワーア
ンプとの間にレベル制御回路を挿入した場合でも、負荷
に直流電流を流さない増幅器を提供出来、負荷の破壊や
直流磁化を防止出来、かつノイズの発生を防止出来る。
(G) Effects of the Invention As described above, according to the present invention, it is possible to provide an amplifier without an output coupling capacitor that can directly connect a power amplifier and a load. Further, according to the present invention, even when a level control circuit is inserted between the preamplifier and the power amplifier, it is possible to provide an amplifier that does not allow direct current to flow through the load, which prevents damage to the load and direct current magnetization, and which also prevents noise. The occurrence of can be prevented.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、本発明の一実施例を示す回路図、及び第2図
はそのレベル制御回路の具体回路例を示す回路図である
。 (1) 、 (5)・・・プリアンプ、 (2) 、 
(6) 、 (9)・・・可変インピーダンス回路、(
3)、(7)・・・パワーアンブ、 (10)・・・付加アンプ、 (11)・・・制御回路、 (12)・・・ボリューム。
FIG. 1 is a circuit diagram showing one embodiment of the present invention, and FIG. 2 is a circuit diagram showing a specific example of the level control circuit. (1), (5)...Preamplifier, (2),
(6), (9)...variable impedance circuit, (
3), (7)...Power amplifier, (10)...Additional amplifier, (11)...Control circuit, (12)...Volume.

Claims (2)

【特許請求の範囲】[Claims] (1)入力信号を増幅するプリアンプと、該プリアンプ
の出力信号のレベル制御を行なう第1レベル制御回路と
、該第1レベル制御回路の出力信号を増幅して負荷に供
給するパワーアンプとを備える増幅器において、前記第
1レベル制御回路と略等しい特性を有する第2レベル制
御回路と、該第2レベル制御回路の出力直流電圧を増幅
し、前記パワーアンプの出力直流電圧と略等しい直流電
圧を発生する付加アンプとを設け、前記パワーアンプの
出力端と前記付加アンプの出力端との間に負荷を接続し
たことを特徴とする増幅器。
(1) Includes a preamplifier that amplifies an input signal, a first level control circuit that controls the level of the output signal of the preamplifier, and a power amplifier that amplifies the output signal of the first level control circuit and supplies it to a load. In the amplifier, a second level control circuit having characteristics substantially equal to those of the first level control circuit; and amplifying the output DC voltage of the second level control circuit to generate a DC voltage substantially equal to the output DC voltage of the power amplifier. 1. An amplifier comprising: an additional amplifier, wherein a load is connected between an output end of the power amplifier and an output end of the additional amplifier.
(2)前記第1及び第2レベル制御回路は、手動制御さ
れるボリュームの抵抗値に応じて発生する直流制御電流
によって制御されることを特徴とする請求項第1項記載
のレベル制御回路。
(2) The level control circuit according to claim 1, wherein the first and second level control circuits are controlled by a DC control current generated according to a resistance value of a manually controlled volume.
JP29285988A 1988-11-18 1988-11-18 Amplifier Pending JPH02137507A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP29285988A JPH02137507A (en) 1988-11-18 1988-11-18 Amplifier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP29285988A JPH02137507A (en) 1988-11-18 1988-11-18 Amplifier

Publications (1)

Publication Number Publication Date
JPH02137507A true JPH02137507A (en) 1990-05-25

Family

ID=17787296

Family Applications (1)

Application Number Title Priority Date Filing Date
JP29285988A Pending JPH02137507A (en) 1988-11-18 1988-11-18 Amplifier

Country Status (1)

Country Link
JP (1) JPH02137507A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002095936A1 (en) * 2001-05-21 2002-11-28 Niigata Seimitsu Co., Ltd. Audio output amplifier
WO2002095935A1 (en) * 2001-05-21 2002-11-28 Niigata Seimitsu Co., Ltd. Audio output amplifier

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002095936A1 (en) * 2001-05-21 2002-11-28 Niigata Seimitsu Co., Ltd. Audio output amplifier
WO2002095935A1 (en) * 2001-05-21 2002-11-28 Niigata Seimitsu Co., Ltd. Audio output amplifier

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