JPH02122598A - Ceramic multilayer wiring board and manufacture thereof - Google Patents

Ceramic multilayer wiring board and manufacture thereof

Info

Publication number
JPH02122598A
JPH02122598A JP27581288A JP27581288A JPH02122598A JP H02122598 A JPH02122598 A JP H02122598A JP 27581288 A JP27581288 A JP 27581288A JP 27581288 A JP27581288 A JP 27581288A JP H02122598 A JPH02122598 A JP H02122598A
Authority
JP
Japan
Prior art keywords
ceramic
wiring board
multilayer wiring
ceramic multilayer
atmosphere
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP27581288A
Other languages
Japanese (ja)
Inventor
Kenichi Hoshi
健一 星
Shoichi Tosaka
正一 登坂
Susumu Hirooka
広岡 晋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Taiyo Yuden Co Ltd
Original Assignee
Taiyo Yuden Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Taiyo Yuden Co Ltd filed Critical Taiyo Yuden Co Ltd
Priority to JP27581288A priority Critical patent/JPH02122598A/en
Publication of JPH02122598A publication Critical patent/JPH02122598A/en
Pending legal-status Critical Current

Links

Landscapes

  • Parts Printed On Printed Circuit Boards (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

PURPOSE:To obtain a ceramic wiring board able to be burned at higher temperature than in the past and having high reliability by burning a ceramic multilayer wiring board having a conductor containing Ag or an Ag alloy on the surface and between layers of a ceramic sheet laminated in multilayers. CONSTITUTION:Ag paste is screen-printed on a green sheet made of ceramic, wherein a viahole is formed, and at the same time the inside of the viahole also is filled with Ag paste. A plurality of sheets like this are piled up to be pressure-fixed for being laminated. An unburnt ceramic board made in this way is heated in the atmosphere to be given debinding treatment. Next, nitrogen gas is introduced into a furnace for being replaced by oxygen concentration under 50000ppm followed by burning in order to obtain a ceramic multilayer wiring board.

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明は、kg若しくはAg−Pdj#体を配線導体し
て使用したセラミック多層配線基板とその製造方法に関
する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a ceramic multilayer wiring board using kg or Ag-Pdj# body as a wiring conductor, and a method for manufacturing the same.

[従来の技術] 電子回路の小型化、高密度化に伴って、多層配線基板が
多く採用されている。なかでもセラミック多層配線基板
は、配線の高密度化が可能なため、広く採用されている
[Prior Art] As electronic circuits become smaller and more densely packed, multilayer wiring boards are increasingly being used. Among these, ceramic multilayer wiring boards are widely used because they enable high wiring density.

このセラミック多層配線基板が広く採用されるに伴い、
これに対する製造コストの低減の要望が高まり、この要
望を満たす為に、様々な開発が進められている。例えば
、低温焼結可能なセラミック材料の開発を図り、これに
より焼成費用を低下させたり、配線導体を比較的低価格
の金属を主体とするペーストで形成する事が出来るよう
にする等の対策がその代表的な例である。これにより、
配線基板として必要とされる特性を維持したまま、製造
費用の削減が試みられ、その成果として、コストダウン
ンが図られてる。
As this ceramic multilayer wiring board becomes widely adopted,
In response to this, there is an increasing demand for reducing manufacturing costs, and various developments are underway to meet this demand. For example, we are trying to develop ceramic materials that can be sintered at low temperatures, thereby reducing firing costs, and making it possible to form wiring conductors with pastes mainly made of relatively low-cost metals. This is a typical example. This results in
Attempts have been made to reduce manufacturing costs while maintaining the characteristics required for wiring boards, and as a result, cost reductions have been achieved.

セラミック多層配線基板は、未焼成セラミックシート上
に、導電性ペーストを所定の回路パターンに従って印刷
し、これを重ね合わせて圧若し、焼成して製造される。
A ceramic multilayer wiring board is manufactured by printing conductive paste on an unfired ceramic sheet according to a predetermined circuit pattern, overlapping the sheets, pressing, and firing.

製造されたセラミック多層基板の模式的な構造を第1図
に示してあり、同図において、1は焼成されたセラミッ
ク基板、2セラミツク基板lの層間に形成された回路パ
ターンを形成する内部導体、4は積1nされたセラミッ
ク基板Iの表面に形成された回路パターンを形成する外
部導体、3はセラミック基板1の各層間の回路を接続す
るため、バアイアホールに充填されたホール導体である
The schematic structure of the produced ceramic multilayer board is shown in Figure 1, in which 1 is a fired ceramic substrate, 2 is an internal conductor forming a circuit pattern formed between the layers of the ceramic substrate l; 4 is an external conductor forming a circuit pattern formed on the surface of the laminated ceramic substrate I; 3 is a hole conductor filled in a via hole for connecting circuits between layers of the ceramic substrate 1;

[発明が解決しようとする課題] セラミック多層配線基板の前記導体2.3.4を形成す
るための材料となる印刷用の導電ペーストとしては、形
成された導体2.3.4の抵抗値が低い串、及び材料の
入手が比較的容易である串等の理由により、Ag若しく
はAg−Pd合金を主体とする導電ペーストが一般に用
いられている。
[Problems to be Solved by the Invention] As a conductive paste for printing, which is a material for forming the conductor 2.3.4 of the ceramic multilayer wiring board, the resistance value of the formed conductor 2.3.4 is Conductive pastes based on Ag or Ag-Pd alloys are generally used because of the low skewers and relatively easy availability of skewers.

Agペーストを用い゛C回路パターンが印刷されたセラ
ミック多層配線基板は、大気中で850〜900°C程
度の温度で焼成されている。これは、Agの融点が約9
60°Cである事から900℃以上の温度で焼成すると
、Agがセラミック中に拡散し、これが原因でセラミッ
クの絶縁性の低下や、回路を構成している導体の抵抗値
の増大を招くためである。
A ceramic multilayer wiring board on which a C circuit pattern is printed using Ag paste is fired in the atmosphere at a temperature of about 850 to 900°C. This means that the melting point of Ag is approximately 9
Since the temperature is 60°C, if fired at a temperature of 900°C or higher, Ag will diffuse into the ceramic, which will cause a decrease in the insulation properties of the ceramic and an increase in the resistance value of the conductors that make up the circuit. It is.

しかし一方において、多層配線基板を構成するセラミッ
ク絶縁材料を、850〜900°Cという低い温度で焼
成しようとする場合は、セラミック材料の中にガラス成
分を多(含ませなければならないため、焼成後の抗折強
度が低下するという問題が生じる。
However, on the other hand, when firing the ceramic insulating material that makes up the multilayer wiring board at a low temperature of 850 to 900°C, the ceramic material must contain a large amount of glass component, so A problem arises in that the bending strength of the steel decreases.

このような欠点を解消しようとして試みられた手段に、
導体ペーストとしてAg−Pd合金を主体とするものを
用いて、基板を積層後、これを900〜1000℃の温
度で焼成する方法がある。しかし、導体としてAg−P
d合金を用いた場合、導体にAgを用いた場合と比較し
て、回路を構成する導体の抵抗値が約3倍以上も高4な
る言う欠点があり、限られた分野にしか利用出来ない。
Measures that have been attempted to overcome these shortcomings include:
There is a method in which substrates are laminated using a conductive paste mainly composed of an Ag-Pd alloy and then fired at a temperature of 900 to 1000°C. However, as a conductor, Ag-P
When using d-alloy, there is a disadvantage that the resistance value of the conductor that makes up the circuit is about three times higher than when using Ag for the conductor, so it can only be used in limited fields. .

本発明の目的は、上記課題を解消する事ができるセラミ
ック多層配線基板とその製造方法を提供する11にある
An object of the present invention is to provide a ceramic multilayer wiring board and a method for manufacturing the same that can solve the above problems.

[課題を解消する為の手段] すなわち、上記目的を達成する為の手段の要旨は、第一
に、多層に積層されたセラミックシートの表面及び層間
にAg若しくはAg合金を含む導体を有するセラミック
多層配線基板に於いて、セラミックと導体が低酸素濃度
雰囲気中で焼成されたセラミック多層配線基板である。
[Means for solving the problem] That is, the gist of the means for achieving the above object is, firstly, a ceramic multilayer having a conductor containing Ag or an Ag alloy on the surface of multilayered ceramic sheets and between the layers. This is a ceramic multilayer wiring board in which ceramic and conductor are fired in a low oxygen concentration atmosphere.

第二に、未焼成セラミックシート上に、Ag若しくはA
g合金を含む導電ペーストを塗布し、これらセラミック
シートをM INして焼成するセラミック多層配線基板
の製造方法に於いて、焼成雰囲気を低酸素濃度雰囲気と
するセラミック多層配線基板の製造方法である。
Second, Ag or A
In this method of manufacturing a ceramic multilayer wiring board, the firing atmosphere is a low oxygen concentration atmosphere in a method of manufacturing a ceramic multilayer wiring board in which a conductive paste containing g-alloy is applied, these ceramic sheets are MINed, and fired.

第三に、ベースとなる絶縁性シート上に、絶縁性セラミ
ックペーストとAg若しくはAg合金を含む導電ペース
トを交互に塗布し、得られた積層体を焼成するセラミッ
ク多層配線基板の製造方法に於いて、焼成雰囲気を低酸
素濃度雰囲気とするセラミック多層配線基板の製造方法
である。
Thirdly, in a method for manufacturing a ceramic multilayer wiring board, in which an insulating ceramic paste and a conductive paste containing Ag or an Ag alloy are alternately applied on an insulating sheet serving as a base, and the resulting laminate is fired. , a method for manufacturing a ceramic multilayer wiring board in which the firing atmosphere is a low oxygen concentration atmosphere.

さらに、上記低酸素は、具体的には50000ppm以
下の酸素濃度雰囲気であるセラミック多層配線基板の製
造方法である。
Furthermore, the above-mentioned low oxygen is specifically a method for manufacturing a ceramic multilayer wiring board in which the atmosphere has an oxygen concentration of 50,000 ppm or less.

[作  用コ Ag若しくはAgを含む#電ペーストを、大気中より十
分酸素の濃度が低い雰囲気、より具体向には酸素濃度5
0000ppm以下の雰囲気中で焼成すると、Agの活
性が低下し、焼成時にセラミック中へのAgの拡散が極
度に抑えられる。
[Action: Ag or #electrical paste containing Ag is placed in an atmosphere with a sufficiently lower oxygen concentration than in the atmosphere, more specifically in an oxygen concentration of 5.
When fired in an atmosphere of 0,000 ppm or less, the activity of Ag decreases, and the diffusion of Ag into the ceramic during firing is extremely suppressed.

このため1、大気中におけるAgの融点若しくはAg合
金の固相線温度に近い温度で焼成しても、セラミック基
板の中へAgが拡散しにくい。
For this reason, 1. Even when fired at a temperature close to the melting point of Ag in the atmosphere or the solidus temperature of an Ag alloy, Ag is difficult to diffuse into the ceramic substrate.

従って、焼成温度を900℃以上にしても導体の抵抗値
が増大せず、また絶縁性セラミックの絶縁抵抗も低下し
ない。
Therefore, even if the firing temperature is set to 900° C. or higher, the resistance value of the conductor does not increase, and the insulation resistance of the insulating ceramic does not decrease.

[実 施 例] 次に、本発明の具体的な実施例について詳細に説明する
[Example] Next, specific examples of the present invention will be described in detail.

(実施例1) Al2O2が45重、Fl %、S i 027’l’
35mi’u%、B 203が8重伍%、CaOが5型
組%、Mgoが3.5重徂%、Cr2O3が31ff1
%、Li2Oが0.51重1%からなるセラミック原料
粉末と、トルエン、エタノールが1対1の混合溶媒中に
、ポリビニルブチラールを溶解した佇F3 /<インダ
と、ジブチルフタレート(可M1)?fll )と、オ
レイン酸(分散剤)とをボールミルで混合し、セラミッ
ク原料のスラリを用意した。
(Example 1) Al2O2 is 45 times, Fl %, S i 027'l'
35mi'u%, B203 is 8%, CaO is 5%, Mgo is 3.5%, Cr2O3 is 31ff1
%, a ceramic raw material powder consisting of 0.51% by weight of Li2O, and polyvinyl butyral dissolved in a mixed solvent of 1:1 of toluene and ethanol. flll) and oleic acid (dispersant) were mixed in a ball mill to prepare a slurry of ceramic raw materials.

このスラリを真空脱泡機で脱泡した後、これからドクタ
ーブレード法によって、厚さ250μmの長尺なグリー
ンシートを形成した。このグリーンシートを所定の大き
さ、例えば50mmX120mmに切断し、このシート
上に直径200μmのL!r通孔を152数形成してバ
アイアホールを形成した。
After degassing this slurry using a vacuum degassing machine, a long green sheet with a thickness of 250 μm was formed from it by a doctor blade method. This green sheet is cut into a predetermined size, for example, 50 mm x 120 mm, and an L with a diameter of 200 μm is placed on the sheet. A via hole was formed by forming 152 r through holes.

またこれとは別に、エチルセルローズをテレピネオール
溶剤で溶量1したバインダ中に、Ag粉末(比表面積1
.53♂/g)を加えて混練し、Agペーストを作った
Separately, Ag powder (specific surface area 1
.. 53♂/g) was added and kneaded to make an Ag paste.

前記バアイアホールを形成したグリーンシート上に、前
記Agペーストをスクリーン印刷し、これと同時にバア
イアホールの内部にもAgペーストを充填した。このよ
うなシートを複数枚重ねて、90°Cに保温したまま、
200kg/cm2の圧力で圧着した。
The Ag paste was screen printed on the green sheet on which the Bahia holes were formed, and at the same time, the Ag paste was also filled inside the Bahia holes. Stack multiple sheets like this and keep them warm at 90°C.
Pressure bonding was carried out at a pressure of 200 kg/cm2.

こうして作られた未焼成のセラミックJ、L412を、
まず大気中で、3°C/minの温度勾配で室温から6
00°Cまで昇l晶させ、続いて600 ’Cの温度を
30分間保持し、その後−10″C/minの温度勾配
で室温まで冷却し、脱バインタ処理を行った。
The unfired ceramic J, L412 made in this way,
First, in the atmosphere, with a temperature gradient of 3°C/min from room temperature to 6°C.
The crystals were raised to 00°C, then maintained at a temperature of 600°C for 30 minutes, and then cooled to room temperature with a temperature gradient of -10°C/min to perform debinding treatment.

次ぎに炉内に窒素ガスを導入し、これで炉内のガスを1
a換した後、20°C/minの温度勾配で室温から9
20℃まで昇温させ、続いて920°Cの温度を10分
間保持した後、−20°C/minの温度勾配で室温ま
で冷却した。この時の炉内の酸素濃度をジルコニア式酸
素濃度計によって測定した結果toppmであった。
Next, introduce nitrogen gas into the furnace, which reduces the gas in the furnace to 1
After converting to a temperature gradient of 20°C/min from room temperature to 9.
The temperature was raised to 20°C, and then the temperature was maintained at 920°C for 10 minutes, and then cooled to room temperature with a temperature gradient of -20°C/min. At this time, the oxygen concentration in the furnace was measured using a zirconia oxygen concentration meter and was found to be top per million.

以上の方法で作られたセラミック多層配線基板の配線抵
抗を測定し、面積抵抗率を求めた結果は1.5mΩ/口
であった。また、線間の絶縁抵抗は全てlXl0I”Ω
以上であった。
The wiring resistance of the ceramic multilayer wiring board made by the above method was measured, and the sheet resistivity was found to be 1.5 mΩ/hole. Also, the insulation resistance between the lines is lXl0I”Ω
That was it.

(実施例2) 上記実施例!にt1金いて、焼成時の炉内雰囲気の窒素
ガスと空気ガスとが500:  1の割合で混合された
混合ガスに代えた事以外は、同実施例1と同様の条件で
セラミック多層配線基板を装造した。この時の炉内の酸
素濃度は420ppmであった。
(Example 2) The above example! A ceramic multilayer wiring board was fabricated under the same conditions as in Example 1, except that the atmosphere in the furnace at the time of firing was replaced with a mixed gas in which nitrogen gas and air gas were mixed at a ratio of 500:1. was equipped. The oxygen concentration in the furnace at this time was 420 ppm.

これによってX!ADiされたセラミック多層配線基板
の配線の面積抵抗率を求めた結果は1. 6mΩ/口で
あった。また、線間の絶縁抵抗は全て1xto+8Ω以
上であった。
With this, X! The results of determining the sheet resistivity of the wiring of the ADi ceramic multilayer wiring board are 1. It was 6 mΩ/mouth. Moreover, the insulation resistance between the lines was all 1×to+8Ω or more.

(実施例3) 上記実施例1において、焼成時の炉内゛雰囲気を、窒素
ガスと空気ガスとが20: 1の割合で混合された混合
ガスに代えた事以外は、同実施例1と同様の条件でセラ
ミック多層配線ノ1(板を製造した。この時の炉内の酸
素濃度は10,000ppmであった。
(Example 3) Same as Example 1 except that the atmosphere in the furnace during firing was changed to a mixed gas of nitrogen gas and air gas at a ratio of 20:1. Ceramic multilayer wiring board No. 1 was manufactured under similar conditions. The oxygen concentration in the furnace at this time was 10,000 ppm.

これによって製造されたセラミック多層配線基板の配線
の面積抵抗率を求めた結果は2.0mΩ/口であった。
The area resistivity of the wiring of the ceramic multilayer wiring board thus manufactured was determined to be 2.0 mΩ/hole.

また、線間の絶8抵抗は全てlXl0I”Ω以上であっ
た。
Moreover, the absolute resistance between the lines was all 1X10I''Ω or more.

(実施例4) 上記実施例1と同様の方法で、焼成時の炉内雰囲気を窒
素ガスと空気とを3.2:  Iの;Q11合で混合さ
れた混合ガスに代え、それ以外は同実施例1と同様にし
てセラミック多層配線1.rr板を製作した。この時の
焼成時の炉内酸素濃度は50000pp−であった。
(Example 4) In the same manner as in Example 1 above, the atmosphere in the furnace during firing was changed to a mixed gas of 3.2:I;Q11 for nitrogen gas and air, and other conditions were the same. Ceramic multilayer wiring 1 in the same manner as in Example 1. I made an rr board. The oxygen concentration in the furnace during firing at this time was 50,000 pp-.

これによって製造されたセラミック多層配線基板の配線
の面積抵抗率を求めた結果は3.0m07口であった。
The area resistivity of the wiring of the ceramic multilayer wiring board thus manufactured was determined to be 3.0m07.

また、線間の絶縁抵抗は全て!×lOΩ1以上であった
Also, the insulation resistance between the lines is all! ×lOΩ1 or more.

(比較例1) 上記実施例Iにおいて、焼成時の炉内?f囲気を大気中
としたXII以外は、上記実施例1と同様の条件でセラ
ミック多jr1配線基板を製造した。
(Comparative Example 1) In the above Example I, inside the furnace during firing? A ceramic multi-layer jr1 wiring board was manufactured under the same conditions as in Example 1 above except for XII in which the atmosphere was set to the atmosphere.

この時の炉内の酸素濃度は21%であった。The oxygen concentration in the furnace at this time was 21%.

これによって製造されたセラミック多層配線基板の配線
の面積抵抗率を求めた結果は4.2mΩ/口であった。
The area resistivity of the wiring of the ceramic multilayer wiring board manufactured in this way was determined to be 4.2 mΩ/hole.

また、線間の絶縁抵抗については、一部がlX1090
以下であった。
Also, regarding the insulation resistance between the lines, some parts are lX1090
It was below.

(実施例5) 上記実施例1に於いて、セラミック基板を形成するセラ
ミック原料粉末のxl【成を、Al2O3が48重量%
、S i 02 カ34 mf?t%、B 203が7
重量%、CaOが4重M%、M g Oh’ 3゜5重
M%、Cr2Chが爪凱%、Li>Oが0゜5重量%に
代えた事と、焼成温度を950°Cとした小以外は、同
実施例1と同様にしてセラミック多層配線基板を製作し
た。
(Example 5) In the above Example 1, the xl composition of the ceramic raw material powder forming the ceramic substrate was 48% by weight of Al2O3.
, S i 02 Ka34 mf? t%, B 203 is 7
Weight%, CaO was changed to 4% by weight, Mg Oh' 3゜5% by weight, Cr2Ch was changed to Tsumekai%, Li>O was changed to 0゜5% by weight, and the firing temperature was set to 950°C. A ceramic multilayer wiring board was manufactured in the same manner as in Example 1 except for the small size.

これによって製造されたセラミック多層配線基板の配線
の面積抵抗率を求めた結果は1,8mΩ/口であった。
The area resistivity of the wiring of the ceramic multilayer wiring board thus manufactured was determined to be 1.8 mΩ/hole.

また、線間の絶縁抵抗は、全てlXl0I@Ω以−ヒで
あった。
Moreover, the insulation resistance between the lines was all less than lXl0I@Ω.

(比較例2) 上記実施例5に於いて、焼成時の炉内雰囲気を大気中と
した事以外は、同実施例5と同Llの条件でセラミック
多層配線基板を製作した。この結果、セラミック基板の
層間に形成された内部配線は全て断線していた。
(Comparative Example 2) A ceramic multilayer wiring board was manufactured under the same conditions as in Example 5, except that the atmosphere in the furnace during firing was set to air. As a result, all of the internal wiring formed between the layers of the ceramic substrate were disconnected.

(実施例6) 上記実施例Iに於いて、セラミック基板を形成するセラ
ミック原料粉末の組成を、Al2O3が52重n1%、
S + 02が32ffl毒%、B2O3が6型組%、
CaOが3重狙%、MgOが3゜5重量%、Cr2O5
が3重狙%、Li2Oが05重量%に代エタlG +!
−1A g 7’l’ 92 n’i j71 %、P
dが8重狙%からなる導電粒子を主体する導電ペースト
を用いた串と、焼成温度を980℃とした事以外は、同
実施例1と同様にしてセラミック多層配線ノ、U 4f
2を製作した。
(Example 6) In the above Example I, the composition of the ceramic raw material powder forming the ceramic substrate was 52% by weight of Al2O3,
S + 02 is 32ffl poison%, B2O3 is type 6%,
CaO is triple target%, MgO is 3゜5% by weight, Cr2O5
is a triple target%, and Li2O is 05% by weight!
-1A g 7'l' 92 n'i j71 %, P
Ceramic multilayer wiring U 4f was prepared in the same manner as in Example 1, except that the skewer was made of a conductive paste mainly consisting of conductive particles with d being 8% and the firing temperature was 980°C.
I made 2.

これによって製造されたセラミック多層配線基板の配線
の面積抵抗率を求めたれ11′果は5.1mΩ/口であ
った。また、線間の絶縁抵抗は、全てlXl0I”Ω以
上であった。
The area resistivity of the wiring of the ceramic multilayer wiring board thus manufactured was determined to be 5.1 mΩ/hole. In addition, the insulation resistance between the lines was all 1X10I''Ω or more.

(比較例3) 上記実施例6に於いて、焼成時の炉内雰囲気を大気中と
した事以外は、同実施例6七同様の条件でセラミック多
層配線基板を製作した。この結果、セラミック基板のj
※間に形成された内部配線は全て断線していた。
(Comparative Example 3) A ceramic multilayer wiring board was manufactured under the same conditions as in Example 6, except that the atmosphere in the furnace during firing was set to air. As a result, j of the ceramic substrate
*All internal wiring formed in between was disconnected.

(実施例7) 上記実施例1に於いて、セラミツクツ、(板を形成する
セラミック原料粉末のm成を、Al2O3が40重型組
、S i 02が36重重打%、B 203が1lff
lff)%、CaOが6 !If=t%、MgOが3゜
5重量%、Cr2O3が3 Eli ff1%、Li2
Oが0゜5重M%に代えた事と、焼成温度を890°C
とした事以外は、上記実施例1と同様にしてセラミック
多層配線基板を製作した。
(Example 7) In the above Example 1, the composition of the ceramic raw material powder forming the plate was as follows: Al2O3 was 40% heavy, Si 02 was 36% heavy, and B 203 was 1lff.
lff)%, CaO is 6! If=t%, MgO is 3°5% by weight, Cr2O3 is 3 Eli ff1%, Li2
O was changed to 0°5% by weight and the firing temperature was changed to 890°C.
A ceramic multilayer wiring board was manufactured in the same manner as in Example 1 above, except for the following.

これによって製造されたセラミック多層配線基板の配線
の面riIt抵抗率を求めた結果は1.6mΩ/口であ
った。また、線間の絶縁抵抗は、全てlX1019Ω以
上であった。
The planar riIt resistivity of the wiring of the ceramic multilayer wiring board thus manufactured was determined to be 1.6 mΩ/hole. Moreover, the insulation resistance between the lines was all 1×10 19 Ω or more.

[発明の効果] 以上説明した通り、本発明によれば、Ag若しくはAg
合金を導体としたセラミック多層配線基板を、従来より
高い温度で焼成する事が可能になる。これによって、焼
成温度を低くするために、セラミック基板の中のガラス
成分を増加させて、その抗折強度が低下するという)弊
害がない。しかも、導体のセラミック基板への拡散も抑
えられるため、配線基板の絶縁性を高く、導体の抵抗値
を低く維持する事ができ、高信頼性ををするセラミック
配線基板を提供118来ると言う効果が達成される。
[Effect of the invention] As explained above, according to the present invention, Ag or Ag
Ceramic multilayer wiring boards using alloys as conductors can be fired at higher temperatures than before. As a result, there is no problem (in order to lower the firing temperature, the glass component in the ceramic substrate is increased and its bending strength is lowered). Moreover, since the diffusion of the conductor into the ceramic substrate is suppressed, the insulation of the wiring board can be kept high and the resistance value of the conductor can be maintained low, providing a ceramic wiring board with high reliability. is achieved.

4、図面のflTi (11な説明 第1図は、セラミック多層配線基板の614造を示す要
部断面図である。
4. FlTi (11. Explanation of Drawings) FIG. 1 is a cross-sectional view of essential parts showing a 614 structure of a ceramic multilayer wiring board.

1・・・セラミック基板 2・・・内部導体 3・・・
ホール4体 4・・・外部導体 特許出願人 太陽1橘電株式会社 代 理 人 弁理士北條和由 今 第1図 ] Φ
1... Ceramic substrate 2... Internal conductor 3...
4 holes 4...Outer conductor patent applicant Taiyo 1 Tachibana Electric Co., Ltd. Agent Patent attorney Kazuyuki Hojo Figure 1] Φ

Claims (4)

【特許請求の範囲】[Claims] (1)多層に積層されたセラミックシートの表面及び層
間にAg若しくはAg合金を含む内部導体を有するセラ
ミック多層配線基板に於いて、セラミックと導体が低酸
素濃度雰囲気中で焼成された事を特徴とするセラミック
多層配線基板。
(1) A ceramic multilayer wiring board having an internal conductor containing Ag or Ag alloy between the surfaces and layers of multilayered ceramic sheets, characterized in that the ceramic and the conductor are fired in a low oxygen concentration atmosphere. Ceramic multilayer wiring board.
(2)未焼成セラミックシート上に、Ag若しくはAg
合金を含む導電ペーストを塗布し、これらセラミックシ
ートを積層して焼成するセラミック多層配線基板の製造
方法に於いて、焼成雰囲気を低酸素濃度雰囲気とする事
を特徴とするセラミック多層配線基板の製造方法。
(2) Ag or Ag on the unfired ceramic sheet
A method for manufacturing a ceramic multilayer wiring board, in which a conductive paste containing an alloy is applied, these ceramic sheets are laminated, and fired, the firing atmosphere being a low oxygen concentration atmosphere. .
(3)ベースとなる絶縁性シート上に、絶縁性セラミッ
クペーストとAg若しくはAg合金を含む導電ペースト
を交互に塗布し、得られた積層体を焼成するセラミック
多層配線基板の製造方法に於いて、焼成雰囲気を低酸素
濃度雰囲気とする事を特徴とするセラミック多層配線基
板の製造方法。
(3) In a method for manufacturing a ceramic multilayer wiring board, in which an insulating ceramic paste and a conductive paste containing Ag or an Ag alloy are alternately applied on an insulating sheet serving as a base, and the resulting laminate is fired. A method for manufacturing a ceramic multilayer wiring board, characterized in that the firing atmosphere is a low oxygen concentration atmosphere.
(4)前項特許請求の範囲第2項または第3項の何れか
に記載の低酸素濃度雰囲気が、50000ppm以下の
酸素濃度雰囲気である事を特徴とするセラミック多層配
線基板の製造方法。
(4) A method for manufacturing a ceramic multilayer wiring board, characterized in that the low oxygen concentration atmosphere according to any one of claims 2 or 3 is an atmosphere with an oxygen concentration of 50,000 ppm or less.
JP27581288A 1988-10-31 1988-10-31 Ceramic multilayer wiring board and manufacture thereof Pending JPH02122598A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP27581288A JPH02122598A (en) 1988-10-31 1988-10-31 Ceramic multilayer wiring board and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP27581288A JPH02122598A (en) 1988-10-31 1988-10-31 Ceramic multilayer wiring board and manufacture thereof

Publications (1)

Publication Number Publication Date
JPH02122598A true JPH02122598A (en) 1990-05-10

Family

ID=17560764

Family Applications (1)

Application Number Title Priority Date Filing Date
JP27581288A Pending JPH02122598A (en) 1988-10-31 1988-10-31 Ceramic multilayer wiring board and manufacture thereof

Country Status (1)

Country Link
JP (1) JPH02122598A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5683790A (en) * 1992-12-28 1997-11-04 Tdk Corporation Multilayer ceramic parts
JP2005167108A (en) * 2003-12-05 2005-06-23 Murata Mfg Co Ltd Method of manufacturing laminated electronic component
US7431785B2 (en) 2002-07-25 2008-10-07 Murata Manufacturing Co., Ltd. Manufacturing method for monolithic piezoelectric part, and monolithic piezoelectric part
JP2016213410A (en) * 2015-05-13 2016-12-15 日立金属株式会社 Circuit board and method for manufacturing the same

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61108192A (en) * 1984-10-31 1986-05-26 日本電気株式会社 Low temperature sintered multilayer ceramic substrate
JPS62265796A (en) * 1986-05-14 1987-11-18 株式会社住友金属セラミックス Ceramic multilayer interconnection board and manufacture of the same

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61108192A (en) * 1984-10-31 1986-05-26 日本電気株式会社 Low temperature sintered multilayer ceramic substrate
JPS62265796A (en) * 1986-05-14 1987-11-18 株式会社住友金属セラミックス Ceramic multilayer interconnection board and manufacture of the same

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5683790A (en) * 1992-12-28 1997-11-04 Tdk Corporation Multilayer ceramic parts
US7431785B2 (en) 2002-07-25 2008-10-07 Murata Manufacturing Co., Ltd. Manufacturing method for monolithic piezoelectric part, and monolithic piezoelectric part
JP2005167108A (en) * 2003-12-05 2005-06-23 Murata Mfg Co Ltd Method of manufacturing laminated electronic component
JP4560765B2 (en) * 2003-12-05 2010-10-13 株式会社村田製作所 Manufacturing method of multilayer electronic component
JP2016213410A (en) * 2015-05-13 2016-12-15 日立金属株式会社 Circuit board and method for manufacturing the same

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