JPH0186269U - - Google Patents
Info
- Publication number
- JPH0186269U JPH0186269U JP18264987U JP18264987U JPH0186269U JP H0186269 U JPH0186269 U JP H0186269U JP 18264987 U JP18264987 U JP 18264987U JP 18264987 U JP18264987 U JP 18264987U JP H0186269 U JPH0186269 U JP H0186269U
- Authority
- JP
- Japan
- Prior art keywords
- circuit board
- hybrid integrated
- integrated circuit
- connecting body
- mother
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004020 conductor Substances 0.000 claims description 3
- 239000000463 material Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 1
Landscapes
- Combinations Of Printed Boards (AREA)
Description
第１図は本考案の一実施例に係る混成集積回路
装置の実装状態の説明図、第２図は第１図を部分
的に拡大した斜視図、第３図は従来の混成集積回
路装置の実装状態の説明図、第４図は第３図を部
分的に拡大して示す斜視図である。
２１…混成集積回路基板、２２，２３…電子部
品、２５…ランド部、２６，３１…半田層、２７
…接続体、２８…混成集積回路装置、２９…マザ
ー回路基板、３０…導体パターン。
FIG. 1 is an explanatory diagram of a mounted state of a hybrid integrated circuit device according to an embodiment of the present invention, FIG. 2 is a partially enlarged perspective view of FIG. 1, and FIG. 3 is a diagram of a conventional hybrid integrated circuit device. An explanatory view of the mounted state, FIG. 4 is a partially enlarged perspective view of FIG. 3. 21... Hybrid integrated circuit board, 22, 23... Electronic component, 25... Land portion, 26, 31... Solder layer, 27
... Connecting body, 28... Hybrid integrated circuit device, 29... Mother circuit board, 30... Conductor pattern.
Claims (1)
の回路基板に取付けられ、該回路基板とマザー回
路基板表面の導体層とを電気的に接続させる接続
体とを具備する混成集積回路基板において、前記
接続体は導電性材料が被着された前記回路基板材
料により形成されていることを特徴とする混成集
積回路装置。 A hybrid integrated circuit board comprising a hybrid integrated circuit board on which electronic components are mounted, and a connecting body attached to the circuit board to electrically connect the circuit board and a conductor layer on the surface of the mother circuit board, A hybrid integrated circuit device, characterized in that the connecting body is formed of the circuit board material to which a conductive material is adhered.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18264987U JPH0186269U (en) | 1987-11-30 | 1987-11-30 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18264987U JPH0186269U (en) | 1987-11-30 | 1987-11-30 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0186269U true JPH0186269U (en) | 1989-06-07 |
Family
ID=31474095
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18264987U Pending JPH0186269U (en) | 1987-11-30 | 1987-11-30 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0186269U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7557307B2 (en) | 2004-12-02 | 2009-07-07 | Murata Manufacturing Co., Ltd. | Electronic component and its manufacturing method |
-
1987
- 1987-11-30 JP JP18264987U patent/JPH0186269U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7557307B2 (en) | 2004-12-02 | 2009-07-07 | Murata Manufacturing Co., Ltd. | Electronic component and its manufacturing method |