JPH0186268U - - Google Patents

Info

Publication number
JPH0186268U
JPH0186268U JP18264887U JP18264887U JPH0186268U JP H0186268 U JPH0186268 U JP H0186268U JP 18264887 U JP18264887 U JP 18264887U JP 18264887 U JP18264887 U JP 18264887U JP H0186268 U JPH0186268 U JP H0186268U
Authority
JP
Japan
Prior art keywords
integrated circuit
hybrid integrated
circuit device
circuit board
external connection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18264887U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP18264887U priority Critical patent/JPH0186268U/ja
Publication of JPH0186268U publication Critical patent/JPH0186268U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Multi-Conductor Connections (AREA)
  • Combinations Of Printed Boards (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例に係る混成集積回路
装置の実装状態の説明図、第2図は第1図を部分
的に拡大した斜視図、第3図は同装置の外部接続
リードの下端部の説明図、第4図は従来の混成集
積回路装置の実装状態の説明図、第5図は第4図
を部分的に拡大して示す斜視図である。 21…混成集積回路基板、22,23…電子部
品、25a,25b…ランド部、26,31…半
田層、27…外部接続リード、27a…弾性部、
28…混成集積回路装置、29…マザー回路基板
、30…導体パターン。
Fig. 1 is an explanatory diagram of a mounted state of a hybrid integrated circuit device according to an embodiment of the present invention, Fig. 2 is a partially enlarged perspective view of Fig. 1, and Fig. 3 is an illustration of the external connection lead of the device. FIG. 4 is an explanatory diagram of the mounting state of the conventional hybrid integrated circuit device, and FIG. 5 is a partially enlarged perspective view of FIG. 4. 21... Hybrid integrated circuit board, 22, 23... Electronic component, 25a, 25b... Land part, 26, 31... Solder layer, 27... External connection lead, 27a... Elastic part,
28... Hybrid integrated circuit device, 29... Mother circuit board, 30... Conductor pattern.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 混成集積回路基板と、一端が前記基板の縁部を
挟持し他端がマザー回路基板に固定される外部接
続リードとを具備した混成集積回路装置において
、前記外部接続リードの前記マザー回路基板と接
続すべき先端部分に屈曲により形成された弾性部
が設けられていることを特徴とする混成集積回路
装置。
In a hybrid integrated circuit device comprising a hybrid integrated circuit board and an external connection lead having one end sandwiching an edge of the board and the other end fixed to the mother circuit board, the external connection lead is connected to the mother circuit board. 1. A hybrid integrated circuit device, characterized in that an elastic portion formed by bending is provided at a tip end portion of the hybrid integrated circuit device.
JP18264887U 1987-11-30 1987-11-30 Pending JPH0186268U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18264887U JPH0186268U (en) 1987-11-30 1987-11-30

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18264887U JPH0186268U (en) 1987-11-30 1987-11-30

Publications (1)

Publication Number Publication Date
JPH0186268U true JPH0186268U (en) 1989-06-07

Family

ID=31474094

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18264887U Pending JPH0186268U (en) 1987-11-30 1987-11-30

Country Status (1)

Country Link
JP (1) JPH0186268U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0381672U (en) * 1989-12-09 1991-08-21

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0381672U (en) * 1989-12-09 1991-08-21

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