JPH0155594B2 - - Google Patents
Info
- Publication number
- JPH0155594B2 JPH0155594B2 JP57126179A JP12617982A JPH0155594B2 JP H0155594 B2 JPH0155594 B2 JP H0155594B2 JP 57126179 A JP57126179 A JP 57126179A JP 12617982 A JP12617982 A JP 12617982A JP H0155594 B2 JPH0155594 B2 JP H0155594B2
- Authority
- JP
- Japan
- Prior art keywords
- green sheet
- dielectric
- conductor
- capacitor
- insulator
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000004020 conductor Substances 0.000 claims description 25
- 238000000034 method Methods 0.000 claims description 19
- 239000012212 insulator Substances 0.000 claims description 15
- 239000000919 ceramic Substances 0.000 claims description 12
- 239000002131 composite material Substances 0.000 claims description 12
- 238000010304 firing Methods 0.000 claims description 8
- 238000004519 manufacturing process Methods 0.000 claims description 8
- 238000000465 moulding Methods 0.000 claims description 2
- 239000003990 capacitor Substances 0.000 description 27
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 10
- 239000000758 substrate Substances 0.000 description 8
- 239000012298 atmosphere Substances 0.000 description 7
- 239000003989 dielectric material Substances 0.000 description 5
- 239000000463 material Substances 0.000 description 4
- 229910052751 metal Inorganic materials 0.000 description 4
- 239000002184 metal Substances 0.000 description 4
- 230000001590 oxidative effect Effects 0.000 description 4
- 239000010931 gold Substances 0.000 description 3
- 238000002844 melting Methods 0.000 description 3
- 230000008018 melting Effects 0.000 description 3
- KDLHZDBZIXYQEI-UHFFFAOYSA-N palladium Substances [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 3
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Substances [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 3
- 238000007639 printing Methods 0.000 description 3
- 238000007650 screen-printing Methods 0.000 description 3
- 229910052709 silver Inorganic materials 0.000 description 3
- 239000000956 alloy Substances 0.000 description 2
- 229910045601 alloy Inorganic materials 0.000 description 2
- 239000011230 binding agent Substances 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- 239000003960 organic solvent Substances 0.000 description 2
- 229910052763 palladium Inorganic materials 0.000 description 2
- SWELZOZIOHGSPA-UHFFFAOYSA-N palladium silver Chemical compound [Pd].[Ag] SWELZOZIOHGSPA-UHFFFAOYSA-N 0.000 description 2
- 239000004014 plasticizer Substances 0.000 description 2
- 229910052697 platinum Inorganic materials 0.000 description 2
- 239000010944 silver (metal) Substances 0.000 description 2
- 239000002002 slurry Substances 0.000 description 2
- ZNQVEEAIQZEUHB-UHFFFAOYSA-N 2-ethoxyethanol Chemical compound CCOCCO ZNQVEEAIQZEUHB-UHFFFAOYSA-N 0.000 description 1
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 229910052810 boron oxide Inorganic materials 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 238000005266 casting Methods 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- JKWMSGQKBLHBQQ-UHFFFAOYSA-N diboron trioxide Chemical compound O=BOB=O JKWMSGQKBLHBQQ-UHFFFAOYSA-N 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000000446 fuel Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 230000001771 impaired effect Effects 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 229910000464 lead oxide Inorganic materials 0.000 description 1
- 230000005012 migration Effects 0.000 description 1
- 238000013508 migration Methods 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- YEXPOXQUZXUXJW-UHFFFAOYSA-N oxolead Chemical compound [Pb]=O YEXPOXQUZXUXJW-UHFFFAOYSA-N 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 239000000843 powder Substances 0.000 description 1
- 239000010970 precious metal Substances 0.000 description 1
- 238000010298 pulverizing process Methods 0.000 description 1
- 238000004080 punching Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4626—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
- H05K3/4629—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating inorganic sheets comprising printed circuits, e.g. green ceramic sheets
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
- Laminated Bodies (AREA)
- Ceramic Capacitors (AREA)
- Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
Description
【発明の詳細な説明】
本発明は、コンデンサを構成した複合セラミツ
ク部品の製造方法に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a composite ceramic component forming a capacitor.
従来コンデンサは配線層を設けたセラミツク等
の基板上に、配線導体間に配置して半田付けなど
して電子回路を形成していた。しかし、この方法
では、チツプ型または、円板型のコンデンサはそ
れぞれ１個づつ取付けられねばならない。一方近
年、ハイブリツド技術によりコンデンサ等を含む
電子回路を基板内部に形成することが試みられて
いる。すなわち、アルミナ等のセラミツク基板に
スクリーン印刷法により誘電体層とコンデンサ用
内部電極とを交互に形成し、次いでその上に基板
表面となる絶縁層を形成して焼成し、コンデンサ
を構成している。しかしこの場合、各パターンを
印刷する工程が多くなり作業性が悪くなる欠点が
あつた。また誘電体材料の誘電率が小さいこと、
さらに印刷積層をくり返すに従い印刷部の平面性
が非常に悪くなり積層数を増やすことが困難であ
ることとにより大きな容量をもつコンデンサを形
成することは不可能であつた。一方、アルミナグ
リーンシートを用いて基板内部にコンデンサを形
成する方法も行なわれている。第１図は、この方
法により形成されたコンデンサを含んだ基板の模
式的断面図である。アルミナグリーンシート上に
コンデンサ用内部電極層を形成するようにスクリ
ーン印刷し、該電極層を設けたアルミナグリーン
シート３と、必要に応じて厚みをもたせるための
アルミナグリーンシート１とを複数枚積層し1500
〜1600℃の高温でしかも還元雰囲気で焼成されコ
ンデンサ４を構成したセラミツク複合部品が得ら
れた。この方法の場合、アルミナ材料を焼成する
ために1500〜1600℃という高温が必要であること
から導体材料として必然的にＷ，Mo等の高融点
金属を用いなければならず、これらの金属の酸化
防止のために還元雰囲気で焼成するため、燃料
費・雰囲気作成等のコストが高くなり、装置も大
がかりになる欠点があつた。また、アルミナの誘
電率は約９程度であることから、このコンデンサ
ーの容量も小さなものとなつてしまう欠点があつ
た。さらに、該複合セラミツク部品の外部への引
出端子部をボンデイング性を良好にするために、
Au，Ag等の貴金属メツキをする必要があり、工
程的に多くなる、とともにメツキ液などによる腐
食やマイグレーシヨン等によつて部品の信頼性が
そこなわれる危険があつた。 Conventionally, capacitors have been formed on a substrate made of ceramic or the like with a wiring layer, placed between wiring conductors, and soldered to form an electronic circuit. However, with this method, each chip type or disk type capacitor must be installed one at a time. On the other hand, in recent years, attempts have been made to form electronic circuits including capacitors and the like inside substrates using hybrid technology. That is, dielectric layers and capacitor internal electrodes are alternately formed on a ceramic substrate made of alumina or the like by screen printing, and then an insulating layer that becomes the surface of the substrate is formed and fired to form a capacitor. . However, in this case, the number of steps for printing each pattern increases, resulting in poor workability. In addition, the dielectric constant of the dielectric material is small;
Furthermore, as printing layers are repeated, the flatness of the printed portion becomes extremely poor, making it difficult to increase the number of layers, making it impossible to form a capacitor with a large capacity. On the other hand, there is also a method of forming a capacitor inside a substrate using an alumina green sheet. FIG. 1 is a schematic cross-sectional view of a substrate containing a capacitor formed by this method. Screen printing is performed to form an internal electrode layer for a capacitor on an alumina green sheet, and a plurality of alumina green sheets 3 with the electrode layer provided thereon and alumina green sheets 1 to be thickened as necessary are laminated. 1500
A ceramic composite component forming the capacitor 4 was obtained by firing at a high temperature of ~1600° C. and in a reducing atmosphere. In this method, a high temperature of 1500 to 1600°C is required to sinter the alumina material, so high melting point metals such as W and Mo must be used as conductor materials, and oxidation of these metals is necessary. In order to prevent this, firing is performed in a reducing atmosphere, which has the disadvantage of increasing fuel costs, atmosphere creation costs, and requiring a large-scale apparatus. Furthermore, since the dielectric constant of alumina is about 9, the capacitance of this capacitor is also small. Furthermore, in order to improve the bonding properties of the external lead terminal part of the composite ceramic component,
It was necessary to plate precious metals such as Au and Ag, which increased the number of steps, and there was a risk that the reliability of the parts would be impaired due to corrosion or migration caused by the plating solution.
本発明の目的は、このような従来の欠点を除去
せしめ、従来よりも低温（1300℃以下）でしかも
酸化性雰囲気で焼成可能な高誘電率をもつ誘電体
材料および絶縁体材料を用いることによりAu，
Ag，Pt，Pd等およびこれらを１以上含んだ合金
が使用可能となり、通常のグリーンシートを用い
る多層セラミツク基板を作製する手法で作業性の
良い、平面性も良好で、しかも同時焼成でき、ま
た該焼成工程のみでハンダ付等のボンデイング性
も良好な新規な大容量をもつコンデンサ複合積層
セラミツク部品の製造方法を提供することにあ
る。 The purpose of the present invention is to eliminate such conventional drawbacks by using dielectric and insulating materials with high dielectric constants that can be fired at lower temperatures (below 1300°C) and in an oxidizing atmosphere than conventional ones. Au,
Ag, Pt, Pd, etc. and alloys containing one or more of these can now be used, and the method of producing multilayer ceramic substrates using ordinary green sheets has good workability, good flatness, and can be fired simultaneously. It is an object of the present invention to provide a method for producing a new capacitor composite laminated ceramic part having a large capacity and having good bonding properties such as soldering using only the firing process.
本発明は誘電体グリーンシートと絶縁体グリー
ンシートを作製する工程、誘電体グリーンシート
と絶縁体グリーンシートにスルーホールを形成す
る工程、誘電体グリーンシートの表面及びスルー
ホールに導体を形成する工程、絶縁体グリーンシ
ートの表面又は／及びスルーホールに導体を形成
する工程、導体が形成されない絶縁体グリーンシ
ートと導体が形成された絶縁体グリーンシート及
び誘電体グリーンシートとを一体に成型し、焼成
する工程を有することを特徴とする複合積層セラ
ミツク部品の製造方法である。 The present invention includes a process of producing a dielectric green sheet and an insulator green sheet, a process of forming through holes in the dielectric green sheet and the insulator green sheet, a process of forming a conductor on the surface of the dielectric green sheet and in the through holes, Step of forming a conductor on the surface of the insulating green sheet and/or through holes, integrally molding the insulating green sheet on which no conductor is formed, the insulating green sheet and the dielectric green sheet on which the conductor is formed, and firing. A method for manufacturing a composite laminated ceramic part, characterized by comprising steps.
以下本発明を実施例に基づいて詳細に説明す
る。第２図〜第９図は本発明の製造方法を示す図
であり第１０図は実施例において作製した本発明
の複合積層セラミツク部品の模式的断面図であ
る。 The present invention will be described in detail below based on examples. 2 to 9 are diagrams showing the manufacturing method of the present invention, and FIG. 10 is a schematic cross-sectional view of a composite laminated ceramic component of the present invention produced in an example.
第２図に示す絶縁体グリーンシート１１は酸化
アルミニウムを40〜60wt％、酸化鉛を１〜40wt
％、酸化ケイ素を２〜40wt％、酸化ホウ素を１
〜30wt％、族元素酸化物を0.05〜25wt％、
族元素（ただし炭素、ケイ素、鉛は除く）の酸化
物を0.01〜10wt％、で合計100wt％となるような
組成の900℃程度で焼結できる無機粉末をエチル
セルソルブ等の有機溶媒、可塑剤、およびバイン
ダーとしてPVBと共に混合しスラリー状にした
後キヤステイング製膜し60mm×40mm、厚み100μ
ｍのシートにパンチングして作製した。一方第３
図に示す誘電体グリーンシート１２は、Pb
（Fe2/3・W1/3）0.33（Fe1/2・Nb1/2）0.67O3を組成と
す
る900℃程度で焼結できる複合ペロフスカイト系
高誘電体材料を、予焼、ボールミル粉砕後、絶縁
体グリーンシートを作製したときと同様の有機溶
媒・可塑剤およびバインダーとによりスラリー状
にし、キヤステイング製膜したのち60mm×40mmの
大きさに打抜いて作製した。ここで用いた絶縁体
および高誘電体材料は、それぞれ同一の非常に低
温度（900℃）で焼結可能であることから同時焼
成ができる。またこれらの材料を用いることによ
り融点の低い金、銀、白金、パラジウム等および
これらを１以上含む合金を導体として使用できる
ため酸化性雰囲気で焼成が行なえる。 The insulator green sheet 11 shown in Figure 2 contains 40 to 60 wt% aluminum oxide and 1 to 40 wt% lead oxide.
%, silicon oxide 2-40wt%, boron oxide 1
~30wt%, group element oxides 0.05~25wt%,
An inorganic powder that can be sintered at around 900℃ with a composition of 0.01 to 10 wt% of oxides of group elements (excluding carbon, silicon, and lead) for a total of 100 wt% is mixed with an organic solvent such as ethyl cellosolve and plasticizer. After mixing with the agent and PVB as a binder to form a slurry, it is cast into a film of 60mm x 40mm and 100μ thick.
It was produced by punching a sheet of m. On the other hand, the third
The dielectric green sheet 12 shown in the figure is Pb
(Fe 2/3・W 1/3 ) 0.33 (Fe 1/2・Nb 1/2 ) 0.67 A composite perovskite-based high dielectric material that can be sintered at around 900℃ and has a composition of O 3 is pre-fired and ball milled. After pulverization, it was made into a slurry with the same organic solvent, plasticizer, and binder as used when producing the insulating green sheet, and after forming a film by casting, it was punched out into a size of 60 mm x 40 mm. The insulator and high dielectric material used here can be sintered at the same very low temperature (900°C), so they can be fired simultaneously. Further, by using these materials, gold, silver, platinum, palladium, etc., which have low melting points, and alloys containing one or more of these can be used as conductors, so that firing can be performed in an oxidizing atmosphere.
次にコンデンサ用内部電極のうち一方の最端部
を設けるため第４図に示すように絶縁体グリーン
シート１１上にスクリーン印刷法により銀−パラ
ジウム系導体を印刷し内部電極層１３を形成し
た。第５図の工程では、誘電体グリーンシート１
２にコンデンサ用内部電極を接続するためのスル
ーホール１４を形成した。第６図の工程におい
て、第５図のスルーホール形成された誘電体グリ
ーンシートにコンデンサ用内部電極を第４図の導
体パターンに対して線対称になるように銀−パラ
ジウム系導体層を印刷すると同時に下層からの対
向電極用導体との接続をもたせるためにランド状
導体層１６を印刷した。このとき誘電体グリーン
シートに設けたスルーホール中に完全に導体が埋
まることになる。第７図の工程に進みスルーホー
ル１４の形成された誘電体グリーンシート１２上
に第４図と同様な電極層１３を印刷すると同時
に、第６図の電極層１５と導通をもたせるために
ランド状導体層１７を印刷した。第８図の工程で
は、基板内部に構成するコンデンサの対向電極を
それぞれ基板最上層へ引きまわすための導体パタ
ーンを印刷するための工程であり、第５図と同様
なスルーホールパターン１４を形成した絶縁体グ
リーンシート１１上に、コンデンサ内部電極のう
ち一方の電極層１３と導通をもたせるための電極
層パターン１８、およびもう一方の電極層１５と
導通をもたせるための電極層パターン１９を印刷
した。第９図は、外部への引出端子部を設けた基
板最上層を形成するための工程であり、端子部の
位置に合つたスルーホール１４を設けた絶縁体グ
リーンシート１１上に引出端子部の導体層２０を
印刷した。 Next, in order to provide the outermost end of one of the internal electrodes for the capacitor, a silver-palladium based conductor was printed on the insulating green sheet 11 by screen printing to form an internal electrode layer 13, as shown in FIG. In the process shown in Fig. 5, the dielectric green sheet 1
A through hole 14 was formed in 2 to connect an internal electrode for a capacitor. In the process shown in Fig. 6, a silver-palladium based conductor layer is printed on the dielectric green sheet in which the through holes shown in Fig. 5 are formed so that the internal electrodes for the capacitor are symmetrical with respect to the conductor pattern shown in Fig. 4. At the same time, a land-like conductor layer 16 was printed to provide connection with the counter electrode conductor from the lower layer. At this time, the conductor is completely buried in the through holes provided in the dielectric green sheet. Proceeding to the process shown in FIG. 7, an electrode layer 13 similar to that shown in FIG. 4 is printed on the dielectric green sheet 12 in which the through holes 14 are formed, and at the same time, a land shape is printed to provide electrical continuity with the electrode layer 15 shown in FIG. A conductor layer 17 was printed. The step shown in FIG. 8 is a step for printing conductor patterns for routing the opposing electrodes of the capacitors configured inside the board to the top layer of the board, and a through-hole pattern 14 similar to that shown in FIG. 5 was formed. On the insulator green sheet 11, an electrode layer pattern 18 for providing electrical continuity with one electrode layer 13 of the capacitor internal electrodes, and an electrode layer pattern 19 for providing electrical continuity with the other electrode layer 15 were printed. FIG. 9 shows a process for forming the uppermost layer of the board in which a lead terminal part to the outside is provided. A conductive layer 20 was printed.
以上おのおの別々に作製した各層パターンのシ
ートを積層熱圧着したときの積層構造は第１０図
に示す。基板最下層から絶縁体グリーンシート１
１を４枚重ね、次に第４図の電極層１３を設けた
絶縁体シート、第６図の印刷誘電体グリーンシー
ト、第７図の印刷誘電体グリーンシート、第６図
の印刷誘電体グリーンシート、第８図の引回し導
体パターン印刷絶縁体グリーンシート、および、
最上層の引出端子部を設えた絶縁体グリーンシー
トを重ね合せ熱プレスで全圧6tonで30分間加圧し
て、誘電体、及び絶縁体グリーンシートおよび電
極層を一体化した。 FIG. 10 shows a laminated structure obtained by laminating and thermocompression bonding the sheets of each layer pattern separately prepared above. Insulator green sheet 1 from the bottom layer of the board
1, and then an insulator sheet with an electrode layer 13 as shown in Fig. 4, a printed dielectric green sheet shown in Fig. 6, a printed dielectric green sheet shown in Fig. 7, and a printed dielectric green sheet shown in Fig. 6. sheet, an insulator green sheet with a printed conductor pattern shown in FIG. 8, and
The insulating green sheets with the top layer of lead-out terminals were stacked and pressed with a heat press at a total pressure of 6 tons for 30 minutes to integrate the dielectric, insulating green sheets, and electrode layers.
続いて、積層体は、焼成炉（図示せず）によ
り、900℃の温度で酸化性雰囲気中で焼成した。 Subsequently, the laminate was fired in an oxidizing atmosphere at a temperature of 900° C. in a firing furnace (not shown).
焼成後の作製基板中には、誘電体層を３層構成
されたコンデンサをもつ構造になつている。この
ようにして作製したコンデンサ複合積層セラミツ
ク部品のコンデンサ部は、4nF〜4μFという大容
積を示した。 The fabricated substrate after firing has a structure with a capacitor composed of three dielectric layers. The capacitor portion of the capacitor composite laminated ceramic component produced in this manner exhibited a large volume of 4nF to 4μF.
以上の如く、本発明のコンデンサ複合積層セラ
ミツク部品の製造方法を用いることにより、高誘
電率をもつ誘電体材料および絶縁体材料を同一に
しかも低い温度で焼成して、画期的な大容量のコ
ンデンサを内蔵した基板を作成することが出来る
ようになり、電子部品の複合小型化や信頼性・作
業性が非常に向上した。さらに、この方法によ
り、融点の低い高誘電率でボンデイング性の高い
金属を導体として使用でき酸化性雰囲気で焼成可
能となつた。 As described above, by using the manufacturing method of capacitor composite laminated ceramic parts of the present invention, dielectric materials and insulator materials with high dielectric constants can be fired at the same and low temperature, resulting in revolutionary large-capacity products. It has become possible to create circuit boards with built-in capacitors, which has greatly improved the miniaturization, reliability, and workability of electronic components. Furthermore, this method makes it possible to use a metal with a low melting point, high dielectric constant, and high bondability as a conductor, and it becomes possible to sinter the metal in an oxidizing atmosphere.
第１図は、従来のアルミナグリーンシート法を
用いたコンデンサ複合基板の構造を示した断面図
であり、第２図ないし第９図は、本発明の製造工
程を示す平面図であり、第１０図は、本発明の製
造方法により作製した複合部品の模式的断面図で
ある。
図において、１……アルミナシート、２……導
体層、３……誘電体層として利用したアルミナシ
ート、４……コンデンサ部、１１……絶縁体グリ
ーンシート、１２……誘電体グリーンシート、１
３……コンデンサ用内部電極、１４……スルーホ
ール、１５……コンデンサ用内部対向電極、１
６，１７……上下導通のための導体層、１８，１
９……導体配線層、２０……外部引出端子用導体
層。
FIG. 1 is a cross-sectional view showing the structure of a capacitor composite board using the conventional alumina green sheet method, and FIGS. 2 to 9 are plan views showing the manufacturing process of the present invention. The figure is a schematic cross-sectional view of a composite part manufactured by the manufacturing method of the present invention. In the figure, 1...Alumina sheet, 2...Conductor layer, 3...Alumina sheet used as a dielectric layer, 4...Capacitor section, 11...Insulator green sheet, 12...Dielectric green sheet, 1
3...Internal electrode for capacitor, 14...Through hole, 15...Internal counter electrode for capacitor, 1
6, 17... Conductor layer for vertical conduction, 18, 1
9... Conductor wiring layer, 20... Conductor layer for external lead terminal.
Claims (1)
トを作製する工程、誘電体グリーンシートと絶縁
体グリーンシートにスルーホールを形成する工
程、誘電体グリーンシートの表面及びスルーホー
ルに導体を形成する工程、絶縁体グリーンシート
の表面又は／及びスルーホールに導体を形成する
工程、導体が形成されない絶縁体グリーンシート
と導体が形成された絶縁体グリーンシート及び誘
電体グリーンシートとを一体に成型し、焼成する
工程を有することを特徴とする複合積層セラミツ
ク部品の製造方法。1 Step of producing a dielectric green sheet and an insulator green sheet, a step of forming through holes in the dielectric green sheet and an insulator green sheet, a step of forming a conductor on the surface of the dielectric green sheet and in the through holes, an insulator A process of forming a conductor on the surface of the green sheet and/or through holes, a process of integrally molding an insulator green sheet on which no conductor is formed, an insulator green sheet and a dielectric green sheet on which a conductor is formed, and firing. A method for manufacturing a composite laminated ceramic part, comprising:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57126179A JPS5917227A (en) | 1982-07-20 | 1982-07-20 | Method of producing composite laminated ceramic part |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57126179A JPS5917227A (en) | 1982-07-20 | 1982-07-20 | Method of producing composite laminated ceramic part |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5917227A JPS5917227A (en) | 1984-01-28 |
| JPH0155594B2 true JPH0155594B2 (en) | 1989-11-27 |
Family
ID=14928636
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57126179A Granted JPS5917227A (en) | 1982-07-20 | 1982-07-20 | Method of producing composite laminated ceramic part |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5917227A (en) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60177695A (en) * | 1984-02-23 | 1985-09-11 | 日本電気株式会社 | Composite ceramic board |
| JPH0617339Y2 (en) * | 1987-07-21 | 1994-05-02 | 株式会社村田製作所 | Multilayer substrate with built-in capacitor |
| JPH0714109B2 (en) * | 1988-06-23 | 1995-02-15 | 三菱マテリアル株式会社 | Ceramic composite circuit board |
| JP2652229B2 (en) * | 1988-12-29 | 1997-09-10 | 株式会社住友金属エレクトロデバイス | Multilayer circuit ceramic substrate |
| JP2001332440A (en) * | 2000-05-22 | 2001-11-30 | Rohm Co Ltd | Method of manufacturing laminated electronic component |
| DE10313891A1 (en) * | 2003-03-27 | 2004-10-14 | Epcos Ag | Electrical multilayer component |
-
1982
- 1982-07-20 JP JP57126179A patent/JPS5917227A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5917227A (en) | 1984-01-28 |
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