JPH01244621A - Method of cleaning surface of silicon single crystal substrate - Google Patents
Method of cleaning surface of silicon single crystal substrateInfo
- Publication number
- JPH01244621A JPH01244621A JP7130288A JP7130288A JPH01244621A JP H01244621 A JPH01244621 A JP H01244621A JP 7130288 A JP7130288 A JP 7130288A JP 7130288 A JP7130288 A JP 7130288A JP H01244621 A JPH01244621 A JP H01244621A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- oxide film
- silicon
- single crystal
- atmosphere
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 43
- 238000000034 method Methods 0.000 title claims abstract description 29
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 28
- 239000013078 crystal Substances 0.000 title claims abstract description 27
- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 27
- 239000010703 silicon Substances 0.000 title claims abstract description 27
- 238000004140 cleaning Methods 0.000 title claims description 8
- 239000012298 atmosphere Substances 0.000 claims abstract description 14
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 12
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 12
- 239000001301 oxygen Substances 0.000 claims abstract description 12
- 230000003647 oxidation Effects 0.000 claims abstract description 10
- 238000007254 oxidation reaction Methods 0.000 claims abstract description 10
- 230000001590 oxidative effect Effects 0.000 claims abstract description 4
- 239000010410 layer Substances 0.000 abstract description 12
- 230000007547 defect Effects 0.000 abstract description 8
- 239000002344 surface layer Substances 0.000 abstract description 5
- 239000000203 mixture Substances 0.000 abstract description 4
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 abstract description 2
- 229910017604 nitric acid Inorganic materials 0.000 abstract description 2
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 abstract 2
- XEEYBQQBJWHFJM-UHFFFAOYSA-N iron Substances [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 26
- 239000012535 impurity Substances 0.000 description 21
- 230000000694 effects Effects 0.000 description 17
- 238000011109 contamination Methods 0.000 description 11
- 238000005247 gettering Methods 0.000 description 10
- 238000010438 heat treatment Methods 0.000 description 10
- 239000004065 semiconductor Substances 0.000 description 8
- 238000009792 diffusion process Methods 0.000 description 6
- 230000015572 biosynthetic process Effects 0.000 description 5
- 238000001179 sorption measurement Methods 0.000 description 5
- 239000000126 substance Substances 0.000 description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 3
- 238000000137 annealing Methods 0.000 description 3
- 230000007423 decrease Effects 0.000 description 3
- 229910052742 iron Inorganic materials 0.000 description 3
- 230000008859 change Effects 0.000 description 2
- 238000003486 chemical etching Methods 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 229910052906 cristobalite Inorganic materials 0.000 description 2
- 150000002500 ions Chemical class 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000012299 nitrogen atmosphere Substances 0.000 description 2
- 239000002245 particle Substances 0.000 description 2
- 238000005498 polishing Methods 0.000 description 2
- 239000002244 precipitate Substances 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 230000009467 reduction Effects 0.000 description 2
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 102100031920 Dihydrolipoyllysine-residue succinyltransferase component of 2-oxoglutarate dehydrogenase complex, mitochondrial Human genes 0.000 description 1
- 101000992065 Homo sapiens Dihydrolipoyllysine-residue succinyltransferase component of 2-oxoglutarate dehydrogenase complex, mitochondrial Proteins 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- 150000007513 acids Chemical class 0.000 description 1
- -1 alkalis Substances 0.000 description 1
- 239000007864 aqueous solution Substances 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 229910052681 coesite Inorganic materials 0.000 description 1
- 239000000356 contaminant Substances 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 238000001773 deep-level transient spectroscopy Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000011982 device technology Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 238000005108 dry cleaning Methods 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 239000000428 dust Substances 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 239000010419 fine particle Substances 0.000 description 1
- 230000004927 fusion Effects 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 238000004949 mass spectrometry Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- JVJQPDTXIALXOG-UHFFFAOYSA-N nitryl fluoride Chemical compound [O-][N+](F)=O JVJQPDTXIALXOG-UHFFFAOYSA-N 0.000 description 1
- 239000003960 organic solvent Substances 0.000 description 1
- 238000005192 partition Methods 0.000 description 1
- 230000000704 physical effect Effects 0.000 description 1
- 238000001556 precipitation Methods 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 238000005204 segregation Methods 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 229910052682 stishovite Inorganic materials 0.000 description 1
- 239000004094 surface-active agent Substances 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
- 229910052905 tridymite Inorganic materials 0.000 description 1
Landscapes
- Cleaning Or Drying Semiconductors (AREA)
Abstract
Description
【発明の詳細な説明】
(産業上の利用分野)
本発明は半導体集積回路用シリコン単結晶基板(以下基
板という)の表面清浄化方法に関し、特にイントリンシ
ックゲッタ効果の著しくない金属原子汚染を除去し、イ
ントリンシックゲッタ効果に加えてより清浄な表面の半
導体集積回路用基板を得る方法に係わる。[Detailed Description of the Invention] (Industrial Application Field) The present invention relates to a method for cleaning the surface of a silicon single crystal substrate (hereinafter referred to as a substrate) for a semiconductor integrated circuit, and in particular removes metal atomic contamination that does not have a significant intrinsic getter effect. The present invention also relates to a method for obtaining a substrate for semiconductor integrated circuits that has a cleaner surface in addition to the intrinsic getter effect.
(従来の技術とその問題点)
基板の表面は、そこに半導体素子を形成するので、結晶
形成時に完全であることはもちろん、各種の汚染を受け
たものであってはならない。(Prior art and its problems) Since a semiconductor element is formed on the surface of a substrate, it must not only be perfect at the time of crystal formation, but also must not be contaminated by various types of contamination.
現在基板は、主にチョクラルスキー法によるシリコン単
結晶棒をその軸方向に直角に切断し、得た薄円板の片面
を鏡面研磨し、ついで化学的な方法で清浄化することに
よって得られる。Currently, substrates are mainly obtained by cutting a silicon single crystal rod perpendicular to its axis using the Czochralski method, mirror-polishing one side of the resulting thin disk, and then cleaning it using a chemical method. .
基板表面は、できるだけ化学的エツチングを併用し、結
晶性の乱れを極力抑える方法で研磨されるため、なかな
か良好な結晶性の、すなわち表面にシリコン原子の未結
合手を除いて該原子のミスフィツトのない表面を得るこ
とは難かしかった。The surface of the substrate is polished using a method that minimizes disturbance of crystallinity by using chemical etching as much as possible, so that it has very good crystallinity, that is, it removes the dangling bonds of silicon atoms on the surface and eliminates the misfit of the atoms. It was difficult to get a surface without it.
基板表面に付着した汚れとしては、分類にもよるが、−
例をあげると、Na”、F−等のイオンの表面への吸着
、Cu、Fe、Au等の金属、Sin。Depending on the classification, dirt attached to the substrate surface may be -
Examples include adsorption of ions such as Na'' and F- to the surface, metals such as Cu, Fe, and Au, and Sin.
粒子その他の研磨、研削粒子の表面への付着、空気中の
各種ダストによる表面の微粒子汚染、さらに使用する水
を含めた各種液体の残渣カラナルスティンなどの膜状汚
染が考えられる。これら表面汚染の清浄化のために各種
の試行錯誤が行われ、最近ではほぼ満足すべき方法が実
用化されつつある。Possible causes include polishing of particles and other materials, adhesion of abrasive particles to the surface, fine particle contamination of the surface by various types of dust in the air, and film contamination such as residual caranal stain from various liquids including water used. Various trials and errors have been carried out to clean these surface contaminants, and recently a method that is almost satisfactory is being put into practical use.
基本的清浄化方法は、化学的作用、物理的作用を種々組
み合わせたものであるが、純水、酸、アルカリ、有機溶
剤、界面活性剤による洗浄、ドライ洗浄及び乾燥などが
その全貌である。Basic cleaning methods combine various chemical and physical actions, and all of them include cleaning with pure water, acids, alkalis, organic solvents, surfactants, dry cleaning, and drying.
基板表面の活性層領域、たとえば表面から10〜20t
mの結晶層を理想的な完全結晶、すなわち不純物を含ま
ず、かついかなる結晶欠陥も含まないようにすることが
試みられている。それは、チョクラルスキー法による単
結晶中の溶存酸素に基づく微小欠陥の内部形成を通じ、
この微小欠陥の周囲に発生する歪領域に不純物その他の
結晶欠陥をゲッタし、さらに基板表面に向かって、結晶
内の酸素をアウトデイツユ−ジオン(Out dif−
fusion)する特異な方法を通じてなされた。そし
てこの方法は半導体素子製造技術の発展の中でさらに改
善され、通常内因的ゲッタリングまたはイントリンシッ
クゲッタリングと称し、半導体集積回路素子技術におけ
る8AQ技術の一つとして重用されている。Active layer area on the substrate surface, e.g. 10-20t from the surface
Attempts have been made to make the m crystal layer ideally perfect crystal, that is, containing no impurities and no crystal defects. Through the internal formation of minute defects based on dissolved oxygen in single crystals using the Czochralski method,
Impurities and other crystal defects are gettered in the strained region that occurs around these minute defects, and oxygen in the crystal is removed toward the substrate surface by out-diffusion.
This was done through a unique method of fusion. This method has been further improved during the development of semiconductor device manufacturing technology, and is commonly referred to as intrinsic gettering or intrinsic gettering, and is heavily used as one of the 8AQ techniques in semiconductor integrated circuit device technology.
しかしながら、特にMO8構造に注目すると。However, if we pay particular attention to the MO8 structure.
酸化膜・シリコン界面におけるSiからSiO2への化
学組成の変化のための中間的な遷移、SiとSin、ど
の熱膨張係数の差、Siと5in2との間の不純物元素
の分配率の変化、酸化膜内の不純物のトラップ等のため
、シリコン単結晶内の種々の不純物に注目しなければな
らず、単結晶基板だけでは解決できないことも今日迄に
判明している。Intermediate transition due to change in chemical composition from Si to SiO2 at the oxide-silicon interface, difference in thermal expansion coefficient between Si and Sin, change in impurity element partition between Si and 5in2, oxidation Due to the trapping of impurities within the film, attention must be paid to various impurities within the silicon single crystal, and it has been found to date that this problem cannot be solved using a single crystal substrate alone.
基板の酸化が進行するとき、酸化膜の成長とともに基板
内の不純物も酸化膜内に取り込まれ、界面近傍で不純物
の再分布が起きるが、かかる再分布は、
■基板と酸化膜の界面の両側で化学ポテンシャルが一致
するように不純物比を生じさせる。As the oxidation of the substrate progresses, impurities within the substrate are also incorporated into the oxide film as the oxide film grows, and redistribution of impurities occurs near the interface.This redistribution occurs on both sides of the interface between the substrate and the oxide film. The impurity ratio is created so that the chemical potentials match.
すなわち偏析係数が1より大または小に偏ること、
■酸化膜内と基板内の不純物の拡散速度比、■酸化の進
行に伴う界面の移動力1あることと、基板の酸化速度と
不純物の拡散速度との相対比
による等が原因するとみられている。In other words, the segregation coefficient is biased to be larger or smaller than 1, ■ the diffusion rate ratio of impurities in the oxide film and the substrate, ■ the movement force of 1 at the interface as oxidation progresses, and the oxidation rate of the substrate and the diffusion of impurities. It is believed that this is caused by factors such as the relative ratio to speed.
たとえば、Bは酸化性雰囲気中で酸化膜内【こ蓄積され
、基板表面では濃度が減少する。し力嘱し、11□雰囲
気中では逆となる。P、Asiよ基板表面で濃度が上昇
する。このように不純物元素、処理雰囲気によっても不
純物の再分布力1複雑1こ変イヒすることが知られてい
る。For example, B is accumulated in an oxide film in an oxidizing atmosphere, and its concentration decreases on the substrate surface. However, in a 11□ atmosphere, the opposite is true. The concentration of P and Asi increases on the substrate surface. As described above, it is known that the redistribution force of impurities varies depending on the impurity element and the processing atmosphere.
さらに、Akira Ohsawa等1よ、 J、 E
lectrochem。Furthermore, Akira Ohsawa et al.1, J.E.
electrochem.
Soc、、 Vol、 111. No、 12. P
、 2964(1984)の中で。Soc, Vol. 111. No, 12. P
, 2964 (1984).
酸化膜・シリコン界面近傍の2次イオン質量スペク1−
ロスコープ及び化学エツチングを(JF用して、銅はシ
リコンのバルク内に拡散し、Feiま酸イヒll憐・シ
リコン界面に集まり、Crは酸化膜内しこ取り込まれる
ことを報告している。特に、Feiまシ1ノコン表面か
ら100 nmの間に蓄積されてb)ることをつきとめ
られている。Secondary ion mass spec near the oxide film/silicon interface 1-
It has been reported that using a laser scope and chemical etching (JF), copper diffuses into the bulk of silicon and collects at the Fe/Si interface, and Cr is incorporated into the oxide film. It has been found that Fei is accumulated within 100 nm from the surface of the substrate.
以上のように、酸化膜・シリコン界面の各種不純物の分
布が報告されているが、これらの不純物元素を基板の表
面から除去するための具体的方策あるいは最適処理条件
は明らかにされていない。As described above, the distribution of various impurities at the oxide film/silicon interface has been reported, but specific measures or optimal processing conditions for removing these impurity elements from the surface of the substrate have not been clarified.
本発明は、熱酸化基板の酸化膜・シリコン界面近傍に、
不純物元素としてFeを効果的に集め、同時にイントリ
ンシックゲッタ効果を利用して。In the present invention, near the oxide film/silicon interface of a thermally oxidized substrate,
By effectively collecting Fe as an impurity element and at the same time utilizing the intrinsic getter effect.
半導体集積回路用基板表面の活性層領域の高純度化、無
欠陥化を目的とするものである。The purpose is to make the active layer region on the surface of a semiconductor integrated circuit substrate highly purified and defect-free.
(問題点を解決するための手段)
本発明は、上記目的を達成するために熱酸化条件を最適
化し、ついでその酸化膜を含め、基板の表面層をわずか
に除去して表面を清浄化する方法を提供する。該熱酸化
条件としては、900〜1200℃の雰囲気下で1時間
乃至20時間内の適当な時間を選ぶ。このとき基板とし
ては酸素濃度が少なくとも1016atoms/cm3
以、上のものを選び。(Means for Solving the Problems) In order to achieve the above object, the present invention optimizes thermal oxidation conditions, and then slightly removes the surface layer of the substrate, including the oxide film, to clean the surface. provide a method. As the thermal oxidation conditions, an appropriate time within 1 hour to 20 hours is selected in an atmosphere of 900 to 1200°C. At this time, the oxygen concentration of the substrate is at least 1016 atoms/cm3.
Choose the one above.
さらにあらかじめ600〜800℃の雰囲気下で熱処理
を行なうことにより、基板表面層の高純度化、無欠陥化
が促進される。Further, by performing heat treatment in advance in an atmosphere of 600 to 800°C, high purity and defect-free formation of the substrate surface layer are promoted.
(作用)
Feがシリコン内で高い溶解度を示し、また比較的早い
拡散速度をもつにもかかわらず、何故酸化膜とシリコン
との界面近傍に集まるかは明らかではないが、本発明者
等は実験により、Faが酸化膜・シリコン界面に再分布
されることを確認した。さらに酸化膜の形成条件として
、800℃のような低温ではFeの再分配は起こらず、
また1200”Cのような高温では、Feがバルクに拡
散し、界面近傍の集積度は低下することを見出した。(Function) It is not clear why Fe collects near the interface between the oxide film and silicon, although Fe has a high solubility in silicon and a relatively fast diffusion rate. It was confirmed that Fa was redistributed at the oxide film/silicon interface. Furthermore, as a condition for forming an oxide film, redistribution of Fe does not occur at a low temperature such as 800°C.
It has also been found that at high temperatures such as 1200''C, Fe diffuses into the bulk and the degree of integration near the interface decreases.
これよりFeが界面に集まる原因としては、酸化膜・シ
リコン界面のシリコン原子未結合手がFeを捕獲するた
めと考えられる。From this, it is considered that the reason why Fe gathers at the interface is that the dangling bonds of silicon atoms at the oxide film/silicon interface capture Fe.
しかし酸化膜とシリコンとの界面に捕獲されたFeは、
高温では逆に基板内への再分配が考えられるので、酸化
膜とともに基板表面から除去するのが好ましい。かかる
除去方法としては、弗硝酸混液を用い酸化膜を除去する
と同時に、シリコン層表面を数p除去するのがよい、こ
のように基板バルク内のFeを効果的に除去して、これ
にイントリンシックゲッタ技術を併用すれば、理想的な
基板表面の活性層の高純度化、無欠陥化が可能となる。However, Fe captured at the interface between the oxide film and silicon,
At high temperatures, redistribution into the substrate is possible, so it is preferable to remove it from the substrate surface together with the oxide film. As for such a removal method, it is best to remove the oxide film using a fluoro-nitric acid mixture and at the same time remove several layers of the silicon layer surface.In this way, Fe in the bulk of the substrate can be effectively removed, and the Fe in the substrate bulk can be effectively removed. If getter technology is used in combination, it is possible to make the active layer on the ideal substrate surface highly purified and defect-free.
イントリンシックゲッタリングには二つの目的があり、
その一つは基板表面からのm素のアウトデイフュージョ
ンであり、他の−っは内部微小欠陥の形成による表面層
領域不純物のゲッタ効果である。このために基板は通常
低温(650〜800℃)と高温(1000’C以上)
の2段階熱処理が行われる。低温アニールは、欠陥の核
を形成するものであり、高温アニールは核の成長による
微小析出物を生成させるものである。高温アニールの過
程では、同時に表面層から酸素のアウトデイフュージョ
ンが起こるので、無欠陥高純度活性層(通常デヌーデッ
ドゾーン:DN)を形成できる。Intrinsic gettering has two purposes.
One of these is the out-diffusion of m elements from the substrate surface, and the other is the getter effect of impurities in the surface layer region due to the formation of internal micro defects. For this purpose, substrates are usually used at low temperatures (650-800°C) and high temperatures (over 1000'C).
A two-step heat treatment is performed. Low-temperature annealing forms defect nuclei, and high-temperature annealing generates minute precipitates due to the growth of nuclei. During the high-temperature annealing process, out-diffusion of oxygen from the surface layer simultaneously occurs, so that a defect-free, high-purity active layer (usually a denuded zone: DN) can be formed.
ここで、微小析出物の構成については種々の説があるが
、主体は酸素を含むクリストバライトであることは疑い
はない。この微小析出物近傍の歪の場は、不純物等の吸
引固定を行い、イントリンシックゲッター法では、デヌ
ーデッドゾーンの高純度化、結晶の完全化を助長する。Although there are various theories regarding the composition of the microprecipitates, there is no doubt that the main component is cristobalite containing oxygen. This strain field near the minute precipitate attracts and fixes impurities, and in the intrinsic getter method, promotes high purity of the denuded zone and perfecting of the crystal.
本発明者等の実験によれば、イントリンシックゲッタリ
ングは界面の吸引効果に劣るが、Feのゲッタには多少
効果があり、またその他の不純物に対しては従来からゲ
ッタ効果が認められているので、酸化膜の形成とイント
リンシックゲッタ法を同時に併用することは理想的であ
ることが判明した。According to experiments conducted by the present inventors, intrinsic gettering is inferior to the interface suction effect, but it is somewhat effective for gettering Fe, and gettering effects have been recognized for other impurities. Therefore, it has been found that it is ideal to use both the formation of an oxide film and the intrinsic getter method at the same time.
イントリンシックゲッタ効果を得るためには、酸素が重
要であることはすでに述べたが、このためには基板中に
1016/d以上の酸素が必要である。It has already been mentioned that oxygen is important in order to obtain the intrinsic getter effect, and for this purpose, oxygen of 10 16 /d or more is required in the substrate.
(実施例)
酸化膜とシリコンとの界面にシリコン内のFeがどのよ
うに再分布されているか、窒素雰囲気内と酸化性雰囲気
内で熱処理して比較した。またイントリンシックゲッタ
リングのFe吸着に対する効果、及び処理温度によるF
eの界面吸着効果についても調べた。試料としては、固
有抵抗1oΩ−1のp型CZ法単結晶(酸素濃度Oi
: 20ppma)とFZ法法帖結晶酸素濃度0L(0
,1ppma)を用いた。(Example) How Fe in silicon is redistributed at the interface between an oxide film and silicon was compared by heat treatment in a nitrogen atmosphere and in an oxidizing atmosphere. In addition, the effect of intrinsic gettering on Fe adsorption and the F
The interfacial adsorption effect of e was also investigated. The sample was a p-type CZ method single crystal with a resistivity of 1 oΩ-1 (oxygen concentration Oi
: 20ppma) and FZ method crystal oxygen concentration 0L (0
, 1 ppma) was used.
この場合の熱処理条件と酸素析出量を以下に示す。The heat treatment conditions and amount of oxygen precipitated in this case are shown below.
試料表面を希硝酸に鉄を溶解させた水溶液に漬けて汚染
したが、表面のFe汚染量は0.5〜IXlX1012
ato/ cm?であった。このFeを結晶内に均一に
拡散したとすると、濃度は1〜2 X 1013atθ
ms、11 (全汚染量という)となる6汚染測定はD
LTS法によった。The surface of the sample was contaminated by immersing it in an aqueous solution of iron dissolved in dilute nitric acid, and the amount of Fe contamination on the surface was 0.5 to IXlX1012.
ato/cm? Met. Assuming that this Fe is uniformly diffused within the crystal, the concentration will be 1 to 2 x 1013atθ
ms, 11 (referred to as the total amount of pollution), the 6 pollution measurement is D
Based on the LTS method.
この熱処理後の結果を第1図に示す。The results after this heat treatment are shown in FIG.
熱処理区分Aでは、Fe不純物濃度は1〜3X1012
atoms/ clで800℃における固溶度と一致す
る。このように熱処理区分Aでは、大きなゲッタリング
効果を示していない。熱処理区分Bの0□雰囲気では、
FZ、CZ法結晶いずれも内部に拡散したFe不純物1
度はI X 10”atoms/ cn?まで大幅に減
少している。N、雰囲気ではFZ法結晶は全汚染量と同
じ1.5 X 10”atoms/ adであるが、C
zg結晶では8 X 101012ato/−で1/2
になっている。FZとC7での差がO1析出によるIG
効果とみなされるが、o2雰囲気による汚染低減と比べ
るとゲッタリング効果は小さい。熱処理区分Cではo2
雰囲気でFZ、CZ法結晶いずれも、3 X 1010
12ato/ cx&と増加し、Feの再放出が確認さ
れるが、全汚染量の115である。N2雰囲気ではFZ
、07.法結晶いずれも、全汚染量と同じである。In heat treatment category A, the Fe impurity concentration is 1 to 3X1012
Atoms/cl corresponds to the solid solubility at 800°C. As described above, heat treatment section A does not show a large gettering effect. In the 0□ atmosphere of heat treatment category B,
Fe impurity 1 diffused inside both FZ and CZ method crystals
The degree of contamination has been significantly reduced to I x 10"atoms/cn? In the N atmosphere, the FZ method crystal has the same amount of contamination as the total contamination, 1.5 x 10"atoms/ad, but in the C
For zg crystal, 8 x 101012ato/- is 1/2
It has become. The difference between FZ and C7 is IG due to O1 precipitation.
However, the gettering effect is small compared to the reduction in contamination caused by the O2 atmosphere. o2 in heat treatment category C
In the atmosphere, both FZ and CZ method crystals are 3 x 1010
The amount increased to 12ato/cx&, and re-release of Fe was confirmed, but the total amount of contamination was 115. FZ in N2 atmosphere
, 07. The total amount of contamination is the same for both method crystals.
このように酸化膜界面近傍のFe吸着効果は、1000
℃近辺で最大となるが、低温及び高温では。In this way, the Fe adsorption effect near the oxide film interface is 1000
It is maximum around ℃, but at low and high temperatures.
理由は異なるが同効果は減少する。また1000℃近辺
でFeに対してイントリンシックゲッタリング効果のあ
ることがみられる。しかし、界面の吸着効果と比較して
小さいので、補助的作用に留まる。The same effect decreases, although for different reasons. Further, it is seen that there is an intrinsic gettering effect on Fe at around 1000°C. However, since it is small compared to the adsorption effect of the interface, it remains an auxiliary effect.
(発明の効果)
以上述べたように1本発明の方法では、 fJ層欠陥や
ライフタイム低下の原因となるFe元素を、半導体素子
製造工程中に、はぼ完全にシリコン単結晶基板より除去
し、その表面に理想的な高純度かつ無欠陥のデヌーデッ
ドゾーンを形成することができ、よって半導体素子特に
集積回路の特性の向上ならびに収量の増加によるコスト
ダウンを可能にする。(Effects of the Invention) As described above, in the method of the present invention, Fe element, which causes fJ layer defects and lifetime reduction, can be almost completely removed from a silicon single crystal substrate during the semiconductor device manufacturing process. , it is possible to form an ideal high-purity and defect-free denuded zone on its surface, thereby making it possible to improve the characteristics of semiconductor devices, especially integrated circuits, and to reduce costs by increasing yield.
第1図は各種熱処理条件におけるFeの不純物1度(a
toms / rxl )のDLTSによる211す定
結果のグラフを示す。
特許出願人 信越半導体株人会社
代理人・弁理士 山 本 亮 止−□11、公1.11Figure 1 shows Fe impurity 1 degree (a) under various heat treatment conditions.
A graph of 211 test results by DLTS of (toms/rxl) is shown. Patent Applicant Shin-Etsu Semiconductor Co., Ltd. Agent/Patent Attorney Ryo Yamamoto-□11, Ko 1.11
Claims (1)
及びこれに接するシリコン層表面を除去することを特徴
とするシリコン単結晶基板の表面清浄化方法。 2)前記熱酸化が900℃乃至1200℃の雰囲気内で
1時間乃至20時間行われる、請求項1記載の表面清浄
化方法。 3)前記シリコン単結晶基板内の酸素濃度が少なくとも
10^1^6atoms/cm^3であり、あらかじめ
600〜800℃の雰囲気内で熱処理されている請求項
1及び2のいずれか1項記載の表面清浄化方法。[Claims] 1) A method for cleaning the surface of a silicon single crystal substrate, which comprises thermally oxidizing the surface of the silicon single crystal substrate and removing the oxide film and the surface of the silicon layer in contact with the oxide film. 2) The surface cleaning method according to claim 1, wherein the thermal oxidation is performed in an atmosphere of 900° C. to 1200° C. for 1 hour to 20 hours. 3) The silicon single crystal substrate according to any one of claims 1 and 2, wherein the oxygen concentration in the silicon single crystal substrate is at least 10^1^6 atoms/cm^3 and is previously heat-treated in an atmosphere of 600 to 800 °C. Surface cleaning method.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7130288A JPH01244621A (en) | 1988-03-25 | 1988-03-25 | Method of cleaning surface of silicon single crystal substrate |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7130288A JPH01244621A (en) | 1988-03-25 | 1988-03-25 | Method of cleaning surface of silicon single crystal substrate |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH01244621A true JPH01244621A (en) | 1989-09-29 |
Family
ID=13456717
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7130288A Pending JPH01244621A (en) | 1988-03-25 | 1988-03-25 | Method of cleaning surface of silicon single crystal substrate |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH01244621A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007536738A (en) * | 2004-05-07 | 2007-12-13 | エムイーエムシー・エレクトロニック・マテリアルズ・インコーポレイテッド | Method for reducing metal contamination in silicon wafers |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5243360A (en) * | 1975-10-01 | 1977-04-05 | Hitachi Ltd | Process for production of silicon wafer |
JPS58216425A (en) * | 1982-06-11 | 1983-12-16 | Komatsu Denshi Kinzoku Kk | Preparation of semiconductor silicon substrate |
JPS5974638A (en) * | 1982-10-22 | 1984-04-27 | Hitachi Ltd | Manufacture of semiconductor wafer |
-
1988
- 1988-03-25 JP JP7130288A patent/JPH01244621A/en active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5243360A (en) * | 1975-10-01 | 1977-04-05 | Hitachi Ltd | Process for production of silicon wafer |
JPS58216425A (en) * | 1982-06-11 | 1983-12-16 | Komatsu Denshi Kinzoku Kk | Preparation of semiconductor silicon substrate |
JPS5974638A (en) * | 1982-10-22 | 1984-04-27 | Hitachi Ltd | Manufacture of semiconductor wafer |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007536738A (en) * | 2004-05-07 | 2007-12-13 | エムイーエムシー・エレクトロニック・マテリアルズ・インコーポレイテッド | Method for reducing metal contamination in silicon wafers |
JP2013058784A (en) * | 2004-05-07 | 2013-03-28 | Memc Electron Materials Inc | Method for reducing metallic contamination in silicon wafer |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US5294570A (en) | Reduction of foreign particulate matter on semiconductor wafers | |
EP0603849B1 (en) | Method for producing a semiconducteur substrate by using a bonding process | |
KR100832944B1 (en) | Manufacturing process for annealed wafer and annealed wafer | |
JPH01315144A (en) | Silicon wafer of excellent gettering capacity and its manufacture | |
US20090203212A1 (en) | Surface Grinding Method and Manufacturing Method for Semiconductor Wafer | |
JP3076202B2 (en) | Method of depositing polysilicon film for EG | |
JPS60247935A (en) | Manufacture of semiconductor wafer | |
JPH01244621A (en) | Method of cleaning surface of silicon single crystal substrate | |
JPH07302775A (en) | Manufacture of semiconductor device | |
JP2776583B2 (en) | Semiconductor substrate processing solution and processing method | |
JP2713787B2 (en) | Semiconductor wet cleaning method | |
JP3823160B2 (en) | Cleaning method inside semiconductor substrate | |
JP3042659B2 (en) | Method for oxidizing semiconductor wafer | |
JP3274810B2 (en) | Method for cleaning sand-blasted semiconductor wafer and semiconductor wafer cleaned by this method | |
JPS60247928A (en) | Cleaning method of semiconductor substrate | |
JPH05226204A (en) | Method and apparatus for melting and bonding of silicon substrate | |
JP3535539B2 (en) | Method for manufacturing semiconductor device | |
JPH0529307B2 (en) | ||
JP3320190B2 (en) | Method for manufacturing semiconductor device | |
JP2639008B2 (en) | Semiconductor substrate cleaning method | |
JP2001213696A (en) | Manufacturing method of epitaxyial wafer and its semiconductor manufacturing equipment | |
CN116798853A (en) | Growth method of silicon epitaxial wafer | |
JPH05175182A (en) | Wafer cleaning method | |
JPH0613390A (en) | Manufacture of semiconductor device | |
JP2548357Y2 (en) | Mounting jig for wafer heat treatment |