JPH01223796A - Hybrid ic having copper-plated conductor and manufacture thereof - Google Patents
Hybrid ic having copper-plated conductor and manufacture thereofInfo
- Publication number
- JPH01223796A JPH01223796A JP4996688A JP4996688A JPH01223796A JP H01223796 A JPH01223796 A JP H01223796A JP 4996688 A JP4996688 A JP 4996688A JP 4996688 A JP4996688 A JP 4996688A JP H01223796 A JPH01223796 A JP H01223796A
- Authority
- JP
- Japan
- Prior art keywords
- copper
- conductor
- paste
- conductive portion
- printed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004020 conductor Substances 0.000 title claims abstract description 53
- 238000004519 manufacturing process Methods 0.000 title claims description 9
- 229910052802 copper Inorganic materials 0.000 claims abstract description 36
- 239000010949 copper Substances 0.000 claims abstract description 36
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 34
- 238000007747 plating Methods 0.000 claims abstract description 21
- 239000000758 substrate Substances 0.000 claims abstract description 16
- 238000000034 method Methods 0.000 claims abstract description 12
- 239000000919 ceramic Substances 0.000 claims description 5
- 238000010304 firing Methods 0.000 claims description 4
- 239000002253 acid Substances 0.000 claims description 3
- 230000008569 process Effects 0.000 abstract description 6
- 230000001681 protective effect Effects 0.000 abstract description 5
- 239000004065 semiconductor Substances 0.000 abstract description 4
- 238000005476 soldering Methods 0.000 abstract description 4
- 239000003822 epoxy resin Substances 0.000 abstract description 2
- 239000011521 glass Substances 0.000 abstract description 2
- 229920000647 polyepoxide Polymers 0.000 abstract description 2
- 238000001354 calcination Methods 0.000 abstract 7
- 238000007772 electroless plating Methods 0.000 abstract 2
- WOCIAKWEIIZHES-UHFFFAOYSA-N ruthenium(iv) oxide Chemical compound O=[Ru]=O WOCIAKWEIIZHES-UHFFFAOYSA-N 0.000 abstract 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 abstract 1
- 229910052782 aluminium Inorganic materials 0.000 abstract 1
- 239000012298 atmosphere Substances 0.000 description 5
- 229910000679 solder Inorganic materials 0.000 description 5
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 4
- 239000000463 material Substances 0.000 description 4
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 3
- 238000001035 drying Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 230000005012 migration Effects 0.000 description 3
- 238000013508 migration Methods 0.000 description 3
- 239000001301 oxygen Substances 0.000 description 3
- 229910052760 oxygen Inorganic materials 0.000 description 3
- 230000004913 activation Effects 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 150000001879 copper Chemical class 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 229920005989 resin Polymers 0.000 description 2
- 239000011347 resin Substances 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 229910002056 binary alloy Inorganic materials 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 230000003750 conditioning effect Effects 0.000 description 1
- 238000005238 degreasing Methods 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 230000001939 inductive effect Effects 0.000 description 1
- 238000002386 leaching Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000012299 nitrogen atmosphere Substances 0.000 description 1
- 238000005406 washing Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/24—Reinforcing the conductive pattern
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/24—Reinforcing the conductive pattern
- H05K3/245—Reinforcing conductive patterns made by printing techniques or by other techniques for applying conductive pastes, inks or powders; Reinforcing other conductive patterns by such techniques
- H05K3/246—Reinforcing conductive paste, ink or powder patterns by other methods, e.g. by plating
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Parts Printed On Printed Circuit Boards (AREA)
- Manufacturing Of Printed Wiring (AREA)
Abstract
Description
【発明の詳細な説明】
（Ｍ業上の利用分野）
本発明は銅めっき導体部を有するハイブリッドＩＣに関
する。DETAILED DESCRIPTION OF THE INVENTION (Field of Application in M Industry) The present invention relates to a hybrid IC having a copper-plated conductor portion.
（従来の技術およびその課題）
ハイブリッドＩＣ等の電子部品を製造する際に用いられ
る導体ペーストは、良好な電気的特性を得るためできる
だけ低い抵抗値を有するペーストが好適に用いられる。(Prior Art and its Problems) As a conductive paste used in manufacturing electronic components such as hybrid ICs, a paste having a resistance value as low as possible is preferably used in order to obtain good electrical characteristics.
たとえば、導体ペーストとして多用されるＡｇ／Ｐｄ系
の導体ペーストでは、Δｇの含有量を多くすることによ
って低抵抗値にできるが、Δｇの含有量を多くするとイ
オンマイグレーションが生じたり、ハンダを侵蝕させる
という問題が起きる。そこで、Ｐｄを添加することでこ
れらの問題を改善している。For example, in Ag/Pd-based conductor paste, which is often used as a conductor paste, a low resistance value can be achieved by increasing the Δg content, but increasing the Δg content may cause ion migration or corrode the solder. A problem arises. Therefore, these problems are improved by adding Pd.
Ｐｄの添加量としてはＰｄ／ （Ｐｄ＋Δｇ）＞０．１
の場合に効果が顕著である。しかしながら、このΔｇ／
Ｐｄ系の導体ペーストでは、Ｒｄの添加量が多くなると
３００℃〜４００℃の温度でＰｄが酸化してＰｄＯとな
り、ハンダの濡れ性が悪くなること、また、Ｐｄおよび
Δｇは価格的にたかいという問題点がある。The amount of Pd added is Pd/ (Pd+Δg)>0.1
The effect is remarkable in the case of However, this Δg/
In Pd-based conductor paste, when the amount of Rd added is large, Pd oxidizes to PdO at temperatures of 300°C to 400°C, resulting in poor solder wettability, and Pd and Δg are expensive. There is a problem.
そこで、このΔｇｌＰｄ系のペーストのかわりに銅をペ
ーストとして用いることが考えられてきた。Therefore, it has been considered to use copper as a paste instead of this ΔglPd-based paste.
この銅ペーストを用いた導体の場合は抵抗値が２ｍΩ〜
３ｍΩ／ｍｍ’であり、前記Ａｇ／ Ｐｄ系ペーストの
抵抗値２０ｍΩ〜４０ｍΩ／ｍｍ２と比較してきわめて
小さく、またイオンマイグレーションが起こりにくいこ
と、ハンダリーチ性が小さい、高周波特性が良い、低価
格である等の利点を有する。In the case of a conductor using this copper paste, the resistance value is 2 mΩ ~
3 mΩ/mm', which is extremely small compared to the resistance value of the Ag/Pd-based paste, which is 20 mΩ to 40 mΩ/mm2, and is less prone to ion migration, has low solder leaching, has good high frequency characteristics, and is inexpensive. It has certain advantages.
しかし、この銅系のペーストは空気中で焼成すると膜面
が酸化してしまいハンダ付けが不能になるため、銅系ペ
ーストを用いる場合は不活性雰囲気（通常は窒素雰囲気
）中で焼成しなければならないという問題がある。なお
、この不活性雰囲気中に含まれる酸素は焼成膜の物理的
、電気的特性に大きな影響を及ぼすものであって、酸素
量が少ない場合あるいは還元性雰囲気中で焼成する場合
は銅導体の基板への接着強度が弱くなるという問題点が
ある。また、酸素量が非常に微量であると有機物成分、
ゴミ等が燃焼されずに残るため導体の断線、短絡を誘発
する等の問題点がある。However, if this copper-based paste is fired in air, the film surface will oxidize, making soldering impossible, so when using copper-based paste, it must be fired in an inert atmosphere (usually a nitrogen atmosphere). The problem is that it doesn't. Note that the oxygen contained in this inert atmosphere has a large effect on the physical and electrical properties of the fired film, so when the amount of oxygen is small or when firing is performed in a reducing atmosphere, the copper conductor substrate There is a problem that the adhesive strength to the material becomes weak. In addition, if the amount of oxygen is very small, organic components,
There are problems such as inducing breakage and short circuits of conductors because the garbage remains unburned.
このため、現状では銅系ペーストは用途が限られており
、この対策手法として二元システムが一部で使用されて
いるが、この方式も低抵抗値および高抵抗値の場合１士
銅系ペーストとのマツチングが悪〈従来の抵抗体の特性
が得られないという問題点がある。For this reason, the uses of copper-based paste are currently limited, and a binary system is used in some cases as a countermeasure against this problem, but this method also uses 1st grade copper-based paste in the case of low and high resistance values. The problem is that the characteristics of conventional resistors cannot be obtained.
そこで、本発明はこれら問題点に鑑みてなされたもので
あり、その目的とするところは、従来用いられているΔ
ｇｌＰｄ系ペーストを用いてかつ、従来の製造方法によ
って、銅系ペーストの有する利点を併せ有する電気的特
性の優れた銅めっき導体部を有するハイブリットＩＣお
よびその製造方法を堤供しようとするものである。Therefore, the present invention has been made in view of these problems, and its purpose is to solve the conventionally used Δ
The present invention aims to provide a hybrid IC having a copper-plated conductor portion with excellent electrical characteristics, which has the advantages of a copper-based paste, and a method for manufacturing the same, using a glPd-based paste and using a conventional manufacturing method. .
（課題を解決するための手段） 本発明は上記目的を達成するため次の構成をそなえる。(Means for solving problems) The present invention has the following configuration to achieve the above object.
すなわち、セラミック基板上に導体ペーストを用いて導
体部を形成して成るハイブリッドＩＣにおいて、前記セ
ラミック基板上にΔｇ／Ｐｄ系の導体ペーストが印刷・
焼成されて成る焼成導体部の上層に、銅めっき層が設け
られたことを特徴とし、また、その製造に際しては、
まず、基板上にＡｇ／ ｐｄ系心導体ペースト所定パタ
ーンに印刷・焼成して焼成導体部を設け、次に、所定部
位に耐酸性のグレーズ層を印刷・焼成して設け、次に無
電解銅めっきによって前記焼成導体部上に銅めっき層を
設けることを特徴とする。That is, in a hybrid IC in which a conductor portion is formed using a conductor paste on a ceramic substrate, a Δg/Pd-based conductor paste is printed on the ceramic substrate.
It is characterized in that a copper plating layer is provided on the upper layer of the fired conductor part, and when manufacturing it, first, a predetermined pattern of Ag/PD core conductor paste is printed and fired on the substrate. The method is characterized in that a fired conductor portion is provided, then an acid-resistant glaze layer is printed and fired at a predetermined location, and then a copper plating layer is provided on the fired conductor portion by electroless copper plating.
（実施例）
以下本発明の好適な実施例を添付図面に基づいて詳細に
説明する。(Embodiments) Preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings.
第１図は本発明に係る銅めっき導体部を有するハイブリ
ッドＩＣの一実施例を示す説明図である。FIG. 1 is an explanatory diagram showing an embodiment of a hybrid IC having a copper-plated conductor portion according to the present invention.
図で１０はハイブリッドＩＣの基板となるアルミナ基板
であり、１２はΔｇ／Ｐｄ系ペーストを用いてアルミナ
基板１０上に形成された焼成導体部、１４はＲｕ０ｚ系
ペーストを用いて形成された抵抗体である。In the figure, 10 is an alumina substrate that will be the substrate of the hybrid IC, 12 is a fired conductor portion formed on the alumina substrate 10 using Δg/Pd-based paste, and 14 is a resistor formed using Ru0z-based paste. It is.
また、１６は抵抗体１４上に設けられたグレーズ層であ
り、１８は焼成導体部１０上に設けられた銅めっき層で
ある。Further, 16 is a glaze layer provided on the resistor 14, and 18 is a copper plating layer provided on the fired conductor portion 10.
そして、このハイブリッドＩＣは銅めっき層１８上に樹
脂保護膜２０が被覆され半導体チップ部品２２が搭載さ
れて成る。This hybrid IC includes a copper plating layer 18 coated with a resin protective film 20 and a semiconductor chip component 22 mounted thereon.
この実施例のハイブリッドＩＣはＡｇ／Ｐｄ系導体ペー
ストを用いて焼成導体部１２を設けた後に銅めっきによ
って焼成導体部１２上に銅めっき層１８を設けたことを
特徴とするが、以下に製造方法の実施例を説明する。The hybrid IC of this embodiment is characterized in that a fired conductor part 12 is provided using Ag/Pd-based conductor paste, and then a copper plating layer 18 is provided on the fired conductor part 12 by copper plating. An example of the method will be described.
■ まず、９６％純度のアルミナ基板上にＡｇ／Ｐｄ系
導体ペーストを所定パターンに印刷し、空気雰囲気中で
焼成することにより基板上に焼成導体部を形成する。(2) First, Ag/Pd-based conductor paste is printed in a predetermined pattern on a 96% pure alumina substrate, and fired in an air atmosphere to form a fired conductor portion on the board.
■ ついで、ＲＬ１０２系ペーストを印刷し、乾燥した
後焼成して、抵抗体を形成する。(2) Next, RL102 paste is printed, dried and fired to form a resistor.
■ 次に、抵抗体部分に耐酸性の非晶質ガラスかう成る
オーバーグレーズペーストを印刷し、乾燥した後６００
℃で焼成する。■ Next, an overglaze paste made of acid-resistant amorphous glass is printed on the resistor part, and after drying,
Bake at ℃.
■ 次に、無電解銅めっき工程により前記焼成導体部上
に銅めっきを施し、洗浄、乾燥する。(2) Next, copper plating is performed on the fired conductor part by an electroless copper plating process, followed by washing and drying.
■ 次に、ハンダ接合部分を除いた銅めっき部分にエポ
キシ系樹脂を印刷し、乾燥、焼付けして導体部分に保護
膜を設ける。■Next, epoxy resin is printed on the copper-plated parts except for the solder joint parts, dried and baked to form a protective film on the conductor parts.
■ その後、抵抗値の調整を行い、半導体チップ等の部
品を搭載しハンダリフローにより導体部と接続して回路
を形成する。(2) After that, the resistance value is adjusted, components such as semiconductor chips are mounted, and the circuit is formed by connecting to conductor parts using solder reflow.
なお、実施例における前記無電解銅めっき工程は次のと
おりである。The electroless copper plating process in the example is as follows.
脱脂（１０分）→エツチング（２０分）→表面調整（３
分）→活性化（１０秒）→無電解銅めっき（５分）→活
性化（３０秒）→無電Ｍ、銅めっき（１０分）→洗浄→
乾燥
このようにして得られたハイブリッドＩＣは焼成導体部
１２および銅めっき層１８が導体部となり、得られた導
体部の抵抗値はｌｏｍΩ〜２０ ｍΩ／ｍｍ’であった
。この抵抗値は従来のΔｇ／ Ｐｄ系ペーストのみを用
いて得られる導体抵抗値に比較して約５０％減少してい
る。Degreasing (10 minutes) → Etching (20 minutes) → Surface conditioning (3
minutes) → Activation (10 seconds) → Electroless copper plating (5 minutes) → Activation (30 seconds) → Electroless M, copper plating (10 minutes) → Cleaning →
Drying In the thus obtained hybrid IC, the fired conductor portion 12 and the copper plating layer 18 served as conductor portions, and the resistance value of the obtained conductor portion was from lomΩ to 20 mΩ/mm'. This resistance value is approximately 50% lower than the conductor resistance value obtained using only the conventional Δg/Pd-based paste.
また、導体部のはんだ付は部分は銅めっきが施されてい
るのではんだ付は性が良好であり、耐マイグレーション
性も銅とほぼ同じ値であって、銅系ペーストを用いたも
のに近い特性を得ることができた。In addition, since the conductor parts are copper-plated, the soldering properties are good, and the migration resistance is almost the same as that of copper, which is similar to that of copper-based pastes. was able to obtain.
なお、上記工程中の銅導体部の形成については、従来の
チップ抵抗器の製造に用いる電解めっきおよび抵抗体保
護膜らの形成方法が利用でき、使用する材質の組合わせ
により、プロセスコスト、材料コストを大幅に低減する
ことができる。Regarding the formation of the copper conductor part in the above process, the electrolytic plating and resistor protective film formation methods used in the manufacture of conventional chip resistors can be used, and the process cost and materials can be reduced depending on the combination of materials used. Costs can be significantly reduced.
以上、本発明について好適な実施例を挙げて種々説明し
たが、本発明はこの実施例に限定されるものではなく、
発明の精神を逸脱しない範囲内で多くの改変を施し得る
のはもちろんのことである。The present invention has been variously explained above using preferred embodiments, but the present invention is not limited to these embodiments.
Of course, many modifications can be made without departing from the spirit of the invention.
（発明の効果）
本発明によれば、上述したように、従来導体ペーストと
して多用されているＡｇ／Ｐｄ系ペーストを用いて形成
された焼成導体部に銅めっきが施されたことにより、Ａ
ｇ／Ｐｄ系導体の特性を損なうことなく、さらに導体部
を低抵抗にできる他、はんだ付は性等において銅導体が
有する良好な特性を併せ有することができる。(Effects of the Invention) According to the present invention, as described above, copper plating is applied to the fired conductor portion formed using Ag/Pd-based paste, which is conventionally frequently used as a conductor paste.
In addition to making the conductor part lower in resistance without impairing the characteristics of the g/Pd-based conductor, it also has the good characteristics of copper conductors in terms of soldering properties and the like.
薫だ、製造上は不活性雰囲気中における焼成等の必要も
なく、プロセスコスト、材料コストを低減させることが
できる等の著効を奏する。In manufacturing, there is no need for firing in an inert atmosphere, and the process cost and material cost can be reduced.
第１図は本発明に係る銅めっき導体部を有するハイブリ
ッドＩＣの一実施例を示す説明図である。
１０・・・アルミナ基板、 １２・・・焼成導体部、
１４・・・抵抗体、 １６・・・グレーズ層、 １８
・・・銅めっき層、 ２ｏ・・・樹脂保護膜、 ２２
・・・半導体チップ部品。FIG. 1 is an explanatory diagram showing an embodiment of a hybrid IC having a copper-plated conductor portion according to the present invention. 10... Alumina substrate, 12... Fired conductor part,
14...Resistor, 16...Glaze layer, 18
...Copper plating layer, 2o...Resin protective film, 22
...Semiconductor chip parts.
Claims (2)
形成して成るハイブリッドＩＣにおいて、 前記セラミック基板上にＡｇ／ Ｐｄ系の導体ペースト
が印刷・焼成されて成る焼成導体部の上層に、銅めっき
層が設けられたことを特徴とする銅めっき導体部を有す
るハイブリッドＩＣ。1. In a hybrid IC in which a conductor portion is formed using a conductor paste on a ceramic substrate, a copper plating layer is provided on the upper layer of the fired conductor portion, which is formed by printing and firing an Ag/Pd-based conductor paste on the ceramic substrate. A hybrid IC having a copper-plated conductor portion.
形成して成るハイブリッドＩＣの製造方法において、 まず、基板上にＡｇ／ Ｐｄ系導体ペーストを所定パタ
ーンに印刷・焼成して焼成導体部を設け、 次に、所定部位に耐酸性のグレーズ層を印 刷・焼成して設け、 次に無電解銅めっきによって前記焼成導体 部上に銅めっき層を設けることを特徴とする銅めっき導
体部を有するハイブリッドＩＣの製造方法。2. In a method for manufacturing a hybrid IC in which a conductor portion is formed using a conductor paste on a ceramic substrate, first, a fired conductor portion is provided by printing and firing Ag/Pd-based conductor paste in a predetermined pattern on the substrate; A hybrid IC having a copper-plated conductor part, characterized in that an acid-resistant glaze layer is printed and fired at a predetermined location, and then a copper plating layer is provided on the fired conductor part by electroless copper plating. Production method.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4996688A JPH01223796A (en) | 1988-03-02 | 1988-03-02 | Hybrid ic having copper-plated conductor and manufacture thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4996688A JPH01223796A (en) | 1988-03-02 | 1988-03-02 | Hybrid ic having copper-plated conductor and manufacture thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01223796A true JPH01223796A (en) | 1989-09-06 |
Family
ID=12845765
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4996688A Pending JPH01223796A (en) | 1988-03-02 | 1988-03-02 | Hybrid ic having copper-plated conductor and manufacture thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01223796A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0258893A (en) * | 1988-08-24 | 1990-02-28 | Nippon Chemicon Corp | Thick film integrated circuit and its manufacture |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57147295A (en) * | 1981-03-06 | 1982-09-11 | Hitachi Ltd | Hybrid integrated circuit |
-
1988
- 1988-03-02 JP JP4996688A patent/JPH01223796A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57147295A (en) * | 1981-03-06 | 1982-09-11 | Hitachi Ltd | Hybrid integrated circuit |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0258893A (en) * | 1988-08-24 | 1990-02-28 | Nippon Chemicon Corp | Thick film integrated circuit and its manufacture |
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